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nir: gather indirect info from lowered IO intrinsics
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6758>
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3173367a47
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10be706778
@ -354,38 +354,47 @@ gather_intrinsic_info(nir_intrinsic_instr *instr, nir_shader *shader,
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}
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}
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case nir_intrinsic_load_input:
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case nir_intrinsic_load_input:
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if (shader->info.stage == MESA_SHADER_TESS_EVAL)
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shader->info.patch_inputs_read |= slot_mask;
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else
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shader->info.inputs_read |= slot_mask;
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break;
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case nir_intrinsic_load_per_vertex_input:
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case nir_intrinsic_load_per_vertex_input:
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case nir_intrinsic_load_input_vertex:
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case nir_intrinsic_load_input_vertex:
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case nir_intrinsic_load_interpolated_input:
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case nir_intrinsic_load_interpolated_input:
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shader->info.inputs_read |= slot_mask;
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if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
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instr->intrinsic == nir_intrinsic_load_input) {
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shader->info.patch_inputs_read |= slot_mask;
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if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
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shader->info.patch_inputs_read_indirectly |= slot_mask;
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} else {
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shader->info.inputs_read |= slot_mask;
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if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
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shader->info.inputs_read_indirectly |= slot_mask;
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}
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break;
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break;
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case nir_intrinsic_load_output:
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case nir_intrinsic_load_output:
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if (shader->info.stage == MESA_SHADER_TESS_CTRL)
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shader->info.patch_outputs_read |= slot_mask;
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else
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shader->info.outputs_read |= slot_mask;
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break;
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case nir_intrinsic_load_per_vertex_output:
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case nir_intrinsic_load_per_vertex_output:
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shader->info.outputs_read |= slot_mask;
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if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
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instr->intrinsic == nir_intrinsic_load_output) {
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shader->info.patch_outputs_read |= slot_mask;
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if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
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shader->info.patch_outputs_accessed_indirectly |= slot_mask;
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} else {
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shader->info.outputs_read |= slot_mask;
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if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
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shader->info.outputs_accessed_indirectly |= slot_mask;
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}
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break;
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break;
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case nir_intrinsic_store_output:
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case nir_intrinsic_store_output:
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if (shader->info.stage == MESA_SHADER_TESS_CTRL)
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shader->info.patch_outputs_written |= slot_mask;
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else
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shader->info.outputs_written |= slot_mask;
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break;
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case nir_intrinsic_store_per_vertex_output:
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case nir_intrinsic_store_per_vertex_output:
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shader->info.outputs_written |= slot_mask;
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if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
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instr->intrinsic == nir_intrinsic_store_output) {
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shader->info.patch_outputs_written |= slot_mask;
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if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
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shader->info.patch_outputs_accessed_indirectly |= slot_mask;
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} else {
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shader->info.outputs_written |= slot_mask;
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if (!nir_src_is_const(*nir_get_io_offset_src(instr)))
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shader->info.outputs_accessed_indirectly |= slot_mask;
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}
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break;
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break;
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case nir_intrinsic_load_draw_id:
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case nir_intrinsic_load_draw_id:
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