replace FSL_RTOS_FREE_RTOS by SDK_OS_FREE_RTOS in order to be aligned
with MCU SDK 2.10.
See MCUX-41577.
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
includes updates coming from NXP MCU SDK 2.10 with adaptation for lvgl v8:
Fixed BLIT offset computation
Previous implementation didn't take into account a possibility of
non-zero offset in source image, so output was wrong if offset was used.
With this fix, CPU and VG-Lite output is the same even with offsets.
Signed-off-by: Jozef Bastek <jozef.bastek@nxp.com>
gpu: vglite: Buffer sync with BLITs
Added buffer synchronisation with BLITs instead of memcpy for VG-Lite.
In LVGL v8, buffer synchronisation acceleration is moved to littlevgl_support.c.
Signed-off-by: Jozef Bastek <jozef.bastek@nxp.com>
gpu: vglite: Fixed BLIT boundary
Fixed artifact issue revealed by buffer sync with BLIT feature. Caused
by wrong BLIT boundary.
Signed-off-by: Jozef Bastek <jozef.bastek@nxp.com>
gpu: vglite: BLIT quality degradation workaround for RT595
Limitation in RT595 causes BLIT image quality degradation when
coordinates are above 368 px. This patch implements workaround that will
break the BLIT into multiple smaller BLITs, so the quality is not
affected for higher resolutions.
Signed-off-by: Jozef Bastek <jozef.bastek@nxp.com>
gpu: vglite: Fix address alignment and stride requirements
Fixed multiple issues:
- The VGLite alignment requirement checks for the pixel destination
buffer are not applicable in our case of Linear (non-tiled) format.
- Some VGLite stride requirement requirement should be expressed in bytes,
not in pixels.
- Fix the Y alignment function to ensure that line starts at an address
that the respects the alignment requirement of VG-Lite.
Such mistakes do not break application,
but cause a fallback to non-accelerated Blit by CPU.
See MGG-741.
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
gpu: vglite: fix some MISRA C 2012 violations
fixed 56 violations: mainly implicit format casts
and unchecked returned values.
see JIRA MCUX-43327
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
gpu: vglite: fix stride requirement in _init_vg_buf()
fix unit: need to convert the alignment requirement into bytes when checking
stride parameter.
fix condition: stride requirement applies only on source buffers.
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
gpu: vglite: updates for v8
cache callback type changed in display driver struct
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
gpu: vglite: update parameter type for v8
display driver is now a pointer in structure.
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
includes updates from NXP MCU SDK 2.10 with adaptation for lvgl v8:
Updated cache handling
- range limited cache flushing changed to complete cache flush, which is
faster and shold be safe
- flushing done via callback system, so OS specific code is removed
from LVGL
Signed-off-by: Jozef Bastek <jozef.bastek@nxp.com>
gpu: pxp: Buffer sync with BLITs
Added buffer synchronisation with BLITs instead of memcpy for PXP.
In LVGL v8, buffer synchronisation acceleration is moved to littlevgl_support.c.
Signed-off-by: Jozef Bastek <jozef.bastek@nxp.com>
gpu: pxp: updates for v8
cache callback type changed in display driver struct
chroma key name changed
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
gpu: pxp: new log header file for v8
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
core: init PXP accelerator
Signed-off-by: Seb Fagard <sebastien.fagard@nxp.com>
* Spinbox set cursor to specific position (funct.)
* changed exp10 to lv_pow(10
* Update lv_spinbox.c
resolved indentation
* Update spinbox.md
Added lv_spinbox_set_pos description
Co-authored-by: Sebastian Dyker <sebastian.dyker@walther-systemtechnik.com>
