[pci] Provide a null PCI API for platforms with no PCI bus

Signed-off-by: Michael Brown <mcb30@ipxe.org>

src/core/null_pci.c

@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 2024 Michael Brown <mbrown@fensystems.co.uk>.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of the
+ * License, or any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ * 02110-1301, USA.
+ *
+ * You can also choose to distribute this program under the terms of
+ * the Unmodified Binary Distribution Licence (as given in the file
+ * COPYING.UBDL), provided that you have satisfied its requirements.
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+/**
+ * @file
+ *
+ * Null PCI API
+ *
+ */
+
+#include <ipxe/pci.h>
+
+PROVIDE_PCIAPI_INLINE ( null, pci_can_probe );
+PROVIDE_PCIAPI_INLINE ( null, pci_discover );
+PROVIDE_PCIAPI_INLINE ( null, pci_read_config_byte );
+PROVIDE_PCIAPI_INLINE ( null, pci_read_config_word );
+PROVIDE_PCIAPI_INLINE ( null, pci_read_config_dword );
+PROVIDE_PCIAPI_INLINE ( null, pci_write_config_byte );
+PROVIDE_PCIAPI_INLINE ( null, pci_write_config_word );
+PROVIDE_PCIAPI_INLINE ( null, pci_write_config_dword );
+PROVIDE_PCIAPI_INLINE ( null, pci_ioremap );

src/include/ipxe/null_pci.h

@@ -0,0 +1,154 @@
+#ifndef _IPXE_NULL_PCI_H
+#define _IPXE_NULL_PCI_H
+
+#include <stdint.h>
+
+/** @file
+ *
+ * Null PCI API
+ *
+ */
+
+FILE_LICENCE ( GPL2_OR_LATER_OR_UBDL );
+
+#ifdef PCIAPI_NULL
+#define PCIAPI_PREFIX_null
+#else
+#define PCIAPI_PREFIX_null __null_
+#endif
+
+struct pci_device;
+
+/**
+ * Check if PCI bus probing is allowed
+ *
+ * @ret ok		Bus probing is allowed
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_can_probe ) ( void ) {
+	return 0;
+}
+
+/**
+ * Find next PCI bus:dev.fn address range in system
+ *
+ * @v busdevfn		Starting PCI bus:dev.fn address
+ * @v range		PCI bus:dev.fn address range to fill in
+ */
+static inline __always_inline void
+PCIAPI_INLINE ( null, pci_discover ) ( uint32_t busdevfn __unused,
+				       struct pci_range *range ) {
+
+	range->start = 0;
+	range->count = 0;
+}
+
+/**
+ * Read byte from PCI configuration space via PCI BIOS
+ *
+ * @v pci	PCI device
+ * @v where	Location within PCI configuration space
+ * @v value	Value read
+ * @ret rc	Return status code
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_read_config_byte ) ( struct pci_device *pci __unused,
+					       unsigned int where __unused,
+					       uint8_t *value ) {
+	*value = 0xff;
+	return 0;
+}
+
+/**
+ * Read word from PCI configuration space via PCI BIOS
+ *
+ * @v pci	PCI device
+ * @v where	Location within PCI configuration space
+ * @v value	Value read
+ * @ret rc	Return status code
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_read_config_word ) ( struct pci_device *pci __unused,
+					       unsigned int where __unused,
+					       uint16_t *value ) {
+	*value = 0xffff;
+	return 0;
+}
+
+/**
+ * Read dword from PCI configuration space via PCI BIOS
+ *
+ * @v pci	PCI device
+ * @v where	Location within PCI configuration space
+ * @v value	Value read
+ * @ret rc	Return status code
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_read_config_dword ) ( struct pci_device *pci __unused,
+						unsigned int where __unused,
+						uint32_t *value ) {
+	*value = 0xffffffff;
+	return 0;
+}
+
+/**
+ * Write byte to PCI configuration space via PCI BIOS
+ *
+ * @v pci	PCI device
+ * @v where	Location within PCI configuration space
+ * @v value	Value to be written
+ * @ret rc	Return status code
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_write_config_byte ) ( struct pci_device *pci __unused,
+						unsigned int where __unused,
+						uint8_t value __unused ) {
+	return 0;
+}
+
+/**
+ * Write word to PCI configuration space via PCI BIOS
+ *
+ * @v pci	PCI device
+ * @v where	Location within PCI configuration space
+ * @v value	Value to be written
+ * @ret rc	Return status code
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_write_config_word ) ( struct pci_device *pci __unused,
+						unsigned int where __unused,
+						uint16_t value __unused ) {
+	return 0;
+}
+
+/**
+ * Write dword to PCI configuration space via PCI BIOS
+ *
+ * @v pci	PCI device
+ * @v where	Location within PCI configuration space
+ * @v value	Value to be written
+ * @ret rc	Return status code
+ */
+static inline __always_inline int
+PCIAPI_INLINE ( null, pci_write_config_dword ) ( struct pci_device *pci
+						 __unused,
+						 unsigned int where __unused,
+						 uint32_t value __unused ) {
+	return 0;
+}
+
+/**
+ * Map PCI bus address as an I/O address
+ *
+ * @v bus_addr		PCI bus address
+ * @v len		Length of region
+ * @ret io_addr		I/O address, or NULL on error
+ */
+static inline __always_inline void *
+PCIAPI_INLINE ( null, pci_ioremap ) ( struct pci_device *pci __unused,
+				      unsigned long bus_addr __unused,
+				      size_t len __unused ) {
+	return NULL;
+}
+
+#endif /* _IPXE_NULL_PCI_H */

src/include/ipxe/pci_io.h

@@ -59,6 +59,7 @@ struct pci_range {
 	PROVIDE_SINGLE_API_INLINE ( PCIAPI_PREFIX_ ## _subsys, _api_func )
 
 /* Include all architecture-independent I/O API headers */
+#include <ipxe/null_pci.h>
 #include <ipxe/ecam_io.h>
 #include <ipxe/efi/efi_pci_api.h>
 #include <ipxe/linux/linux_pci.h>