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22f4ab2d20
Rename atomic_exchange_rel/acq to use atomic_exchange_release/acquire since these map to the standard C11 atomic builtins. Reviewed-by: Adhemerval Zanella <adhemerval.zanella@linaro.org>
113 lines
3.3 KiB
C
113 lines
3.3 KiB
C
/* Low-level lock implementation. Mach gsync-based version.
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Copyright (C) 1994-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef _MACH_LOWLEVELLOCK_H
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#define _MACH_LOWLEVELLOCK_H 1
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#include <mach/gnumach.h>
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#include <atomic.h>
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/* Gsync flags. */
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#ifndef GSYNC_SHARED
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# define GSYNC_SHARED 0x01
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# define GSYNC_QUAD 0x02
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# define GSYNC_TIMED 0x04
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# define GSYNC_BROADCAST 0x08
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# define GSYNC_MUTATE 0x10
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#endif
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/* Static initializer for low-level locks. */
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#define LLL_LOCK_INITIALIZER 0
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#define LLL_PRIVATE 0
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#define LLL_SHARED GSYNC_SHARED
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/* Interruptible version of __gsync_wait. */
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extern kern_return_t __gsync_wait_intr
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(
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mach_port_t task,
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vm_offset_t addr,
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unsigned val1,
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unsigned val2,
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natural_t msec,
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int flags
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);
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/* Wait on address PTR, without blocking if its contents
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* are different from VAL. */
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#define __lll_wait(ptr, val, flags) \
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__gsync_wait (__mach_task_self (), \
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(vm_offset_t)(ptr), (val), 0, 0, (flags))
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#define lll_wait(var, val, flags) \
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__lll_wait (&(var), val, flags)
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/* Interruptible version. */
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#define __lll_wait_intr(ptr, val, flags) \
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__gsync_wait_intr (__mach_task_self (), \
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(vm_offset_t)(ptr), (val), 0, 0, (flags))
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#define lll_wait_intr(var, val, flags) \
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__lll_wait_intr ((&var), val, flags)
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/* Wake one or more threads waiting on address PTR. */
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#define __lll_wake(ptr, flags) \
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__gsync_wake (__mach_task_self (), (vm_offset_t)(ptr), 0, (flags))
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#define lll_wake(var, flags) \
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__lll_wake (&(var), flags)
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/* Acquire the lock at PTR. */
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#define __lll_lock(ptr, flags) \
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({ \
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int *__iptr = (int *)(ptr); \
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int __flags = (flags); \
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if (*__iptr != 0 \
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|| atomic_compare_and_exchange_bool_acq (__iptr, 1, 0) != 0) \
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while (1) \
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{ \
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if (atomic_exchange_acquire (__iptr, 2) == 0) \
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break; \
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__lll_wait (__iptr, 2, __flags); \
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} \
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(void)0; \
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})
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#define lll_lock(var, flags) \
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__lll_lock (&(var), flags)
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/* Try to acquire the lock at PTR, without blocking.
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Evaluates to zero on success. */
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#define __lll_trylock(ptr) \
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({ \
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int *__iptr = (int *)(ptr); \
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*__iptr == 0 \
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&& atomic_compare_and_exchange_bool_acq (__iptr, 1, 0) == 0 ? 0 : -1; \
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})
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#define lll_trylock(var) \
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__lll_trylock (&(var))
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/* Release the lock at PTR. */
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#define __lll_unlock(ptr, flags) \
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({ \
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int *__iptr = (int *)(ptr); \
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if (atomic_exchange_release (__iptr, 0) == 2) \
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__lll_wake (__iptr, (flags)); \
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(void)0; \
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})
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#define lll_unlock(var, flags) \
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__lll_unlock (&(var), flags)
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#endif
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