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Separate ARM bits/atomic.h into generic and Linux-specific files.
This commit is contained in:
Roland McGrath
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5544c7e000
commit
f3bdd5f843
@ -1,3 +1,20 @@
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2012-08-14 Roland McGrath <roland@hack.frob.com>
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* sysdeps/unix/sysv/linux/arm/nptl/bits/atomic.h
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[!__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4]
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(atomic_full_barrier): Renamed to ...
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(__arm_assisted_full_barrier): ... this.
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(__arch_compare_and_exchange_val_32_acq): Renamed to ...
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(__arm_assisted_compare_and_exchange_val_32_acq): ... this.
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(atomic8_t, uatomic8_t, atomic_fast8_t, uatomic_fast8_t,
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atomic32_t, uatomic32_t, atomic_fast32_t, uatomic_fast32_t,
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atomicptr_t, uatomicptr_t, atomic_max_t, uatomic_max_t,
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atomic_full_barrier, __arch_compare_and_exchange_val_32_acq,
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__arch_compare_and_exchange_val_8_acq,
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__arch_compare_and_exchange_val_16_acq,
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__arch_compare_and_exchange_val_64_acq): Types and macros moved to ...
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* sysdeps/arm/bits/atomic.h: ... this new file.
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2012-08-12 Mike Frysinger <vapier@gentoo.org>
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* sysdeps/arm/dl-machine.h (elf_machine_rel) [R_ARM_ABS32]: Fix style.
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81
ports/sysdeps/arm/bits/atomic.h
Normal file
81
ports/sysdeps/arm/bits/atomic.h
Normal file
@ -0,0 +1,81 @@
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/* Atomic operations. Pure ARM version.
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Copyright (C) 2002-2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <stdint.h>
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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void __arm_link_error (void);
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/* Use the atomic builtins provided by GCC in case the backend provides
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a pattern to do this efficiently. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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# define atomic_full_barrier() __sync_synchronize ()
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#else
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# define atomic_full_barrier() __arm_assisted_full_barrier ()
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#endif
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/* An OS-specific bits/atomic.h file will define this macro if
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the OS can provide something. If not, we'll fail to build
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with a compiler that doesn't supply the operation. */
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#ifndef __arm_assisted_full_barrier
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# define __arm_assisted_full_barrier() __arm_link_error()
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#endif
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/* Atomic compare and exchange. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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__sync_val_compare_and_swap ((mem), (oldval), (newval))
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#else
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# define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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__arm_assisted_compare_and_exchange_val_32_acq ((mem), (oldval), (newval))
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#endif
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/* We don't support atomic operations on any non-word types.
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So make them link errors. */
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#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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/* An OS-specific bits/atomic.h file will define this macro if
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the OS can provide something. If not, we'll fail to build
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with a compiler that doesn't supply the operation. */
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#ifndef __arm_assisted_compare_and_exchange_val_32_acq
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# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#endif
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@ -1,4 +1,5 @@
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/* Copyright (C) 2002-2012 Free Software Foundation, Inc.
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/* Atomic operations. ARM/Linux version.
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Copyright (C) 2002-2012 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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@ -15,41 +16,17 @@
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <stdint.h>
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#include <sysdep.h>
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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void __arm_link_error (void);
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/* Use the atomic builtins provided by GCC in case the backend provides
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a pattern to do this efficiently. */
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#define atomic_full_barrier() __sync_synchronize ()
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#elif defined __thumb2__
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#define atomic_full_barrier() \
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/* If the compiler doesn't provide a primitive, we'll use this macro
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to get assistance from the kernel. */
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#ifdef __thumb2__
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# define __arm_assisted_full_barrier() \
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__asm__ __volatile__ \
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("movw\tip, #0x0fa0\n\t" \
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"movt\tip, #0xffff\n\t" \
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"blx\tip" \
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: : : "ip", "lr", "cc", "memory");
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#else
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#define atomic_full_barrier() \
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# define __arm_assisted_full_barrier() \
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__asm__ __volatile__ \
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("mov\tip, #0xffff0fff\n\t" \
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"mov\tlr, pc\n\t" \
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@ -60,19 +37,9 @@ void __arm_link_error (void);
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/* Atomic compare and exchange. This sequence relies on the kernel to
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provide a compare and exchange operation which is atomic on the
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current architecture, either via cleverness on pre-ARMv6 or via
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ldrex / strex on ARMv6. */
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ldrex / strex on ARMv6.
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#define __arch_compare_and_exchange_val_8_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#define __arch_compare_and_exchange_val_16_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#ifdef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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__sync_val_compare_and_swap ((mem), (oldval), (newval))
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/* It doesn't matter what register is used for a_oldval2, but we must
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It doesn't matter what register is used for a_oldval2, but we must
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specify one to work around GCC PR rtl-optimization/21223. Otherwise
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it may cause a_oldval or a_tmp to be moved to a different register.
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@ -81,10 +48,10 @@ void __arm_link_error (void);
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form *PTR and PTR has a 'volatile ... *' type, then __typeof (*PTR) has
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a 'volatile ...' type and this triggers -Wvolatile-register-var to
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complain about 'register volatile ... asm ("reg")'. */
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#elif defined __thumb2__
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#ifdef __thumb2__
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/* Thumb-2 has ldrex/strex. However it does not have barrier instructions,
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so we still need to use the kernel helper. */
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\
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union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\
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register uint32_t a_oldval asm ("r0"); \
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@ -109,7 +76,7 @@ void __arm_link_error (void);
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: "ip", "lr", "cc", "memory"); \
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(__typeof (oldval)) a_tmp; })
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#else
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#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\
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union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\
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register uint32_t a_oldval asm ("r0"); \
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@ -135,5 +102,4 @@ void __arm_link_error (void);
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(__typeof (oldval)) a_tmp; })
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#endif
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#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
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({ __arm_link_error (); oldval; })
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#include <sysdeps/arm/bits/atomic.h>
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