mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-27 03:33:33 +08:00
LoongArch: Fix _dl_tlsdesc_dynamic in LSX case
HWCAP value is overwritten at the first comparison of the LASX case. The second comparison at LSX get incorrect result. Change to use t0 to save HWCAP value, and use t1 to save comparison result.
This commit is contained in:
parent
92341e3150
commit
9a675d998e
@ -81,7 +81,7 @@ _dl_tlsdesc_undefweak:
|
||||
_dl_tlsdesc_dynamic (struct tlsdesc *tdp)
|
||||
{
|
||||
struct tlsdesc_dynamic_arg *td = tdp->arg;
|
||||
dtv_t *dtv = *(dtv_t **)((char *)__thread_pointer - TCBHEAD_DTV);
|
||||
dtv_t *dtv = *(dtv_t **)((char *)__thread_pointer - SIZE_OF_TCB);
|
||||
if (__glibc_likely (td->gen_count <= dtv[0].counter
|
||||
&& (dtv[td->tlsinfo.ti_module].pointer.val
|
||||
!= TLS_DTV_UNALLOCATED),
|
||||
@ -177,8 +177,8 @@ Hign address dynamic_block1 <----- dtv5 */
|
||||
/* Whether support LASX. */
|
||||
la.global t0, _rtld_global_ro
|
||||
REG_L t0, t0, GLRO_DL_HWCAP_OFFSET
|
||||
andi t0, t0, HWCAP_LOONGARCH_LASX
|
||||
beqz t0, .Llsx
|
||||
andi t1, t0, HWCAP_LOONGARCH_LASX
|
||||
beqz t1, .Llsx
|
||||
|
||||
/* Save 256-bit vector registers.
|
||||
FIXME: Without vector ABI, save all vector registers. */
|
||||
@ -219,8 +219,8 @@ Hign address dynamic_block1 <----- dtv5 */
|
||||
|
||||
.Llsx:
|
||||
/* Whether support LSX. */
|
||||
andi t0, t0, HWCAP_LOONGARCH_LSX
|
||||
beqz t0, .Lfloat
|
||||
andi t1, t0, HWCAP_LOONGARCH_LSX
|
||||
beqz t1, .Lfloat
|
||||
|
||||
/* Save 128-bit vector registers. */
|
||||
ADDI sp, sp, -FRAME_SIZE_LSX
|
||||
@ -296,8 +296,8 @@ Hign address dynamic_block1 <----- dtv5 */
|
||||
|
||||
la.global t0, _rtld_global_ro
|
||||
REG_L t0, t0, GLRO_DL_HWCAP_OFFSET
|
||||
andi t0, t0, HWCAP_LOONGARCH_LASX
|
||||
beqz t0, .Llsx1
|
||||
andi t1, t0, HWCAP_LOONGARCH_LASX
|
||||
beqz t1, .Llsx1
|
||||
|
||||
/* Restore 256-bit vector registers. */
|
||||
xvld xr0, sp, 0*SZXREG
|
||||
@ -336,8 +336,8 @@ Hign address dynamic_block1 <----- dtv5 */
|
||||
b .Lfcsr
|
||||
|
||||
.Llsx1:
|
||||
andi t0, s0, HWCAP_LOONGARCH_LSX
|
||||
beqz t0, .Lfloat1
|
||||
andi t1, t0, HWCAP_LOONGARCH_LSX
|
||||
beqz t1, .Lfloat1
|
||||
|
||||
/* Restore 128-bit vector registers. */
|
||||
vld vr0, sp, 0*SZVREG
|
||||
|
Loading…
Reference in New Issue
Block a user