mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-23 01:33:36 +08:00
Update.
2003-04-16 Jakub Jelinek <jakub@redhat.com> * elf/Makefile (distribute): Add tst-tlsmod{[7-9],1[0-2]}.c and tst-tls10.h. (tests): Add tst-tls1[0-2]. (modules-names): Add tst-tlsmod{[7-8],1[0-2]}. ($(objpfx)tst-tlsmod8.so): Depend on tst-tlsmod7.so. ($(objpfx)tst-tlsmod10.so): Depend on tst-tlsmod9.so. ($(objpfx)tst-tlsmod12.so): Depend on tst-tlsmod11.so. ($(objpfx)tst-tls10): Depend on tst-tlsmod8.so. ($(objpfx)tst-tls11): Depend on tst-tlsmod10.so. ($(objpfx)tst-tls12): Depend on tst-tlsmod12.so. * elf/tst-tls10.c: New test. * elf/tst-tls11.c: New test. * elf/tst-tls12.c: New test. * elf/tst-tls10.h: New file. * elf/tst-tlsmod7.c: New file. * elf/tst-tlsmod8.c: New file. * elf/tst-tlsmod9.c: New file. * elf/tst-tlsmod10.c: New file. * elf/tst-tlsmod11.c: New file. * elf/tst-tlsmod12.c: New file. 2003-04-15 Steven Munroe <sjmunroe@us.ibm.com> * sysdeps/powerpc/bits/atomic.h: Moved ppc32/64 specific code to ... * sysdeps/powerpc/powerpc32/bits/atomic.h: New file. * sysdeps/powerpc/powerpc64/bits/atomic.h: New file. * posix/regex.h: Include <sys/types.h>.
This commit is contained in:
parent
66cd688c01
commit
94c24227fc
31
ChangeLog
31
ChangeLog
@ -1,5 +1,36 @@
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2003-04-16 Jakub Jelinek <jakub@redhat.com>
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* elf/Makefile (distribute): Add tst-tlsmod{[7-9],1[0-2]}.c and
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tst-tls10.h.
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(tests): Add tst-tls1[0-2].
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(modules-names): Add tst-tlsmod{[7-8],1[0-2]}.
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($(objpfx)tst-tlsmod8.so): Depend on tst-tlsmod7.so.
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($(objpfx)tst-tlsmod10.so): Depend on tst-tlsmod9.so.
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($(objpfx)tst-tlsmod12.so): Depend on tst-tlsmod11.so.
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($(objpfx)tst-tls10): Depend on tst-tlsmod8.so.
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($(objpfx)tst-tls11): Depend on tst-tlsmod10.so.
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($(objpfx)tst-tls12): Depend on tst-tlsmod12.so.
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* elf/tst-tls10.c: New test.
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* elf/tst-tls11.c: New test.
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* elf/tst-tls12.c: New test.
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* elf/tst-tls10.h: New file.
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* elf/tst-tlsmod7.c: New file.
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* elf/tst-tlsmod8.c: New file.
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* elf/tst-tlsmod9.c: New file.
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* elf/tst-tlsmod10.c: New file.
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* elf/tst-tlsmod11.c: New file.
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* elf/tst-tlsmod12.c: New file.
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2003-04-15 Steven Munroe <sjmunroe@us.ibm.com>
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* sysdeps/powerpc/bits/atomic.h: Moved ppc32/64 specific code to ...
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* sysdeps/powerpc/powerpc32/bits/atomic.h: New file.
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* sysdeps/powerpc/powerpc64/bits/atomic.h: New file.
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2003-04-17 Ulrich Drepper <drepper@redhat.com>
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* posix/regex.h: Include <sys/types.h>.
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* signal/sigrelse.c (sigrelse): Use sigdelset and not __sigdelset.
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The signal number must be checked.
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* signal/sighold.c (sighold): Use sigaddset and not __sigaddset.
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19
elf/Makefile
19
elf/Makefile
@ -69,7 +69,9 @@ distribute := rtld-Rules \
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unwind-dw2.c unwind-dw2-fde.c unwind.h unwind-pe.h \
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unwind-dw2-fde.h dwarf2.h dl-procinfo.c tls.h dl-tls.h \
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tst-tlsmod1.c tst-tlsmod2.c tst-tlsmod3.c tst-tlsmod4.c \
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tst-tlsmod5.c tst-tlsmod6.c \
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tst-tlsmod5.c tst-tlsmod6.c tst-tlsmod7.c tst-tlsmod8.c \
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tst-tlsmod9.c tst-tlsmod10.c tst-tlsmod11.c \
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tst-tlsmod12.c tst-tls10.h \
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circlemod1.c circlemod1a.c circlemod2.c circlemod2a.c \
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circlemod3.c circlemod3a.c nodlopenmod2.c \
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tls-macros.h \
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@ -142,7 +144,8 @@ tests += loadtest restest1 preloadtest loadfail multiload origtest resolvfail \
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$(tests-nodlopen-$(have-z-nodlopen)) neededtest neededtest2 \
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neededtest3 neededtest4 unload2 lateglobal initfirst global \
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restest2 next dblload dblunload reldep5 reldep6 reldep7 reldep8 \
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circleload1 tst-tls3 tst-tls4 tst-tls5 tst-tls6 tst-tls7 tst-tls8
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circleload1 tst-tls3 tst-tls4 tst-tls5 tst-tls6 tst-tls7 tst-tls8 \
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tst-tls10 tst-tls11 tst-tls12
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# reldep9
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test-srcs = tst-pathopt
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tests-vis-yes = vismain
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@ -163,7 +166,8 @@ modules-names = testobj1 testobj2 testobj3 testobj4 testobj5 testobj6 \
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reldep6mod0 reldep6mod1 reldep6mod2 reldep6mod3 reldep6mod4 \
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reldep7mod1 reldep7mod2 \
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tst-tlsmod1 tst-tlsmod2 tst-tlsmod3 tst-tlsmod4 \
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tst-tlsmod5 tst-tlsmod6 \
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tst-tlsmod5 tst-tlsmod6 tst-tlsmod7 tst-tlsmod8 \
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tst-tlsmod9 tst-tlsmod10 tst-tlsmod11 tst-tlsmod12 \
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circlemod1 circlemod1a circlemod2 circlemod2a \
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circlemod3 circlemod3a \
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reldep8mod1 reldep8mod2 reldep8mod3 \
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@ -376,6 +380,9 @@ $(objpfx)reldep6mod2.so: $(objpfx)reldep6mod1.so
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$(objpfx)reldep6mod3.so: $(objpfx)reldep6mod2.so
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$(objpfx)reldep6mod4.so: $(objpfx)reldep6mod1.so
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$(objpfx)tst-tlsmod3.so: $(objpfx)tst-tlsmod2.so
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$(objpfx)tst-tlsmod8.so: $(objpfx)tst-tlsmod7.so
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$(objpfx)tst-tlsmod10.so: $(objpfx)tst-tlsmod9.so
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$(objpfx)tst-tlsmod12.so: $(objpfx)tst-tlsmod11.so
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# For tst-tls9-static, make sure the modules it dlopens have libc.so in DT_NEEDED
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$(objpfx)tst-tlsmod5.so: $(common-objpfx)libc.so
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$(objpfx)tst-tlsmod6.so: $(common-objpfx)libc.so
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@ -577,6 +584,12 @@ $(objpfx)tst-tls8.out: $(objpfx)tst-tlsmod3.so $(objpfx)tst-tlsmod4.so
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$(objpfx)tst-tls9: $(libdl)
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$(objpfx)tst-tls9.out: $(objpfx)tst-tlsmod5.so $(objpfx)tst-tlsmod6.so
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$(objpfx)tst-tls10: $(objpfx)tst-tlsmod8.so
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$(objpfx)tst-tls11: $(objpfx)tst-tlsmod10.so
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$(objpfx)tst-tls12: $(objpfx)tst-tlsmod12.so
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ifdef libdl
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$(objpfx)tst-tls9-static: $(common-objpfx)dlfcn/libdl.a
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$(objpfx)tst-tls9-static.out: $(objpfx)tst-tlsmod5.so $(objpfx)tst-tlsmod6.so
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40
elf/tst-tls10.c
Normal file
40
elf/tst-tls10.c
Normal file
@ -0,0 +1,40 @@
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#include "tst-tls10.h"
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#ifdef USE_TLS__THREAD
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static __thread int dummy = 12;
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__thread struct A local = { 1, 2, 3 };
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#endif
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#define CHECK(N, S) \
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p = f##N##a (); \
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if (p->a != S || p->b != S + 1 || p->c != S + 2) \
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abort ()
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int
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main (void)
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{
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#ifdef USE_TLS__THREAD
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struct A *p;
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if (local.a != 1 || local.b != 2 || local.c != 3)
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abort ();
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if (a1.a != 4 || a1.b != 5 || a1.c != 6)
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abort ();
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if (a2.a != 22 || a2.b != 23 || a2.c != 24)
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abort ();
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if (a3.a != 10 || a3.b != 11 || a3.c != 12)
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abort ();
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if (a4.a != 25 || a4.b != 26 || a4.c != 27)
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abort ();
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check1 ();
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check2 ();
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if (f1a () != &a1 || f2a () != &a2 || f3a () != &a3 || f4a () != &a4)
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abort ();
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CHECK (5, 16);
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CHECK (6, 19);
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if (f7a () != &a2 || f8a () != &a4)
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abort ();
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CHECK (9, 28);
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CHECK (10, 31);
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#endif
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exit (0);
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}
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38
elf/tst-tls10.h
Normal file
38
elf/tst-tls10.h
Normal file
@ -0,0 +1,38 @@
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#include <tls.h>
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#include <stdlib.h>
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#if defined USE_TLS && defined HAVE___THREAD \
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&& defined HAVE_TLS_MODEL_ATTRIBUTE
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# define USE_TLS__THREAD
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struct A
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{
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char a;
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int b;
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long long c;
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};
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extern __thread struct A a1, a2, a3, a4;
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extern struct A *f1a (void);
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extern struct A *f2a (void);
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extern struct A *f3a (void);
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extern struct A *f4a (void);
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extern struct A *f5a (void);
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extern struct A *f6a (void);
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extern struct A *f7a (void);
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extern struct A *f8a (void);
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extern struct A *f9a (void);
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extern struct A *f10a (void);
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extern int f1b (void);
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extern int f2b (void);
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extern int f3b (void);
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extern int f4b (void);
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extern int f5b (void);
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extern int f6b (void);
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extern int f7b (void);
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extern int f8b (void);
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extern int f9b (void);
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extern int f10b (void);
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extern void check1 (void);
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extern void check2 (void);
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#endif
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27
elf/tst-tls11.c
Normal file
27
elf/tst-tls11.c
Normal file
@ -0,0 +1,27 @@
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#include "tst-tls10.h"
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#define CHECK(N, S) \
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p = f##N##a (); \
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if (p->a != S || p->b != S + 1 || p->c != S + 2) \
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abort ()
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int
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main (void)
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{
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#ifdef USE_TLS__THREAD
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struct A *p;
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check1 ();
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check2 ();
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CHECK (1, 4);
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CHECK (2, 22);
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CHECK (3, 10);
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CHECK (4, 25);
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CHECK (5, 16);
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CHECK (6, 19);
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CHECK (7, 22);
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CHECK (8, 25);
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CHECK (9, 28);
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CHECK (10, 31);
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#endif
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exit (0);
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}
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17
elf/tst-tls12.c
Normal file
17
elf/tst-tls12.c
Normal file
@ -0,0 +1,17 @@
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#include "tst-tls10.h"
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#define CHECK(N, S) \
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p = &a##N; \
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if (p->a != S || p->b != S + 1 || p->c != S + 2) \
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abort ()
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int main()
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{
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#ifdef USE_TLS__THREAD
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struct A *p;
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check1 ();
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CHECK (1, 4);
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CHECK (2, 7);
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#endif
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exit (0);
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}
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1
elf/tst-tlsmod10.c
Normal file
1
elf/tst-tlsmod10.c
Normal file
@ -0,0 +1 @@
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#include "tst-tlsmod8.c"
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6
elf/tst-tlsmod11.c
Normal file
6
elf/tst-tlsmod11.c
Normal file
@ -0,0 +1,6 @@
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#include "tst-tls10.h"
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#ifdef USE_TLS__THREAD
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__thread struct A a1 = { 4, 5, 6 };
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__thread struct A a2 = { 7, 8, 9 };
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#endif
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14
elf/tst-tlsmod12.c
Normal file
14
elf/tst-tlsmod12.c
Normal file
@ -0,0 +1,14 @@
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#include "tst-tls10.h"
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#ifdef USE_TLS__THREAD
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extern __thread struct A a2 __attribute__((tls_model("initial-exec")));
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void
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check1 (void)
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{
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if (a1.a != 4 || a1.b != 5 || a1.c != 6)
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abort ();
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if (a2.a != 7 || a2.b != 8 || a2.c != 9)
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abort ();
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}
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#endif
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103
elf/tst-tlsmod7.c
Normal file
103
elf/tst-tlsmod7.c
Normal file
@ -0,0 +1,103 @@
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#include "tst-tls10.h"
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#ifdef USE_TLS__THREAD
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static __thread int dummy = 12;
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__thread struct A a1 = { 4, 5, 6 };
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__thread struct A a2 = { 7, 8, 9 };
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__thread struct A a3 __attribute__((tls_model("initial-exec")))
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= { 10, 11, 12 };
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__thread struct A a4 __attribute__((tls_model("initial-exec")))
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= { 13, 14, 15 };
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static __thread struct A local1 = { 16, 17, 18 };
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static __thread struct A local2 __attribute__((tls_model("initial-exec")))
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= { 19, 20, 21 };
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void
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check1 (void)
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{
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if (a1.a != 4 || a1.b != 5 || a1.c != 6)
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abort ();
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if (a2.a != 22 || a2.b != 23 || a2.c != 24)
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abort ();
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if (a3.a != 10 || a3.b != 11 || a3.c != 12)
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abort ();
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if (a4.a != 25 || a4.b != 26 || a4.c != 27)
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abort ();
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if (local1.a != 16 || local1.b != 17 || local1.c != 18)
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abort ();
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if (local2.a != 19 || local2.b != 20 || local2.c != 21)
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abort ();
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}
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struct A *
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f1a (void)
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{
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return &a1;
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}
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struct A *
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f2a (void)
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{
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return &a2;
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}
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struct A *
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f3a (void)
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{
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return &a3;
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}
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struct A *
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f4a (void)
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{
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return &a4;
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}
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struct A *
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f5a (void)
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{
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return &local1;
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}
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struct A *
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f6a (void)
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{
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return &local2;
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}
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int
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f1b (void)
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{
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return a1.a;
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}
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int
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f2b (void)
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{
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return a2.b;
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}
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int
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f3b (void)
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{
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return a3.c;
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}
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int
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f4b (void)
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{
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return a4.a;
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}
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int
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f5b (void)
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{
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return local1.b;
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}
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int
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f6b (void)
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{
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return local2.c;
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}
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#endif
|
72
elf/tst-tlsmod8.c
Normal file
72
elf/tst-tlsmod8.c
Normal file
@ -0,0 +1,72 @@
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#include "tst-tls10.h"
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#ifdef USE_TLS__THREAD
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static __thread long long dummy = 12;
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__thread struct A a2 = { 22, 23, 24 };
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__thread struct A a4 __attribute__((tls_model("initial-exec")))
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= { 25, 26, 27 };
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static __thread struct A local1 = { 28, 29, 30 };
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static __thread struct A local2 __attribute__((tls_model("initial-exec")))
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= { 31, 32, 33 };
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void
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check2 (void)
|
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{
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if (a2.a != 22 || a2.b != 23 || a2.c != 24)
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abort ();
|
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if (a4.a != 25 || a4.b != 26 || a4.c != 27)
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abort ();
|
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if (local1.a != 28 || local1.b != 29 || local1.c != 30)
|
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abort ();
|
||||
if (local2.a != 31 || local2.b != 32 || local2.c != 33)
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abort ();
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||||
}
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||||
|
||||
struct A *
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f7a (void)
|
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{
|
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return &a2;
|
||||
}
|
||||
|
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struct A *
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f8a (void)
|
||||
{
|
||||
return &a4;
|
||||
}
|
||||
|
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struct A *
|
||||
f9a (void)
|
||||
{
|
||||
return &local1;
|
||||
}
|
||||
|
||||
struct A *
|
||||
f10a (void)
|
||||
{
|
||||
return &local2;
|
||||
}
|
||||
|
||||
int
|
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f7b (void)
|
||||
{
|
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return a2.b;
|
||||
}
|
||||
|
||||
int
|
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f8b (void)
|
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{
|
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return a4.a;
|
||||
}
|
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|
||||
int
|
||||
f9b (void)
|
||||
{
|
||||
return local1.b;
|
||||
}
|
||||
|
||||
int
|
||||
f10b (void)
|
||||
{
|
||||
return local2.c;
|
||||
}
|
||||
#endif
|
101
elf/tst-tlsmod9.c
Normal file
101
elf/tst-tlsmod9.c
Normal file
@ -0,0 +1,101 @@
|
||||
#include "tst-tls10.h"
|
||||
|
||||
#ifdef USE_TLS__THREAD
|
||||
static __thread int dummy = 12;
|
||||
__thread struct A a1 = { 4, 5, 6 };
|
||||
__thread struct A a3 __attribute__((tls_model("initial-exec")))
|
||||
= { 10, 11, 12 };
|
||||
extern __thread struct A a4 __attribute__((tls_model("initial-exec")));
|
||||
static __thread struct A local1 = { 16, 17, 18 };
|
||||
static __thread struct A local2 __attribute__((tls_model("initial-exec")))
|
||||
= { 19, 20, 21 };
|
||||
|
||||
void
|
||||
check1 (void)
|
||||
{
|
||||
if (a1.a != 4 || a1.b != 5 || a1.c != 6)
|
||||
abort ();
|
||||
if (a2.a != 22 || a2.b != 23 || a2.c != 24)
|
||||
abort ();
|
||||
if (a3.a != 10 || a3.b != 11 || a3.c != 12)
|
||||
abort ();
|
||||
if (a4.a != 25 || a4.b != 26 || a4.c != 27)
|
||||
abort ();
|
||||
if (local1.a != 16 || local1.b != 17 || local1.c != 18)
|
||||
abort ();
|
||||
if (local2.a != 19 || local2.b != 20 || local2.c != 21)
|
||||
abort ();
|
||||
}
|
||||
|
||||
struct A *
|
||||
f1a (void)
|
||||
{
|
||||
return &a1;
|
||||
}
|
||||
|
||||
struct A *
|
||||
f2a (void)
|
||||
{
|
||||
return &a2;
|
||||
}
|
||||
|
||||
struct A *
|
||||
f3a (void)
|
||||
{
|
||||
return &a3;
|
||||
}
|
||||
|
||||
struct A *
|
||||
f4a (void)
|
||||
{
|
||||
return &a4;
|
||||
}
|
||||
|
||||
struct A *
|
||||
f5a (void)
|
||||
{
|
||||
return &local1;
|
||||
}
|
||||
|
||||
struct A *
|
||||
f6a (void)
|
||||
{
|
||||
return &local2;
|
||||
}
|
||||
|
||||
int
|
||||
f1b (void)
|
||||
{
|
||||
return a1.a;
|
||||
}
|
||||
|
||||
int
|
||||
f2b (void)
|
||||
{
|
||||
return a2.b;
|
||||
}
|
||||
|
||||
int
|
||||
f3b (void)
|
||||
{
|
||||
return a3.c;
|
||||
}
|
||||
|
||||
int
|
||||
f4b (void)
|
||||
{
|
||||
return a4.a;
|
||||
}
|
||||
|
||||
int
|
||||
f5b (void)
|
||||
{
|
||||
return local1.b;
|
||||
}
|
||||
|
||||
int
|
||||
f6b (void)
|
||||
{
|
||||
return local2.c;
|
||||
}
|
||||
#endif
|
@ -1,6 +1,6 @@
|
||||
/* Definitions for data structures and routines for the regular
|
||||
expression library.
|
||||
Copyright (C) 1985,1989-93,1995-98,2000,2001,2002
|
||||
Copyright (C) 1985,1989-93,1995-98,2000,2001,2002,2003
|
||||
Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
|
||||
@ -22,6 +22,8 @@
|
||||
#ifndef _REGEX_H
|
||||
#define _REGEX_H 1
|
||||
|
||||
#include <sys/types.h>
|
||||
|
||||
/* Allow the use in C++ code. */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
|
@ -1,4 +1,4 @@
|
||||
/* Atomic operations. PowerPC version.
|
||||
/* Atomic operations. PowerPC Common version.
|
||||
Copyright (C) 2003 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003.
|
||||
@ -18,18 +18,17 @@
|
||||
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
|
||||
02111-1307 USA. */
|
||||
|
||||
/*
|
||||
* Never include sysdeps/powerpc/bits/atomic.h directly.
|
||||
* Alway use include/atomic.h which will include either
|
||||
* sysdeps/powerpc/powerpc32/bits/atomic.h
|
||||
* or
|
||||
* sysdeps/powerpc/powerpc64/bits/atomic.h
|
||||
* as appropriate and which in turn include this file.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef int8_t atomic8_t;
|
||||
typedef uint8_t uatomic8_t;
|
||||
typedef int_fast8_t atomic_fast8_t;
|
||||
typedef uint_fast8_t uatomic_fast8_t;
|
||||
|
||||
typedef int16_t atomic16_t;
|
||||
typedef uint16_t uatomic16_t;
|
||||
typedef int_fast16_t atomic_fast16_t;
|
||||
typedef uint_fast16_t uatomic_fast16_t;
|
||||
|
||||
typedef int32_t atomic32_t;
|
||||
typedef uint32_t uatomic32_t;
|
||||
typedef int_fast32_t atomic_fast32_t;
|
||||
@ -45,7 +44,10 @@ typedef uintptr_t uatomicptr_t;
|
||||
typedef intmax_t atomic_max_t;
|
||||
typedef uintmax_t uatomic_max_t;
|
||||
|
||||
|
||||
/*
|
||||
* Powerpc does not have byte and halfword forms of load and reserve and
|
||||
* store conditional. So for powerpc we stub out the 8- and 16-bit forms.
|
||||
*/
|
||||
#define __arch_compare_and_exchange_bool_8_acq(mem, newval, oldval) \
|
||||
(abort (), 0)
|
||||
|
||||
@ -60,146 +62,14 @@ typedef uintmax_t uatomic_max_t;
|
||||
# define __ARCH_REL_INSTR "sync"
|
||||
#endif
|
||||
|
||||
#define atomic_full_barrier() __asm ("sync" ::: "memory")
|
||||
#define atomic_write_barrier() __asm ("eieio" ::: "memory")
|
||||
|
||||
/*
|
||||
* XXX At present these have both acquire and release semantics.
|
||||
* Ultimately we should do separate _acq and _rel versions.
|
||||
*/
|
||||
|
||||
#ifdef __powerpc64__
|
||||
|
||||
/*
|
||||
* The 32-bit exchange_bool is different on powerpc64 because the subf
|
||||
* does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
|
||||
* (a load word and zero (high 32) form).
|
||||
* In powerpc64 register values are 64-bit by default, including oldval.
|
||||
* Net we need to extend sign word the result of lwarx to 64-bit so the
|
||||
* 64-bit subtract from gives the expected result and sets the condition
|
||||
* correctly.
|
||||
*/
|
||||
# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
unsigned int __tmp; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: lwarx %0,0,%1\n" \
|
||||
" extsw %0,%0\n" \
|
||||
" subf. %0,%2,%0\n" \
|
||||
" bne 2f\n" \
|
||||
" stwcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (mem), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp != 0; \
|
||||
})
|
||||
|
||||
# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
unsigned long __tmp; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: ldarx %0,0,%1\n" \
|
||||
" subf. %0,%2,%0\n" \
|
||||
" bne 2f\n" \
|
||||
" stdcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (mem), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp != 0; \
|
||||
})
|
||||
|
||||
#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
__typeof (*(mem)) __tmp; \
|
||||
__typeof (mem) __memp = (mem); \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: ldarx %0,0,%1\n" \
|
||||
" cmpd %0,%2\n" \
|
||||
" bne 2f\n" \
|
||||
" stdcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (__memp), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp; \
|
||||
})
|
||||
|
||||
# define __arch_atomic_exchange_64(mem, value) \
|
||||
({ \
|
||||
__typeof (*mem) __val; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: ldarx %0,0,%2\n" \
|
||||
" stdcx. %3,0,%2\n" \
|
||||
" bne- 1b" \
|
||||
: "=&r" (__val), "=m" (*mem) \
|
||||
: "b" (mem), "r" (value), "1" (*mem) \
|
||||
: "cr0"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
# define __arch_atomic_exchange_and_add_64(mem, value) \
|
||||
({ \
|
||||
__typeof (*mem) __val, __tmp; \
|
||||
__asm __volatile ("1: ldarx %0,0,%3\n" \
|
||||
" add %1,%0,%4\n" \
|
||||
" stdcx. %1,0,%3\n" \
|
||||
" bne- 1b" \
|
||||
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
|
||||
: "b" (mem), "r" (value), "2" (*mem) \
|
||||
: "cr0"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
# define __arch_atomic_decrement_if_positive_64(mem) \
|
||||
({ int __val, __tmp; \
|
||||
__asm __volatile ("1: ldarx %0,0,%3\n" \
|
||||
" cmpdi 0,%0,0\n" \
|
||||
" addi %1,%0,-1\n" \
|
||||
" ble 2f\n" \
|
||||
" stdcx. %1,0,%3\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
|
||||
: "b" (mem), "2" (*mem) \
|
||||
: "cr0"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
#else /* powerpc32 */
|
||||
# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
unsigned int __tmp; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: lwarx %0,0,%1\n" \
|
||||
" subf. %0,%2,%0\n" \
|
||||
" bne 2f\n" \
|
||||
" stwcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (mem), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp != 0; \
|
||||
})
|
||||
|
||||
# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
|
||||
(abort (), 0)
|
||||
|
||||
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
|
||||
(abort (), 0)
|
||||
|
||||
# define __arch_atomic_exchange_64(mem, value) \
|
||||
({ abort (); (*mem) = (value); })
|
||||
|
||||
# define __arch_atomic_exchange_and_add_64(mem, value) \
|
||||
({ abort (); (*mem) = (value); })
|
||||
|
||||
# define __arch_atomic_decrement_if_positive_64(mem) \
|
||||
({ abort (); (*mem)--; })
|
||||
#endif
|
||||
|
||||
#define __arch_compare_and_exchange_val_32_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
__typeof (*(mem)) __tmp; \
|
||||
@ -308,11 +178,3 @@ typedef uintmax_t uatomic_max_t;
|
||||
__result; \
|
||||
})
|
||||
|
||||
|
||||
#define atomic_full_barrier() __asm ("sync" ::: "memory")
|
||||
#ifdef __powerpc64__
|
||||
# define atomic_read_barrier() __asm ("lwsync" ::: "memory")
|
||||
#else
|
||||
# define atomic_read_barrier() __asm ("sync" ::: "memory")
|
||||
#endif
|
||||
#define atomic_write_barrier() __asm ("eieio" ::: "memory")
|
||||
|
75
sysdeps/powerpc/powerpc32/bits/atomic.h
Normal file
75
sysdeps/powerpc/powerpc32/bits/atomic.h
Normal file
@ -0,0 +1,75 @@
|
||||
/* Atomic operations. PowerPC32 version.
|
||||
Copyright (C) 2003 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, write to the Free
|
||||
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
|
||||
02111-1307 USA. */
|
||||
|
||||
/*
|
||||
* The 32-bit exchange_bool is different on powerpc64 because the subf
|
||||
* does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
|
||||
* (a load word and zero (high 32) form). So powerpc64 has a slightly
|
||||
* different version in sysdeps/powerpc/powerpc64/bits/atomic.h.
|
||||
*/
|
||||
# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
unsigned int __tmp; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: lwarx %0,0,%1\n" \
|
||||
" subf. %0,%2,%0\n" \
|
||||
" bne 2f\n" \
|
||||
" stwcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (mem), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp != 0; \
|
||||
})
|
||||
|
||||
/*
|
||||
* Powerpc32 processors don't implement the 64-bit (doubleword) forms of
|
||||
* load and reserve (ldarx) and store conditional (stdcx.) instructions.
|
||||
* So for powerpc32 we stub out the 64-bit forms.
|
||||
*/
|
||||
# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
|
||||
(abort (), 0)
|
||||
|
||||
# define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
|
||||
(abort (), 0)
|
||||
|
||||
# define __arch_atomic_exchange_64(mem, value) \
|
||||
({ abort (); (*mem) = (value); })
|
||||
|
||||
# define __arch_atomic_exchange_and_add_64(mem, value) \
|
||||
({ abort (); (*mem) = (value); })
|
||||
|
||||
# define __arch_atomic_decrement_if_positive_64(mem) \
|
||||
({ abort (); (*mem)--; })
|
||||
|
||||
/*
|
||||
* Older powerpc32 processors don't support the new "light weight"
|
||||
* sync (lwsync). So the only safe option is to use normal sync
|
||||
* for all powerpc32 applications.
|
||||
*/
|
||||
# define atomic_read_barrier() __asm ("sync" ::: "memory")
|
||||
|
||||
/*
|
||||
* Include the rest of the atomic ops macros which are common to both
|
||||
* powerpc32 and powerpc64.
|
||||
*/
|
||||
#include_next <bits/atomic.h>
|
||||
|
135
sysdeps/powerpc/powerpc64/bits/atomic.h
Normal file
135
sysdeps/powerpc/powerpc64/bits/atomic.h
Normal file
@ -0,0 +1,135 @@
|
||||
/* Atomic operations. PowerPC64 version.
|
||||
Copyright (C) 2003 Free Software Foundation, Inc.
|
||||
This file is part of the GNU C Library.
|
||||
Contributed by Paul Mackerras <paulus@au.ibm.com>, 2003.
|
||||
|
||||
The GNU C Library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
The GNU C Library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General Public
|
||||
License along with the GNU C Library; if not, write to the Free
|
||||
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
|
||||
02111-1307 USA. */
|
||||
|
||||
/*
|
||||
* The 32-bit exchange_bool is different on powerpc64 because the subf
|
||||
* does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
|
||||
* (a load word and zero (high 32) form) load.
|
||||
* In powerpc64 register values are 64-bit by default, including oldval.
|
||||
* Net we need to extend sign word the result of lwarx to 64-bit so the
|
||||
* 64-bit subtract from gives the expected result and sets the condition
|
||||
* correctly.
|
||||
*/
|
||||
# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
unsigned int __tmp; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: lwarx %0,0,%1\n" \
|
||||
" extsw %0,%0\n" \
|
||||
" subf. %0,%2,%0\n" \
|
||||
" bne 2f\n" \
|
||||
" stwcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (mem), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp != 0; \
|
||||
})
|
||||
|
||||
/*
|
||||
* Only powerpc64 processors support Load doubleword and reserve index (ldarx)
|
||||
* and Store doubleword conditional indexed (stdcx) instructions. So here
|
||||
* we define the 64-bit forms.
|
||||
*/
|
||||
# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
unsigned long __tmp; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: ldarx %0,0,%1\n" \
|
||||
" subf. %0,%2,%0\n" \
|
||||
" bne 2f\n" \
|
||||
" stdcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (mem), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp != 0; \
|
||||
})
|
||||
|
||||
#define __arch_compare_and_exchange_val_64_acq(mem, newval, oldval) \
|
||||
({ \
|
||||
__typeof (*(mem)) __tmp; \
|
||||
__typeof (mem) __memp = (mem); \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: ldarx %0,0,%1\n" \
|
||||
" cmpd %0,%2\n" \
|
||||
" bne 2f\n" \
|
||||
" stdcx. %3,0,%1\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&r" (__tmp) \
|
||||
: "b" (__memp), "r" (oldval), "r" (newval) \
|
||||
: "cr0", "memory"); \
|
||||
__tmp; \
|
||||
})
|
||||
|
||||
# define __arch_atomic_exchange_64(mem, value) \
|
||||
({ \
|
||||
__typeof (*mem) __val; \
|
||||
__asm __volatile (__ARCH_REL_INSTR "\n" \
|
||||
"1: ldarx %0,0,%2\n" \
|
||||
" stdcx. %3,0,%2\n" \
|
||||
" bne- 1b" \
|
||||
: "=&r" (__val), "=m" (*mem) \
|
||||
: "b" (mem), "r" (value), "1" (*mem) \
|
||||
: "cr0"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
# define __arch_atomic_exchange_and_add_64(mem, value) \
|
||||
({ \
|
||||
__typeof (*mem) __val, __tmp; \
|
||||
__asm __volatile ("1: ldarx %0,0,%3\n" \
|
||||
" add %1,%0,%4\n" \
|
||||
" stdcx. %1,0,%3\n" \
|
||||
" bne- 1b" \
|
||||
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
|
||||
: "b" (mem), "r" (value), "2" (*mem) \
|
||||
: "cr0"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
# define __arch_atomic_decrement_if_positive_64(mem) \
|
||||
({ int __val, __tmp; \
|
||||
__asm __volatile ("1: ldarx %0,0,%3\n" \
|
||||
" cmpdi 0,%0,0\n" \
|
||||
" addi %1,%0,-1\n" \
|
||||
" ble 2f\n" \
|
||||
" stdcx. %1,0,%3\n" \
|
||||
" bne- 1b\n" \
|
||||
"2: " __ARCH_ACQ_INSTR \
|
||||
: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
|
||||
: "b" (mem), "2" (*mem) \
|
||||
: "cr0"); \
|
||||
__val; \
|
||||
})
|
||||
|
||||
/*
|
||||
* All powerpc64 processors support the new "light weight" sync (lwsync).
|
||||
*/
|
||||
# define atomic_read_barrier() __asm ("lwsync" ::: "memory")
|
||||
|
||||
/*
|
||||
* Include the rest of the atomic ops macros which are common to both
|
||||
* powerpc32 and powerpc64.
|
||||
*/
|
||||
#include_next <bits/atomic.h>
|
Loading…
Reference in New Issue
Block a user