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Update.
2003-03-27 Steven Munroe <sjmunroe@us.ibm.com> * sysdeps/powerpc/bits/atomic.h (__arch_compare_and_exchange_bool_32_acq): Move to [!__powerpc64__]. [__powerpc64__] (__arch_compare_and_exchange_bool_32_acq): Define PPC64 specific version. [__powerpc64__] (__arch_compare_and_exchange_bool_64_acq): Change (mem) constraint to "b". [__powerpc64__] (__arch_atomic_exchange_and add_64): Replace addi with add. Change (value) contraint to "r". Change (mem) constraint to "b". [__powerpc64__] (__arch_atomic_decrement_if_positive_64): New macro. (__arch_atomic_exchange_32): Change (mem) constraint to "b". (__arch_atomic_exchange_and_add_32): Change (mem) constraint to "b". (__arch_atomic_decrement_if_positive_32): New macro. (atomic_decrement_if_positive): Use __arch* macros.
This commit is contained in:
Ulrich Drepper
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d5527b1774
commit
3171ae9909
17
ChangeLog
17
ChangeLog
@ -1,3 +1,20 @@
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2003-03-27 Steven Munroe <sjmunroe@us.ibm.com>
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* sysdeps/powerpc/bits/atomic.h
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(__arch_compare_and_exchange_bool_32_acq): Move to [!__powerpc64__].
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[__powerpc64__] (__arch_compare_and_exchange_bool_32_acq):
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Define PPC64 specific version.
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[__powerpc64__] (__arch_compare_and_exchange_bool_64_acq):
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Change (mem) constraint to "b".
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[__powerpc64__] (__arch_atomic_exchange_and add_64):
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Replace addi with add. Change (value) contraint to "r".
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Change (mem) constraint to "b".
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[__powerpc64__] (__arch_atomic_decrement_if_positive_64): New macro.
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(__arch_atomic_exchange_32): Change (mem) constraint to "b".
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(__arch_atomic_exchange_and_add_32): Change (mem) constraint to "b".
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(__arch_atomic_decrement_if_positive_32): New macro.
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(atomic_decrement_if_positive): Use __arch* macros.
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2003-03-27 Jakub Jelinek <jakub@redhat.com>
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* sysdeps/ia64/fpu/libm-test-ulps: Update.
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@ -333,11 +333,13 @@ ifloat: 1
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Test "Real part of: ctan (-2 - 3 i) == 0.376402564150424829275122113032269084e-2 - 1.00323862735360980144635859782192726 i":
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double: 1
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idouble: 1
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ildouble: 436
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ldouble: 436
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ildouble: 2
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ldouble: 2
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Test "Imaginary part of: ctan (-2 - 3 i) == 0.376402564150424829275122113032269084e-2 - 1.00323862735360980144635859782192726 i":
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float: 1
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ifloat: 1
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ildouble: 1
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ldouble: 1
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Test "Real part of: ctan (0.75 + 1.25 i) == 0.160807785916206426725166058173438663 + 0.975363285031235646193581759755216379 i":
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ildouble: 1
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ldouble: 1
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@ -968,14 +970,16 @@ ifloat: 1
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Function: Real part of "ctan":
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double: 1
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idouble: 1
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ildouble: 436
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ldouble: 436
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ildouble: 2
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ldouble: 2
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Function: Imaginary part of "ctan":
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double: 1
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float: 1
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idouble: 1
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ifloat: 1
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ildouble: 1
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ldouble: 1
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Function: Real part of "ctanh":
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double: 1
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@ -65,27 +65,34 @@ typedef uintmax_t uatomic_max_t;
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* Ultimately we should do separate _acq and _rel versions.
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*/
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#ifdef __powerpc64__
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/*
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* XXX this may not work properly on 64-bit if the register
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* containing oldval has the high half non-zero for some reason.
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* The 32-bit exchange_bool is different on powerpc64 because the subf
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* does signed 64-bit arthmatic while the lwarx is 32-bit unsigned
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* (a load word and zero (high 32) form).
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* In powerpc64 register values are 64-bit by default, including oldval.
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* Net we need to extend sign word the result of lwarx to 64-bit so the
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* 64-bit subtract from gives the expected result and sets the condition
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* correctly.
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*/
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#define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
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# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
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({ \
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unsigned int __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%1\n" \
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" extsw %0,%0\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&r" (__tmp) \
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: "r" (mem), "r" (oldval), "r" (newval) \
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: "b" (mem), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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#ifdef __powerpc64__
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# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
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({ \
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unsigned long __tmp; \
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@ -97,7 +104,7 @@ typedef uintmax_t uatomic_max_t;
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&r" (__tmp) \
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: "r" (mem), "r" (oldval), "r" (newval) \
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: "b" (mem), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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@ -110,7 +117,7 @@ typedef uintmax_t uatomic_max_t;
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" stdcx. %3,0,%2\n" \
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" bne- 1b" \
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: "=&r" (__val), "=m" (*mem) \
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: "r" (mem), "r" (value), "1" (*mem) \
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: "b" (mem), "r" (value), "1" (*mem) \
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: "cr0"); \
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__val; \
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})
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@ -119,16 +126,47 @@ typedef uintmax_t uatomic_max_t;
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({ \
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__typeof (*mem) __val, __tmp; \
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__asm __volatile ("1: ldarx %0,0,%3\n" \
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" addi %1,%0,%4\n" \
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" add %1,%0,%4\n" \
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" stdcx. %1,0,%3\n" \
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" bne- 1b" \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "r" (mem), "I" (value), "2" (*mem) \
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: "b" (mem), "r" (value), "2" (*mem) \
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: "cr0"); \
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__val; \
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})
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# define __arch_atomic_decrement_if_positive_64(mem) \
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({ int __val, __tmp; \
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__asm __volatile ("1: ldarx %0,0,%3\n" \
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" cmpdi 0,%0,0\n" \
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" addi %1,%0,-1\n" \
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" ble 2f\n" \
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" stdcx. %1,0,%3\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "b" (mem), "2" (*mem) \
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: "cr0"); \
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__val; \
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})
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#else /* powerpc32 */
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# define __arch_compare_and_exchange_bool_32_acq(mem, newval, oldval) \
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({ \
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unsigned int __tmp; \
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__asm __volatile (__ARCH_REL_INSTR "\n" \
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"1: lwarx %0,0,%1\n" \
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" subf. %0,%2,%0\n" \
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" bne 2f\n" \
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" stwcx. %3,0,%1\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&r" (__tmp) \
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: "b" (mem), "r" (oldval), "r" (newval) \
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: "cr0", "memory"); \
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__tmp != 0; \
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})
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# define __arch_compare_and_exchange_bool_64_acq(mem, newval, oldval) \
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(abort (), 0)
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@ -136,6 +174,8 @@ typedef uintmax_t uatomic_max_t;
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({ abort (); (*mem) = (value); })
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# define __arch_atomic_exchange_and_add_64(mem, value) \
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({ abort (); (*mem) = (value); })
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# define __arch_atomic_decrement_if_positive_64(mem) \
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({ abort (); (*mem) = (value); })
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#endif
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#define __arch_atomic_exchange_32(mem, value) \
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@ -146,7 +186,7 @@ typedef uintmax_t uatomic_max_t;
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" stwcx. %3,0,%2\n" \
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" bne- 1b" \
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: "=&r" (__val), "=m" (*mem) \
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: "r" (mem), "r" (value), "1" (*mem) \
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: "b" (mem), "r" (value), "1" (*mem) \
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: "cr0"); \
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__val; \
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})
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@ -159,10 +199,26 @@ typedef uintmax_t uatomic_max_t;
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" stwcx. %1,0,%3\n" \
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" bne- 1b" \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "r" (mem), "r" (value), "2" (*mem) \
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: "b" (mem), "r" (value), "2" (*mem) \
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: "cr0"); \
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__val; \
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})
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#define __arch_atomic_decrement_if_positive_32(mem) \
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({ int __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3\n" \
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" cmpwi 0,%0,0\n" \
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" addi %1,%0,-1\n" \
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" ble 2f\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "b" (mem), "2" (*mem) \
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: "cr0"); \
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__val; \
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})
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#define atomic_exchange(mem, value) \
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({ \
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@ -191,20 +247,14 @@ typedef uintmax_t uatomic_max_t;
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/* Decrement *MEM if it is > 0, and return the old value. */
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#define atomic_decrement_if_positive(mem) \
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({ if (sizeof (*mem) != 4) \
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({ __typeof (*(mem)) __result; \
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if (sizeof (*mem) == 4) \
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__result = __arch_atomic_decrement_if_positive_32 (mem); \
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else if (sizeof (*mem) == 8) \
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__result = __arch_atomic_decrement_if_positive_64 (mem); \
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else \
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abort (); \
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int __val, __tmp; \
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__asm __volatile ("1: lwarx %0,0,%3\n" \
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" cmpwi 0,%0,0\n" \
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" addi %1,%0,-1\n" \
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" ble 2f\n" \
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" stwcx. %1,0,%3\n" \
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" bne- 1b\n" \
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"2: " __ARCH_ACQ_INSTR \
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: "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
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: "r" (mem), "2" (*mem) \
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: "cr0"); \
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__val; \
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__result; \
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})
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