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The exception defines in <fenv.h> do not match the exception bits in the FPU status register on hppa-linux and hppa64-hpux11.11. On linux, they match the trap enable bits. On 64-bit hpux, they match the exception bits for IA64. The IA64 bits are in a different order and location than HPPA. HP uses table look ups to reorder the bits in code to test and raise exceptions. All the architectures that I looked at just pass the FPU status register to __atomic_feraiseexcept(). The simplest approach for hppa is to define FE_INEXACT, etc, to match the status register and not include <fenv.h>.. 2024-02-03 John David Anglin <danglin@gcc.gnu.org> libatomic/ChangeLog: PR target/59778 * configure.tgt (hppa*): Set ARCH. * config/pa/fenv.c: New file.
204 lines
5.1 KiB
Bash
204 lines
5.1 KiB
Bash
# -*- shell-script -*-
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# Copyright (C) 2012-2024 Free Software Foundation, Inc.
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# Contributed by Richard Henderson <rth@redhat.com>.
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#
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# This file is part of the GNU Atomic Library (libatomic).
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#
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# Libatomic is free software; you can redistribute it and/or modify it
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# under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY
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# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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# FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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# more details.
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#
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# Under Section 7 of GPL version 3, you are granted additional
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# permissions described in the GCC Runtime Library Exception, version
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# 3.1, as published by the Free Software Foundation.
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#
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# You should have received a copy of the GNU General Public License and
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# a copy of the GCC Runtime Library Exception along with this program;
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# see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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# <http://www.gnu.org/licenses/>.
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# Map the target cpu to an ARCH sub-directory. At the same time,
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# work out any special compilation flags as necessary.
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# Give operating systems the opportunity to discard XCFLAGS modifications based
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# on ${target_cpu}. For example to allow proper use of multilibs.
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configure_tgt_pre_target_cpu_XCFLAGS="${XCFLAGS}"
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case "${target_cpu}" in
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alpha*)
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# fenv.c needs this option to generate inexact exceptions.
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XCFLAGS="${XCFLAGS} -mfp-trap-mode=sui"
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ARCH=alpha
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;;
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hppa*) ARCH=pa ;;
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rs6000 | powerpc*) ARCH=powerpc ;;
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riscv*) ARCH=riscv ;;
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sh*) ARCH=sh ;;
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aarch64*)
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ARCH=aarch64
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case "${target}" in
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aarch64*-*-linux*)
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if test -n "$enable_aarch64_lse"; then
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try_ifunc=yes
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fi
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;;
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esac
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XCFLAGS="${XCFLAGS} -mno-outline-atomics"
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;;
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arm*)
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ARCH=arm
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case "${target}" in
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arm*-*-freebsd* | arm*-*-netbsd*)
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;;
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*)
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# ??? Detect when -march=armv7 is already enabled.
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try_ifunc=yes
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;;
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esac
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;;
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sparc)
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case " ${CC} ${CFLAGS} " in
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*" -m64 "*)
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;;
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*)
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if test -z "$with_cpu"; then
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XCFLAGS="${XCFLAGS} -mcpu=v9"
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fi
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esac
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ARCH=sparc
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;;
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sparc64|sparcv9)
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case " ${CC} ${CFLAGS} " in
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*" -m32 "*)
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XCFLAGS="${XCFLAGS} -mcpu=v9"
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;;
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esac
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ARCH=sparc
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;;
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i[3456]86 | x86_64)
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cat > conftestx.c <<EOF
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_4
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#error need -march=i486
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#endif
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EOF
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if ${CC} ${CFLAGS} -E conftestx.c > /dev/null 2>&1; then
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:
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else
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if test "${target_cpu}" = x86_64; then
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XCFLAGS="${XCFLAGS} -march=i486 -mtune=generic"
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else
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XCFLAGS="${XCFLAGS} -march=i486 -mtune=${target_cpu}"
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fi
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XCFLAGS="${XCFLAGS} -fomit-frame-pointer"
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fi
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cat > conftestx.c <<EOF
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#ifdef __x86_64__
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#error ifunc is always wanted for 16B atomic load
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#else
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#ifndef __GCC_HAVE_SYNC_COMPARE_AND_SWAP_8
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#error need -march=i686
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#endif
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#endif
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EOF
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if ${CC} ${CFLAGS} -E conftestx.c > /dev/null 2>&1; then
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try_ifunc=no
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else
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try_ifunc=yes
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fi
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rm -f conftestx.c
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ARCH=x86
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;;
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*) ARCH="${target_cpu}" ;;
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esac
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# The cpu configury is always most relevant.
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if test -d ${srcdir}/config/$ARCH ; then
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config_path="$ARCH"
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fi
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tmake_file=
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# Other system configury
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case "${target}" in
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aarch64*-*-linux*)
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# OS support for atomic primitives.
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config_path="${config_path} linux/aarch64 posix"
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;;
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arm*-*-linux* | arm*-*-uclinux*)
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# OS support for atomic primitives.
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config_path="${config_path} linux/arm posix"
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;;
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s390*-*-linux*)
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# OS support for atomic primitives.
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config_path="${config_path} s390 posix"
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;;
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powerpc*-*-aix*)
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config_path="${config_path} posix"
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tmake_file="t-aix"
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;;
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*-*-linux* | *-*-gnu* | *-*-k*bsd*-gnu \
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| *-*-netbsd* | *-*-freebsd* | *-*-openbsd* | *-*-dragonfly* \
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| *-*-solaris2* | *-*-sysv4* | *-*-irix6* | *-*-osf* | *-*-hpux11* \
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| *-*-darwin* | *-*-aix* | *-*-cygwin*)
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# POSIX system. The OS is supported.
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config_path="${config_path} posix"
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;;
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*-*-mingw*)
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# OS support for atomic primitives.
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case ${target_thread_file} in
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win32 | mcf | single)
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config_path="${config_path} mingw"
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;;
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posix)
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config_path="${config_path} posix"
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;;
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esac
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;;
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*-*-rtems*)
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XCFLAGS="${configure_tgt_pre_target_cpu_XCFLAGS}"
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config_path="rtems"
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;;
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*-*-elf*)
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# ??? No target OS. We could be targeting bare-metal kernel-mode,
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# or user-mode for some custom OS. If the target supports TAS,
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# we can build our own spinlocks, given there are no signals.
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# If the target supports disabling interrupts, we can work in
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# kernel-mode, given the system is not multi-processor.
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UNSUPPORTED=1
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;;
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nvptx*-*-*)
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;;
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*)
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# Who are you?
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UNSUPPORTED=1
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;;
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esac
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# glibc will pass hwcap to ifunc resolver functions as an argument.
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# The type may be different on different architectures.
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case "${target}" in
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aarch64*-*-*)
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IFUNC_RESOLVER_ARGS="uint64_t hwcap, const __ifunc_arg_t *features"
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;;
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*)
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IFUNC_RESOLVER_ARGS="void"
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;;
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esac
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