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42 lines
1.5 KiB
ArmAsm
42 lines
1.5 KiB
ArmAsm
/* c-isr library stuff of Andes NDS32 cpu for GNU compiler
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Copyright (C) 2012-2022 Free Software Foundation, Inc.
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Contributed by Andes Technology Corporation.
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This file is part of GCC.
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GCC is free software; you can redistribute it and/or modify it
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under the terms of the GNU General Public License as published
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by the Free Software Foundation; either version 3, or (at your
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option) any later version.
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GCC is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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Under Section 7 of GPL version 3, you are granted additional
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permissions described in the GCC Runtime Library Exception, version
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3.1, as published by the Free Software Foundation.
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You should have received a copy of the GNU General Public License and
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a copy of the GCC Runtime Library Exception along with this program;
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see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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<http://www.gnu.org/licenses/>. */
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.section .nds32_vector.31, "ax"
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#if __NDS32_ISR_VECTOR_SIZE_4__
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/* The vector size is default 4-byte for v3 architecture. */
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.vec_size 4
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.align 2
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#else
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/* The vector size is default 16-byte for other architectures. */
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.vec_size 16
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.align 4
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#endif
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.weak _nds32_vector_31
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.type _nds32_vector_31, @function
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_nds32_vector_31:
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1:
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j 1b
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.size _nds32_vector_31, .-_nds32_vector_31
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