The attached patch fixes an out of bound write to memory allocated
with alloca() on the stack. This rarely ever happened because on
one hand -fbounds-check needs to be enabled, and on the other hand
alloca() used to allocate a few bytes extra most of the time so
most of the time the excess write did no harm.
gcc/fortran/ChangeLog:
* trans-array.c (gfc_conv_array_ref): Fix allocation of diagnostic
message (was too small).
From-SVN: r238849
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71067
* decl.c (match_data_constant): On error, set 'result' to NULL.
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71067
* gfortran.dg/pr71067_1.f90: New test.
* gfortran.dg/pr71067_2.f90: Ditto.
From-SVN: r238842
[gcc]
2016-07-28 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_split_vec_extract_var):
New declaration.
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Add support for vec_extract of vector double or vector long having
a variable element number on 64-bit ISA 2.07 systems or newer.
* config/rs6000/rs6000.c (rs6000_expand_vector_extract):
Likewise.
(rs6000_split_vec_extract_var): New function to split a
vec_extract built-in function with variable element number.
(rtx_is_swappable_p): Variable vec_extracts and shifts are not
swappable.
* config/rs6000/vsx.md (UNSPEC_VSX_VSLO): New unspec.
(UNSPEC_VSX_EXTRACT): Likewise.
(vsx_extract_<mode>, VSX_D iterator): Fix constraints to allow
direct move instructions to be generated on 64-bit ISA 2.07
systems and newer, and to take advantage of the ISA 3.0 MFVSRLD
instruction.
(vsx_vslo_<mode>): New insn to do VSLO on V2DFmode and V2DImode
arguments for vec_extract variable element.
(vsx_extract_<mode>_var, VSX_D iterator): New insn to support
vec_extract with variable element on V2DFmode and V2DImode
vectors.
* config/rs6000/rs6000.h (TARGET_VEXTRACTUB): Remove
-mupper-regs-df requirement, since it isn't needed.
(TARGET_DIRECT_MOVE_64BIT): New macro to say whether we can
do direct moves on 64-bit systems, which allows optimization of
vec_extract on 64-bit ISA 2.07 systems and newer.
[gcc/testsuite]
2016-07-28 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-extract-1.c: New test.
From-SVN: r238838
* testsuite/17_intro/headers/c++2011/stdc++.cc: Change target-specific
dg-options to dg-additional-options so that default options are used.
* testsuite/17_intro/headers/c++2011/stdc++_multiple_inclusion.cc:
Likewise.
* testsuite/17_intro/headers/c++2014/stdc++.cc: Likewise.
* testsuite/17_intro/headers/c++2014/stdc++_multiple_inclusion.cc:
Likewise.
* testsuite/29_atomics/atomic_flag/test_and_set/explicit-hle.cc:
Use dg-additional-options instead of repeating the common options.
From-SVN: r238835
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71799
* resolve.c(gfc_resolve_iterator): Failure of type conversion need
not ICE.
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71799
* gfortran.dg/pr71799.f90: New test.
From-SVN: r238830
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71859
* check.c(numeric_check): Prevent ICE. Issue error for invalid
subroutine as an actual argument when numeric argument is expected.
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71859
* gfortran.dg/pr71859.f90: New test.
* gfortran.dg/intrinsic_numeric_arg.f: Update error message.
* gfortran.dg/coarray_collectives_1.f90: Ditto.
From-SVN: r238825
2016-07-28 Steven G. Kargl <kargl@gcc.gnu.org>
Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71883
* frontend-passes.c (gfc_run_passes): Bail out if there are any
errors.
* error.c (gfc_internal_error): If there are any errors in the
buffer, exit with EXIT_FAILURE.
2016-07-28 Paul Thomas <pault@gcc.gnu.org>
PR fortran/71883
* gfortran.dg/pr71883.f90 : New test.
From-SVN: r238822
which does a shift as part of its operation. An AND immediate is a
simpler operation, and might be faster on some implementations, so
it is better to emit this this instead of UBFM.
Benchmarking showed no difference on implementations where UBFM has
the same performance as AND, and minor speedups across several
benchmarks on an implementation where UBFM is slower than AND.
Bootstrapped and tested on aarch64-none-elf.
gcc/
* config/aarch64/aarch64.md
(zero_extend<SHORT:mode><GPI:mode>2_aarch64): Change output
statement and type.
(<optab>qihi2_aarch64): Likewise, and split into two.
(extendqihi2_aarch64): New.
(zero_extendqihi2_aarch64): New.
* config/aarch64/iterators.md (ldrxt): Remove.
* config/aarch64/aarch64.c (aarch64_rtx_costs): Change cost of
uxtb/uxth.
From-SVN: r238821
When zero extending a 32-bit register, we emit a "mov", but currently
report the cost of the "mov" incorrectly.
In terms of speed, we currently say the cost is that of an extend
operation. But the cost of a "mov" is the cost of 1 instruction, so fix
that.
In terms of size, we currently say that the "mov" takes 0 instructions.
Fix it by changing it to 1.
Bootstrapped and tested on aarch64-none-elf.
gcc/
* config/aarch64/aarch64.c (aarch64_rtx_costs): Fix cost of zero extend.
From-SVN: r238820
This patch improves the readability of the prolog and epilog code by moving
some code into separate functions. There is no difference in generated code.
gcc/
* config/aarch64/aarch64.c (aarch64_pushwb_pair_reg): Rename.
(aarch64_push_reg): New function to push 1 or 2 registers.
(aarch64_pop_reg): New function to pop 1 or 2 registers.
(aarch64_expand_prologue): Use aarch64_push_regs.
(aarch64_expand_epilogue): Use aarch64_pop_regs.
From-SVN: r238818
gcc/
2016-07-28 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71734
* tree-ssa-loop-im.c (ref_indep_loop_p_1): Pass value of safelen
attribute instead of REF_LOOP and use it.
(ref_indep_loop_p_2): Use SAFELEN argument instead of REF_LOOP and
set it for Loops having non-zero safelen attribute.
(ref_indep_loop_p): Pass zero as initial value for safelen.
gcc/testsuite/
2016-07-28 Yuri Rumyantsev <ysrumyan@gmail.com>
PR tree-optimization/71734
* g++.dg/vect/pr70729-nest.cc: New test.
From-SVN: r238817
This patch reverts the change for PR 71902 since it causes 178.gagel
miscompile in spec2000 as reported in PR 71961 which was observed in
x86_64, aarch64, powerpc64.
gcc/fortran/ChangeLog:
2016-07-28 Renlin Li <renlin.li@arm.com>
Revert
2016-07-19 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71902
* dependency.c (gfc_check_dependency): Use dep_ref. Handle case
if identical is true and two array element references differ.
(gfc_dep_resovler): Move most of the code to dep_ref.
(dep_ref): New function.
* frontend-passes.c (realloc_string_callback): Name temporary
variable "realloc_string".
gcc/testsuite/ChangeLog:
2016-07-28 Renlin Li <renlin.li@arm.com>
Revert
2016-07-19 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/71902
* gfortran.dg/dependency_47.f90: New test.
From-SVN: r238815
* g++.dg/vect/pr70944.cc: New test.
PR rtl-optimization/70944
* combine.c (make_compound_operation):
Do not allow make_compound_operation for vector mode
From-SVN: r238808
2016-07-27 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/vector.md (vec_extract<mode>): Change the calling
signature of rs6000_expand_vector_extract so that the element
number is a RTX instead of a constant integer.
* config/rs6000/rs6000-protos.h (rs6000_expand_vector_extract):
Likewise.
* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Likewise.
(altivec_expand_vec_ext_builtin): Likewise.
* config/rs6000/altivec.md (reduc_plus_scal_<mode>): Likewise.
* config/rs6000/vsx.md (vsx_extract_<mode>): Fix spelling of the
MFVSRLD instruction.
From-SVN: r238799
For some reason I added make_location and some related functions to
tree.h/c, rather than to input.h/c. Move them there, so we can use them
without requiring tree, and add some selftest coverage.
gcc/ChangeLog:
* input.c (get_pure_location): Move here from tree.c.
(make_location): Likewise. Add header comment.
(selftest::test_accessing_ordinary_linemaps): Verify
pure_location_p, make_location, get_location_from_adhoc_loc and
get_range_from_loc.
* input.h (get_pure_location): Move declaration here from tree.h.
(get_finish): Likewise for inline function.
(make_location): Likewise for declaration.
* tree.c (get_pure_location): Move to input.c.
(make_location): Likewise.
* tree.h (get_pure_location): Move declaration to tree.h.
(get_finish): Likewise for inline function.
(make_location): Likewise for declaration.
libcpp/ChangeLog:
* include/line-map.h (source_location): Fix line numbers in
comment.
From-SVN: r238792
C++11 has a
static_assert (COND, MESSAGE)
which gives more readable error messages for STATIC_ASSERT than our
current implementation.
This patch makes us use it if __cplusplus >= 201103L
There's also a provisional static_assert (COND) in C++1z, but presumably
we should wait until that one is fully standardized before using it.
gcc/ChangeLog:
* system.h (STATIC_ASSERT): Use static_assert if building
with C++11 onwards.
From-SVN: r238786
gcc/testsuite/
* gcc.dg/torture/pr69352.c: Use __INTPTR_TYPE__ instead of
including stdint.h.
* gcc.dg/torture/pr71866.c: Use __UINTPTR_TYPE__ isntead of
including stdint.h.
From-SVN: r238780
[gcc]
2016-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71869
* config/rs6000/rs6000.c (rs6000_generate_compare): Rework
__float128 support when we don't have hardware support, so that
the IEEE built-in functions like isgreater, first call __unordkf3
to make sure neither operand is a NaN, and if both operands are
ordered, do the normal comparison.
[gcc/testsuite]
2016-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/71869
* gcc.target/powerpc/float128-cmp.c: New test to make sure that
IEEE built-in functions handle quiet and signalling NaNs
correctly.
From-SVN: r238779
