Since r11-2095 we pass flags to cp_lexer_get_preprocessor_token, and
cp_lexer_new_main passes C_LEX_STRING_NO_JOIN when lexing most of the
translation unit, but doesn't do that for the very first token; as a
result, if the first token is a string literal, we try to join strings and
get confused if that encounters a pragma.
PR c++/108504
gcc/cp/ChangeLog:
* parser.cc (cp_lexer_new_main): Pass C_LEX_STRING_NO_JOIN for first
token, too.
gcc/testsuite/ChangeLog:
* g++.dg/ext/pragma1.C: New test.
tsubst_lambda_expr uses build_memfn_type to build a METHOD_TYPE for the new
lamba op(). This is not what we want for a C++23 static op(), but since we
also use that METHOD_TYPE to communicate the closure type down to
tsubst_function_decl, let's wait and turn it back at that point.
PR c++/108526
gcc/cp/ChangeLog:
* pt.cc (tsubst_function_decl): Handle static lambda.
gcc/testsuite/ChangeLog:
* g++.dg/cpp23/static-operator-call5.C: New test.
In the previously posted patch
"xtensa: Make complex hard register clobber elimination more robust and accurate",
the check code for insns that refer to the [DS]Cmode hard register before
it is overwritten after it is clobbered is incomplete. Fortunately such
insns are seldom emitted, so it didn't matter.
This patch fixes that for the sake of completeness.
gcc/ChangeLog:
* config/xtensa/xtensa.md:
Fix exit from loops detecting references before overwriting in the
split pattern.
LRA does elimination but not always checks insn constraints in this case.
This results in LRA failure for PDP11 target whose addition is only 2-op insn.
The same might happen for other analogous targets. The patch fixes this problem.
PR rtl-optimization/108388
gcc/ChangeLog:
* lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
do elimination but only for hard register.
(operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
calls of get_hard_regno.
gcc/testsuite/ChangeLog:
* gcc.target/pdp11/pdp11.exp: New.
* gcc.target/pdp11/pr108388.c: New.
gcc/fortran/ChangeLog:
PR fortran/108529
* simplify.cc (simplify_transformation): Do not try to simplify
transformational intrinsic when the ARRAY argument has a NULL shape.
gcc/testsuite/ChangeLog:
PR fortran/108529
* gfortran.dg/pr108529.f90: New test.
In the context of D the interpretation of S390, S390X, and SystemZ is a
bit fuzzy. The wording S390X was wrongly deprecated in favour of
SystemZ by commit
3b50a4c3fa
Thus, SystemZ is used for 64-bit targets, now, and S390 for 31-bit
targets. However, in TARGET_D_CPU_VERSIONS depending on TARGET_ZARCH we
set the CPU version to SystemZ. This is also the case if compiled for
31-bit targets leading to the following error:
libphobos/libdruntime/core/sys/posix/sys/stat.d:967:13: error: static assert: '96u == 144u' is false
967 | static assert(stat_t.sizeof == 144);
| ^
Thus in order to keep this patch simple I went for keeping SystemZ for
64-bit targets and S390, as usual, for 31-bit targets and dropped the
distinction between ESA and z/Architecture.
gcc/ChangeLog:
* config/s390/s390-d.cc (s390_d_target_versions): Fix detection
of CPU version.
This patch allows a subsequent patch to turn on/off the consuming
of C comments.
gcc/m2/ChangeLog:
* m2.flex (cpreprocessor): Add temporary variable
which is initialized to 0.
(commentCLevel): New variable.
(endOfCComment): New function.
(splitSlashStar): New function to split /* into / and *
tokens.
(COMMENTC): New flex state.
("/*"): New rule to test whether we should treat /*
as a single token or as two tokens.
(<COMMENTC>.): New rule to skip a character.
(<COMMENTC>\n.*): New rule to consume the line.
(<COMMENTC>"*/"): New rule to call endOfCComment.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
RTco is a definition for C module and therefore there is no
RTco.mod. The RTco.cc uses RTentity and the import in RTco.def
ensures that cc1gm2 can build a graph of all dependencies
should -fscaffold-static be used.
gcc/m2/ChangeLog:
* gm2-libs-iso/RTco.def: Import RTentity.
Declare RTco as a definition for C module.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
This patch adds the memory operand of MVE masked stores as input operands to
mimic the 'partial' writes, to prevent erroneous write-after-write
optimizations as described in the PR.
gcc/ChangeLog:
PR target/108177
* config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
as input operand.
gcc/testsuite/ChangeLog:
* gcc.target/arm/mve/pr108177-1-run.c: New test.
* gcc.target/arm/mve/pr108177-1.c: New test.
* gcc.target/arm/mve/pr108177-10-run.c: New test.
* gcc.target/arm/mve/pr108177-10.c: New test.
* gcc.target/arm/mve/pr108177-11-run.c: New test.
* gcc.target/arm/mve/pr108177-11.c: New test.
* gcc.target/arm/mve/pr108177-12-run.c: New test.
* gcc.target/arm/mve/pr108177-12.c: New test.
* gcc.target/arm/mve/pr108177-13-run.c: New test.
* gcc.target/arm/mve/pr108177-13.c: New test.
* gcc.target/arm/mve/pr108177-14-run.c: New test.
* gcc.target/arm/mve/pr108177-14.c: New test.
* gcc.target/arm/mve/pr108177-2-run.c: New test.
* gcc.target/arm/mve/pr108177-2.c: New test.
* gcc.target/arm/mve/pr108177-3-run.c: New test.
* gcc.target/arm/mve/pr108177-3.c: New test.
* gcc.target/arm/mve/pr108177-4-run.c: New test.
* gcc.target/arm/mve/pr108177-4.c: New test.
* gcc.target/arm/mve/pr108177-5-run.c: New test.
* gcc.target/arm/mve/pr108177-5.c: New test.
* gcc.target/arm/mve/pr108177-6-run.c: New test.
* gcc.target/arm/mve/pr108177-6.c: New test.
* gcc.target/arm/mve/pr108177-7-run.c: New test.
* gcc.target/arm/mve/pr108177-7.c: New test.
* gcc.target/arm/mve/pr108177-8-run.c: New test.
* gcc.target/arm/mve/pr108177-8.c: New test.
* gcc.target/arm/mve/pr108177-9-run.c: New test.
* gcc.target/arm/mve/pr108177-9.c: New test.
* gcc.target/arm/mve/pr108177-main.x: New test include.
* gcc.target/arm/mve/pr108177.x: New test include.
The SYSROOT_SUFFIX_SPEC works even when multilib is disabled.
So when build no-multilib glibc toolchain and the options are
not same as MULTILIB_DEFAULTS, the sysroot will specify wrong
because the libc will not be installed as such.
This bug causes glibc regression test error:
https://sourceware.org/pipermail/libc-testresults/2023q1/010706.html
The error is:
/scratch/jmyers/glibc-bot/install/compilers/csky-linux-gnuabiv2/csky-glibc-linux-gnuabiv2/bin/ld: cannot find -lc: No such file or directory
gcc/
* config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
and only include 'csky/t-csky-linux' when enable multilib.
* config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
define it when disable multilib.
CFG cleanup computes dominators before the loop over blocks looking
for merging opportunities. That computes also the fast-query DFS
numbers but that's a bit pointless since any CFG cleanup will invalidate
them immediately (they are re-computed before fixing up loops).
The following avoids this and fixes the SIGSEGV due to the deep
recursion in assign_dfs_numbers after inlining very many small
functions.
PR tree-optimization/108500
* dominance.h (calculate_dominance_info): Add parameter
to indicate fast-query compute, defaulted to true.
* dominance.cc (calculate_dominance_info): Honor
fast-query compute parameter.
* tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
not compute the dominator fast-query DFS numbers.
Fix an obvious copy-and-paste error where ptr1 was used instead of ptr2.
This bug caused the dump file produced by -fdump-ipa-inline-details to
not correctly show the difference in target options when a function
could not be inlined due to a target option mismatch.
gcc/ChangeLog:
PR bootstrap/90543
* optc-save-gen.awk: Fix copy-and-paste error.
Signed-off-by: Eric Biggers <ebiggers@google.com>
As reported by Andrew Pinski, structured bindings (with the exception
of the ones using std::tuple_{size,element} and get which are really
standalone variables in addition to the binding one) also use
DECL_VALUE_EXPR and needs the same treatment in static initializers.
On Sun, Jan 22, 2023 at 07:19:07PM -0500, Jason Merrill wrote:
> Though, actually, why not instead fix expand_expr_real_1 (and staticp) to
> look through DECL_VALUE_EXPR?
Doing it when emitting the initializers seems to be too late to me,
we in various spots try to put parts of the static var DECL_INITIAL expressions
into the IL, or e.g. for varpool purposes remember which vars are referenced
there.
This patch moves it to record_reference, which is called from varpool_node::analyze
and so about the same time as gimplification of the bodies which also
replaces DECL_VALUE_EXPRs.
2023-01-24 Jakub Jelinek <jakub@redhat.com>
PR c++/108474
* cgraphbuild.cc: Include gimplify.h.
(record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
their corresponding DECL_VALUE_EXPR expressions after unsharing.
* cp-gimplify.cc (cp_fold_r): Revert 2023-01-19 changes.
* g++.dg/cpp1z/decomp57.C: New test.
* g++.dg/cpp1z/decomp58.C: New test.
The patch fixes the build issue for arm-none-eabi target configured with
--with-multilib-list=aprofile,rmprofile, in which case the header file
arm/arm-mlib.h is being included more than once and the toolchain build
is failing (PR108505).
gcc/ChangeLog:
2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
PR target/108505
* config.gcc (tm_file): Move the variable out of loop.
Co-authored-by: Yang Yujie <yangyujie@loongson.cn>
PR target/107731
gcc/ChangeLog:
* config/loongarch/loongarch.cc (loongarch_classify_address):
Add precessint for CONST_INT.
(loongarch_print_operand_reloc): Operand modifier 'c' is supported.
(loongarch_print_operand): Increase the processing of '%c'.
* doc/extend.texi: Adds documents for LoongArch operand modifiers.
And port the public operand modifiers information to this document.
gcc/testsuite/ChangeLog:
* gcc.target/loongarch/tst-asm-const.c: Moved to...
* gcc.target/loongarch/pr107731.c: ...here.
In r13-2978 I tried to eliminate TARGET_EXPR around TARGET_EXPR by
discarding the outer one, but as in this testcase that breaks if the
TARGET_EXPR_SLOT of the outer one is used elsewhere. But it should always
be safe to strip the inner one; if its slot were reused, there would be a
COMPOUND_EXPR around the TARGET_EXPR.
For 107329, if we're setting *walk_subtrees, we also need to fold
TARGET_EXPR_CLEANUP.
PR c++/107303
PR c++/107329
gcc/cp/ChangeLog:
* cp-gimplify.cc (cp_fold_r) [TARGET_EXPR]: In case of double
TARGET_EXPR, keep the outer one instead of the inner one.
(maybe_replace_decl): New.
gcc/testsuite/ChangeLog:
* g++.dg/ext/builtin-shufflevector-5.C: New test.
* g++.dg/init/new51.C: New test.
With -ffold-simple-inlines, we turn calls to std::move into the static_cast
equivalent. In this testcase, this exposes the FindResult temporary to copy
elision which is not specified by the standard, through an optimization in
gimplify_modify_expr_rhs. Since the type is not TREE_ADDRESSABLE, this is
not detectable by the user, so we just need to soften the assert.
PR c++/107267
gcc/cp/ChangeLog:
* cp-gimplify.cc (cp_gimplify_init_expr): Allow unexpected elision
of trivial types.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/move2.C: New test.
We shouldn't emit "right operand of comma operator has no effect"
when that comma operator was created by the compiler for "new int{}".
convert_to_void/COMPOUND_EXPR already checks warning_suppressed_p so
we can just suppress -Wunused-value.
PR c++/107797
gcc/cp/ChangeLog:
* cvt.cc (ocp_convert): copy_warning when creating a new
COMPOUND_EXPR.
* init.cc (build_new_1): Suppress -Wunused-value on
compiler-generated COMPOUND_EXPRs.
gcc/testsuite/ChangeLog:
* g++.dg/warn/Wunused-value-1.C: New test.
The transformation done by r13-4564 to use the iterator constructor instead
of the initializer-list constructor breaks if the iterator pointers are
themselves treated as elements of an initializer-list, so check for that.
PR c++/108195
gcc/cp/ChangeLog:
* call.cc (build_user_type_conversion_1): Check whether the
iterators also find a list ctor.
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/initlist-vect2.C: New test.
gcc/fortran/ChangeLog:
PR fortran/108501
* interface.cc (get_expr_storage_size): Check array subscript triplets
that we actually have integer values before trying to extract with
mpz_get_si.
gcc/testsuite/ChangeLog:
PR fortran/108501
* gfortran.dg/pr108501.f90: New test.
gcc/fortran/ChangeLog:
PR fortran/108420
* iresolve.cc (check_charlen_present): Preserve character length if
there is no array constructor.
gcc/testsuite/ChangeLog:
PR fortran/108420
* gfortran.dg/pr108420.f90: New test.
In r13-4469 we started to build the RESULT_DECL in grokdeclarator, while we
still know the location of the return type. But in this testcase, we hit
that code again when parsing the explicit instantiation, and clobber the
DECL_RESULT that was previously used in parsing the function. So, only set
DECL_RESULT if it isn't already set.
PR c++/108496
gcc/cp/ChangeLog:
* decl.cc (grokdeclarator): Check whether DECL_RESULT is already
set.
gcc/testsuite/ChangeLog:
* g++.dg/template/explicit-instantiation5.C: New test.
Creating a safe iterator from a normal iterator is done within the library where we
already know that it is done correctly. The rare situation where a user would use safe
iterators for his own purpose is non-Standard code so outside _GLIBCXX_DEBUG scope. For
those reasons the __msg_init_singular is useless and can be removed.
Additionally in the copy constructor used for post-increment and post-decrement operators
the __msg_init_copy_singular check can also be ommitted because of the preliminary
__msg_bad_incr and __msg_bad_decr checks.
libstdc++-v3/ChangeLog:
* include/debug/safe_iterator.h (_Safe_iterator<>::_Unchecked): New.
(_Safe_iterator(const _Safe_iterator&, _Unchecked)): New.
(_Safe_iterator::operator++(int)): Use latter.
(_Safe_iterator::operator--(int)): Likewise.
(_Safe_iterator(_Iterator, const _Safe_sequence_base*)): Remove !_M_insular()
check.
* include/debug/safe_local_iterator.h (_Safe_local_iterator<>::_Unchecked):
New.
(_Safe_local_iterator(const _Safe_local_iterator&, _Unchecked)): New.
(_Safe_local_iterator::operator++(int)): Use latter.
* src/c++11/debug.cc (_S_debug_messages): Add as comment the _Debug_msg_id
entry associated to the array entry.
The adds the includes in the FE as done in other GCC languages.
It also revises the library handling to avoid additional -L options
from hiding LIBDIR.
For the include/import paths as presented to the front end initialisation,
we capture them and then arrange to emit the 'standard library' paths in
the same order as specified for C.
The specs are tidied up.
The use of the internal prefix also fixes searching in a relocated compiler.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108182
PR modula2/108480
gcc/m2/ChangeLog:
* Make-lang.in: Pass libsubdir to the language init
build.
* gm2-lang.cc (INCLUDE_VECTOR): Define.
(add_one_import_path): New.
(add_m2_import_paths): New.
(gm2_langhook_post_options): Arrange to add the include
paths (and add the system ones) in the same order as C
uses.
* gm2spec.cc (build_archive_path): Remove.
(add_default_combination): Remove.
(add_default_archives): Remove.
(add_default_libs): We no longer need a '-L' option, just
emit the -l and each library in use.
(build_include_path): Remove.
(add_include): Remove.
(add_default_includes): Remove.
(library_installed): Remove.
(check_valid_library): Remove.
(check_valid_list): Remove.
(convert_abbreviation): Diagnose unhandled cases.
(lang_specific_driver): Skip options where we will add back
a validated version.
* lang-specs.h (M2CPP): Reformat, append %I when -fcpp is not
in use. Revise the cc1gm2 spec to omit mentioning options that
are handled in the c pre-processor line.
* lang.opt: Allow preprocessing and path options as input to the
cc1gm2 invocation, so that they can be passed to the preprocessor
invocation.
As noted in the PR, the problem is that we make a request for additional
stack that violates the constraints on some systems.
This patch chooses a value that is divisible by common OS page sizes.
TODO: the user value should be checked and then an exception thrown if it
is not suitable.
Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
PR modula2/108405
gcc/m2/ChangeLog:
* gm2-libs-iso/Preemptive.mod (initPreemptive): Use a value for
extra space that is divisible by common OS pagesizes.
This patch fixes the documentation for -mbranch-protection command line option.
gcc/ChangeLog:
2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* doc/invoke.texi (-mbranch-protection): Update documentation.
This patch adds support for Arm frame unwinding instruction "0xb5" [1]. When
an exception is taken and "0xb5" instruction is encounter during runtime
stack-unwinding, we use effective vsp as modifier in pointer authentication.
On completion of stack unwinding if "0xb5" instruction is not encountered
then CFA will be used as modifier in pointer authentication.
[1] https://github.com/ARM-software/abi-aa/releases/download/2022Q3/ehabi32.pdf
libgcc/ChangeLog:
2022-11-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/arm/pr-support.c (__gnu_unwind_execute): Decode opcode
"0xb5".
This patch adds the support for pacbti multlilib linking by making
"-mbranch-protection=none" as default multilib option for arm-none-eabi
target.
Eg 1.
If the passed command line flags are (without mbranch-protection):
a) -march=armv8.1-m.main+mve -mfloat-abi=hard -mfpu=auto
"-mbranch-protection=none" will be used in the multilib matching.
Eg 2.
If the passed command line flags are (with mbranch-protection):
a) -march=armv8.1-m.main+mve+pacbti -mfloat-abi=hard -mfpu=auto -mbranch-protection=pac-ret
"-mbranch-protection=standard" will be used in the multilib matching.
gcc/ChangeLog:
2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config.gcc ($tm_file): Update variable.
* config/arm/arm-mlib.h: Create new header file.
* config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
multilib arch directory.
(MULTILIB_REUSE): Add multilib reuse rules.
(MULTILIB_MATCHES): Add multilib match rules.
gcc/testsuite/ChangeLog:
2023-01-11 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/multilib.exp (multilib_config "rmprofile"): Update
tests.
* gcc.target/arm/pac-12.c: New test.
* gcc.target/arm/pac-13.c: Likewise.
* gcc.target/arm/pac-14.c: Likewise.
This patch adds the -mcpu support for the Arm Cortex-M85 CPU which is
an Armv8.1-M Mainline CPU supporting MVE and PACBTI by default.
-mpcu=cortex-m85 switch by default matches to -march=armv8.1-m.main+pacbti+mve.fp+fp.dp.
Also following options are provided to disable default features.
+nomve.fp (disables MVE Floating point)
+nomve (disables MVE Integer and MVE Floating point)
+nodsp (disables dsp, MVE Integer and MVE Floating point)
+nopacbti (disables pacbti)
+nofp (disables floating point and MVE floating point)
gcc/ChangeLog:
2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/arm/arm-cpus.in (cortex-m85): Define new CPU.
* config/arm/arm-tables.opt: Regenerate.
* config/arm/arm-tune.md: Likewise.
* doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
* (-mfix-cmse-cve-2021-35465): Likewise.
gcc/testsuite/ChangeLog:
2022-08-12 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* gcc.target/arm/multilib.exp: Add tests for cortex-m85.
The following deals with .LOOP_DIST_ALIAS surviving vectorization
because any of the loops involved were elided between loop distribution
and vectorization. As opposed to .LOOP_VECTORIZED which exists only
between if-conversion and vectorization with no intermediate passes
this is more difficult to deal with in advance and thus cleaning
up after vectorization looks better. There's the unconditional
vector lowering pass which looks like a good place for this (for
SIMD uid we have pass_simduid_cleanup).
PR tree-optimization/108482
* tree-vect-generic.cc (expand_vector_operations): Fold remaining
.LOOP_DIST_ALIAS calls.
* gcc.dg/torture/pr108482.c: New testcase.
Hi all,
this patch enables Branch Target Identification Armv8.1-M Mechanism
[1].
This is achieved by using the bti pass made common with Aarch64.
The pass iterates through the instructions and adds the necessary BTI
instructions at the beginning of every function and at every landing
pads targeted by indirect jumps.
Best Regards
Andrea
[1]
<https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>
gcc/ChangeLog
2022-04-07 Andrea Corallo <andrea.corallo@arm.com>
* config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
* config/arm/arm-protos.h: Update.
* config/arm/aarch-common-protos.h: Declare
'aarch_bti_arch_check'.
* config/arm/arm.cc (aarch_bti_enabled) Update.
(aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
(aarch_gen_bti_j, aarch_bti_arch_check): New functions.
* config/arm/arm.md (bti_nop): New insn.
* config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
(aarch-bti-insert.o): New target.
* config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
* config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
compatibility.
(gate): Make use of 'aarch_bti_arch_check'.
* config/arm/arm-passes.def: New file.
* config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
gcc/testsuite/ChangeLog
2022-04-07 Andrea Corallo <andrea.corallo@arm.com>
* gcc.target/arm/bti-1.c: New testcase.
* gcc.target/arm/bti-2.c: Likewise.
Hi all,
this patch splits and restructures the aarch64 bti pass code in order
to have it usable by the arm backend as well. These changes have no
functional impact.
Best Regards
Andrea
gcc/Changelog
* config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
'aarch-bti-insert.o'.
* config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
proto.
* config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
(aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
(aarch64_output_mi_thunk)
(aarch64_print_patchable_function_entry)
(aarch64_file_end_indicate_exec_stack): Update renamed function
calls to renamed functions.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
* config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
target.
* config/aarch64/aarch64-bti-insert.cc: Delete.
* config/arm/aarch-bti-insert.cc: New file including and
generalizing code from aarch64-bti-insert.cc.
* config/arm/aarch-common-protos.h: Update.
Hi all,
this patch enables address return signature and verification based on
Armv8.1-M Pointer Authentication [1].
To sign the return address, we use the PAC R12, LR, SP instruction
upon function entry. This is signing LR using SP and storing the
result in R12. R12 will be pushed into the stack.
During function epilogue R12 will be popped and AUT R12, LR, SP will
be used to verify that the content of LR is still valid before return.
Here an example of PAC instrumented function prologue and epilogue:
void foo (void);
int main()
{
foo ();
return 0;
}
Compiled with '-march=armv8.1-m.main -mbranch-protection=pac-ret
-mthumb' translates into:
main:
pac ip, lr, sp
push {r3, r7, ip, lr}
add r7, sp, #0
bl foo
movs r3, #0
mov r0, r3
pop {r3, r7, ip, lr}
aut ip, lr, sp
bx lr
The patch also takes care of generating a PACBTI instruction in place
of the sequence BTI+PAC when Branch Target Identification is enabled
contextually.
Ex. the previous example compiled with '-march=armv8.1-m.main
-mbranch-protection=pac-ret+bti -mthumb' translates into:
main:
pacbti ip, lr, sp
push {r3, r7, ip, lr}
add r7, sp, #0
bl foo
movs r3, #0
mov r0, r3
pop {r3, r7, ip, lr}
aut ip, lr, sp
bx lr
As part of previous upstream suggestions a test for varargs has been
added and '-mtpcs-frame' is deemed being incompatible with this return
signing address feature being introduced.
[1] <https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/armv8-1-m-pointer-authentication-and-branch-target-identification-extension>
gcc/
* config/arm/arm.h (arm_arch8m_main): Declare it.
* config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
Declare it.
* config/arm/arm.cc (arm_arch8m_main): Define it.
(arm_option_reconfigure_globals): Set arm_arch8m_main.
(arm_compute_frame_layout, arm_expand_prologue)
(thumb2_expand_return, arm_expand_epilogue)
(arm_conditional_register_usage): Update for pac codegen.
(arm_current_function_pac_enabled_p): New function.
(aarch_bti_enabled) New function.
(use_return_insn): Return zero when pac is enabled.
* config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
Add new patterns.
* config/arm/unspecs.md (UNSPEC_PAC_NOP)
(VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
gcc/testsuite/
* gcc.target/arm/pac.h : New file.
* gcc.target/arm/pac-1.c : New test case.
* gcc.target/arm/pac-2.c : Likewise.
* gcc.target/arm/pac-3.c : Likewise.
* gcc.target/arm/pac-4.c : Likewise.
* gcc.target/arm/pac-5.c : Likewise.
* gcc.target/arm/pac-6.c : Likewise.
* gcc.target/arm/pac-7.c : Likewise.
* gcc.target/arm/pac-8.c : Likewise.
* gcc.target/arm/pac-9.c : Likewise.
* gcc.target/arm/pac-10.c : Likewise.
* gcc.target/arm/pac-11.c : Likewise.
This patch emits assembler directives for PACBTI build attributes as
defined by the
ABI.
<https://github.com/ARM-software/abi-aa/releases/download/2021Q1/addenda32.pdf>
gcc/ChangeLog:
* config/arm/arm.cc (arm_file_start): Emit EABI attributes for
Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
gcc/testsuite/ChangeLog:
* gcc.target/arm/acle/pacbti-m-predef-1.c: New test.
* gcc.target/arm/acle/pacbti-m-predef-3.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-6.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-7.c: Likewise.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
This patch adds authentication for when the stack is unwound when an
exception is taken. All the changes here are done to the runtime code
in libgcc's unwinder code for Arm target. All the changes are guarded
under defined (__ARM_FEATURE_PAC_DEFAULT) and activated only if the
+pacbti feature is switched on for the architecture. This means that
switching on the target feature via -march or -mcpu is sufficient and
-mbranch-protection need not be enabled. This ensures that the
unwinder is authenticated only if the PACBTI instructions are
available in the non-NOP space as it uses AUTG. Just generating
PAC/AUT instructions using -mbranch-protection will not enable
authentication on the unwinder.
Pre-approved with the requested changes here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586555.html>.
gcc/ChangeLog:
* ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
new pseudo register class _UVRSC_PAC.
libgcc/ChangeLog:
* config/arm/pr-support.c (__gnu_unwind_execute): Decode
exception opcode (0xb4) for saving RA_AUTH_CODE and authenticate
with AUTG if found.
* config/arm/unwind-arm.c (struct pseudo_regs): New.
(phase1_vrs): Introduce new field to store pseudo-reg state.
(phase2_vrs): Likewise.
(_Unwind_VRS_Get): Load pseudo register state from virtual reg set.
(_Unwind_VRS_Set): Store pseudo register state to virtual reg set.
(_Unwind_VRS_Pop): Load pseudo register value from stack into VRS.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
This patch implements target feature macros when PACBTI is enabled
through the -march option or -mbranch-protection. The target feature
macros __ARM_FEATURE_PAC_DEFAULT and __ARM_FEATURE_BTI_DEFAULT are
specified in ARM ACLE
<https://developer.arm.com/documentation/101028/0012/5--Feature-test-macros?lang=en>
__ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI are specified in the
pull-request <https://github.com/ARM-software/acle/pull/55>.
Approved here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586334.html>.
gcc/
* config/arm/arm-c.cc (arm_cpu_builtins): Define
__ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
__ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
gcc/testsuite/
* lib/target-supports.exp
(check_effective_target_mbranch_protection_ok): New function.
* gcc.target/arm/acle/pacbti-m-predef-2.c: New test.
* gcc.target/arm/acle/pacbti-m-predef-4.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-5.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-8.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-9.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-10.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-11.c: Likewise.
* gcc.target/arm/acle/pacbti-m-predef-12.c: Likewise.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Add -mbranch-protection option. This option enables the
code-generation of pointer signing and authentication instructions in
function prologues and epilogues.
gcc/ChangeLog:
* config/arm/arm.cc (arm_configure_build_target): Parse and validate
-mbranch-protection option and initialize appropriate data structures.
* config/arm/arm.opt (-mbranch-protection): New option.
* doc/invoke.texi (Arm Options): Document it.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Co-Authored-By: Richard Earnshaw <Richard.Earnshaw@arm.com>
This patch adds the -march feature +pacbti to Armv8.1-M Mainline.
This feature enables pointer signing and authentication instructions
on M-class architectures.
Pre-approved here
<https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586144.html>.
gcc/Changelog:
* config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
* config/arm/arm-cpus.in (pacbti): New feature.
* doc/invoke.texi (Arm Options): Document it.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
Hi all,
This change refactors all the mbranch-protection option parsing code and
types to make it common to both AArch32 and AArch64 backends.
This change also pulls in some supporting types from AArch64 to make
it common (aarch_parse_opt_result).
The significant changes in this patch are the movement of all branch
protection parsing routines from aarch64.c to aarch-common.c and
supporting data types and static data structures.
This patch also pre-declares variables and types required in the
aarch32 back-end for moved variables for function sign scope and key
to prepare for the impending series of patches that support parsing
the feature mbranch-protection in the aarch32 back-end.
gcc/ChangeLog:
* common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
(all_architectures): Fix comment.
(aarch64_parse_extension): Rename return type, enum value names.
* config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
Also rename corresponding enum values.
* config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
out aarch64_function_type and move it to common code as
aarch_function_type in aarch-common.h.
* config/aarch64/aarch64-protos.h: Include common types header,
move out types aarch64_parse_opt_result and aarch64_key_type to
aarch-common.h
* config/aarch64/aarch64.cc: Move mbranch-protection parsing types
and functions out into aarch-common.h and aarch-common.cc. Fix up
all the name changes resulting from the move.
* config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
and enum value.
* config/aarch64/aarch64.opt: Include aarch-common.h to import
type move. Fix up name changes from factoring out common code and
data.
* config/arm/aarch-common-protos.h: Export factored out routines to both
backends.
* config/arm/aarch-common.cc: Include newly factored out types.
Move all mbranch-protection code and data structures from
aarch64.cc.
* config/arm/aarch-common.h: New header that declares types shared
between aarch32 and aarch64 backends.
* config/arm/arm-protos.h: Declare types and variables that are
made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
aarch_ra_sign_scope and aarch_enable_bti.
* config/arm/arm.opt (config/arm/aarch-common.h): Include header.
(aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
* config/arm/arm.cc: Add missing includes.
Co-Authored-By: Tejas Belagod <tbelagod@arm.com>
The previous change to avoid a duplicate multi directory
caused the m2/m2{cor,iso,log,min,pim} installs to happen
relative to the main library directory when not using
--enable-version-specific-runtime-libs which doesn't match
the drivers expectation where to find them. The following
fixes the original issue by simply dropping the duplicate
multi directory since the one in the $(inst_libdir) variable
now works.
Tested by building and installing with and without
--enable-version-specific-runtime-libs and compiling and
linking a modula-2 testcase successfully with the installed
compilers.
PR modula2/108144
libgm2/
* libm2cor/Makefile.am: Revert previous change, instead
drop the redundant $(MULTIDIR).
* libm2iso/Makefile.am: Likewise.
* libm2log/Makefile.am: Likewise.
* libm2min/Makefile.am: Likewise.
* libm2pim/Makefile.am: Likewise.
* libm2cor/Makefile.in: Regenerate.
* libm2iso/Makefile.in: Likewise.
* libm2log/Makefile.in: Likewise.
* libm2min/Makefile.in: Likewise.
* libm2pim/Makefile.in: Likewise.
