Commit Graph

191266 Commits

Author SHA1 Message Date
Sören Tempel
c163647ffb Disable -fsplit-stack support on non-glibc targets
The -fsplit-stack option requires the pthread_t TCB definition in the
libc to provide certain struct fields at specific hardcoded offsets. As
far as I know, only glibc provides these fields at the required offsets.
Most notably, musl libc does not have these fields. However, since gcc
accesses the fields using a fixed offset, this does not cause a
compile-time error, but instead results in a silent memory corruption at
run-time with musl libc. For example, on s390x libgcc's
__stack_split_initialize CTOR will overwrite the cancel field in the
pthread_t TCB on musl.

The -fsplit-stack option is used within the gcc code base itself by
gcc-go (if available). On musl-based systems with split-stack support
(i.e. s390x or x86) this causes Go programs compiled with gcc-go to
misbehave at run-time.

This patch fixes gcc-go on musl by disabling -fsplit-stack in gcc itself
since it is not supported on non-glibc targets anyhow. This is achieved
by checking if gcc targets a glibc-based system. This check has been
added for x86 and s390x, the rs6000 config already checks for
TARGET_GLIBC_MAJOR. Other architectures do not have split-stack
support. With this patch applied, the gcc-go configure script will
detect that -fsplit-stack support is not available and will not use it.

See https://www.openwall.com/lists/musl/2012/10/16/12

This patch was written under the assumption that glibc is the only libc
implementation which supports the required fields at the required
offsets in the pthread_t TCB. The patch has been tested on Alpine Linux
Edge on the s390x and x86 architectures by bootstrapping Google's Go
implementation with gcc-go.

Signed-off-by: Sören Tempel <soeren@soeren-tempel.net>

gcc/ChangeLog:

	* common/config/s390/s390-common.cc (s390_supports_split_stack):
	Only support split-stack on glibc targets.
	* config/i386/gnu-user-common.h (STACK_CHECK_STATIC_BUILTIN): Ditto.
	* config/i386/gnu.h (defined): Ditto.
2022-01-21 19:22:46 +00:00
Bill Schmidt
afe91e2566 rs6000: Support vector float/double for vec_sldw
2022-01-21  Bill Schmidt  <wschmidt@linux.ibm.com>

gcc/
	* config/rs6000/rs6000-overload.def (VEC_SLDW): Add instances for
	vector float and vector double.

gcc/testsuite/
	* gcc.target/powerpc/builtins-4.c: Add two test variants.  Adjust
	assembler counts.
2022-01-21 13:14:19 -06:00
Bill Seurer
518aad6a16 rs6000: Fix bootstrap
Fix a compilation issue in stage2 bootstrap.  Fixed as obvious (re:
discussion with Bill Schmidt).

2022-01-21  Bill Seurer  <seurer@gcc.gnu.org>

gcc/
	* config/rs6000/rs6000.cc (rs6000_get_function_versions_dispatcher):
	Fix mention of ifunc in string.
2022-01-21 13:09:35 -06:00
Roger Sayle
886e977958 PR middle-end/104140: bootstrap ICE on riscv.
This patch resolves the P1 "ice-on-valid-code" regression boostrapping
GCC on risv-unknown-linux-gnu caused by my recent MULT_HIGHPART_EXPR
functionality.  RISC-V differs from x86_64 and many targets by
supporting a usmusidi3 instruction, basically a widening multiply
where one operand is signed and the other is unsigned.  Alas the
final version of my patch to recognize MULT_HIGHPART_EXPR didn't
sufficiently defend against the operands of WIDEN_MULT_EXPR having
different signedness.  This is fixed by the two-line change to
tree-ssa-math-opts.cc's convert_mult_to_highpart in the patch below.

The majority of the rest of the patch is to the documentation
(in tree.def and generic.texi).  It turns out that WIDEN_MULT_EXPR
wasn't previously documented in generic.texi, let alone the slightly
unusual semantics of allowing mismatched (signed vs unsigned) operands.
This also clarifies that MULT_HIGHPART_EXPR currently requires the
signedness of operands to match [but this might change in a future
release of GCC to support targets with usmul<mode>3_highpart].

The one final chunk of this patch (that is hopefully sufficiently
close to obvious for stage 4) is a similar (NULL pointer) sanity
check in riscv_cpu_cpp_builtins.  Currently running cc1 from the
command line (or from gdb) without specifying -march results in a
segmentation fault (ICE).  This is a minor annoyance tracking down
issues (in cross compilers) for riscv, and trivially fixed as below.

2022-01-22  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
	PR middle-end/104140
	* tree-ssa-math-opts.cc (convert_mult_to_highpart): Check that the
	operands of the widening multiplication are either both signed or
	both unsigned, and abort the conversion if mismatched.
	* doc/generic.texi (WIDEN_MULT_EXPR): Describe expression node.
	(MULT_HIGHPART_EXPR): Clarify that operands must have the same
	signedness.
	* tree.def (MULT_HIGHPART_EXPR): Document both operands must have
	integer types with the same precision and signedness.
	(WIDEN_MULT_EXPR): Document that operands must have integer types
	with the same precision, but possibly differing signedness.
	* config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Defend against
	riscv_current_subset_list returning a NULL pointer (empty list).

gcc/testsuite/ChangeLog
	PR middle-end/104140
	* gcc.target/riscv/pr104140.c: New test case.
2022-01-21 18:50:22 +00:00
Vladimir N. Makarov
85419ac597 [PR103676] LRA: Calculate and exclude some start hard registers for reload pseudos
LRA and old reload pass uses only one register class for reload pseudos even if
operand constraints contain more one register class.  Let us consider
constraint 'lh' for thumb arm which means low and high thumb registers.
Reload pseudo for such constraint will have general reg class (union of
low and high reg classes).  Assigning the last low register to the reload
pseudo is wrong if the pseudo is of DImode as it requires two hard regs.
But it is considered OK if we use general reg class.  The following patch
solves this problem for LRA.

gcc/ChangeLog:

	PR target/103676
	* ira.h (struct target_ira): Add member
	x_ira_exclude_class_mode_regs.
	(ira_exclude_class_mode_regs): New macro.
	* lra.h (lra_create_new_reg): Add arg exclude_start_hard_regs and
	move from here ...
	* lra-int.h: ... to here.
	(lra_create_new_reg_with_unique_value): Add arg
	exclude_start_hard_regs.
	(class lra_reg): Add member exclude_start_hard_regs.
	* lra-assigns.cc (find_hard_regno_for_1): Setup
	impossible_start_hard_regs from exclude_start_hard_regs.
	* lra-constraints.cc (get_reload_reg): Add arg exclude_start_hard_regs and pass
	it lra_create_new_reg[_with_unique_value].
	(match_reload): Ditto.
	(check_and_process_move): Pass NULL
	exclude_start_hard_regs to lra_create_new_reg_with_unique_value.
	(goal_alt_exclude_start_hard_regs): New static variable.
	(process_addr_reg, simplify_operand_subreg): Pass NULL
	exclude_start_hard_regs to lra_create_new_reg_with_unique_value
	and get_reload_reg.
	(process_alt_operands): Setup goal_alt_exclude_start_hard_regs.
	Use this_alternative_exclude_start_hard_regs additionally to find
	winning operand alternative.
	(base_to_reg, base_plus_disp_to_reg, index_part_to_reg): Pass NULL
	exclude_start_hard_regs to lra_create_new_reg.
	(process_address_1, emit_inc): Ditto.
	(curr_insn_transform): Pass exclude_start_hard_regs value to
	lra_create_new_reg, get_reload_reg, match_reload.
	(inherit_reload_reg, split_reg): Pass NULL exclude_start_hard_regs
	to lra_create_new_reg.
	(process_invariant_for_inheritance): Ditto.
	* lra-remat.cc (update_scratch_ops): Ditto.
	* lra.cc (lra_create_new_reg_with_unique_value): Add arg
	exclude_start_hard_regs.  Setup the corresponding member of
	lra reg info.
	(lra_create_new_reg): Add arg exclude_start_hard_regs and pass it
	to lra_create_new_reg_with_unique_value.
	(initialize_lra_reg_info_element): Initialize member
	exclude_start_hard_regs.
	(get_scratch_reg): Pass NULL to lra_create_new_reg.
	* ira.cc (setup_prohibited_class_mode_regs): Rename to
	setup_prohibited_and_exclude_class_mode_regs and calculate
	ira_exclude_class_mode_regs.

gcc/testsuite/ChangeLog:

	PR target/103676
	* g++.target/arm/pr103676.C: New.
2022-01-21 13:37:11 -05:00
Marek Polacek
3abcbf2432 c++: ICE with noexcept and canonical types [PR101715]
This is a "canonical types differ for identical types" ICE, which started
with r11-4682.  It's a bit tricky to explain.  Consider:

  template <typename T> struct S {
    S<T> bar() noexcept(T::value);  // #1
    S<T> foo() noexcept(T::value);  // #2
  };

  template <typename T> S<T> S<T>::foo() noexcept(T::value) {}  // #3

We ICE because #3 and #2 have the same type, but their canonical types
differ: TYPE_CANONICAL (#3) == #2 but TYPE_CANONICAL (#2) == #1.

The member functions #1 and #2 have the same type.  However, since their
noexcept-specifier is deferred, when parsing them, we create a variant for
both of them, because DEFERRED_PARSE cannot be compared.  In other words,
build_cp_fntype_variant's

  tree v = TYPE_MAIN_VARIANT (type);
  for (; v; v = TYPE_NEXT_VARIANT (v))
    if (cp_check_qualified_type (v, type, type_quals, rqual, raises, late))
      return v;

will *not* find an existing variant when creating a method_type for #2, so we
have to create a new one.

But then we perform delayed parsing and call fixup_deferred_exception_variants
for #1 and #2.  f_d_e_v will replace TYPE_RAISES_EXCEPTIONS with the newly
parsed noexcept-specifier.  It also sets TYPE_CANONICAL (#2) to #1.  Both
noexcepts turned out to be the same, so now we have two equivalent variants in
the list!  I.e.,

+-----------------+      +-----------------+      +-----------------+
|      main       |      |      #2         |      |      #1         |
| S S::<T379>(S*) |----->| S S::<T37c>(S*) |----->| S S::<T37a>(S*) |----->NULL
|    -            |      |  noex(T::value) |      |  noex(T::value) |
+-----------------+      +-----------------+      +-----------------+

Then we get to #3.  As for #1 and #2, grokdeclarator calls build_memfn_type,
which ends up calling build_cp_fntype_variant, which will use the loop
above to look for an existing variant.  The first one that matches
cp_check_qualified_type will be used, so we use #2 rather than #1, and the
TYPE_CANONICAL mismatch follows.  Hopefully that makes sense.

As for the fix, I didn't think I could rewrite the method_type #2 with #1
because the type may have escaped via decltype.  So my approach is to
elide #2 from the list, so when looking for a matching variant, we always
find #1 (#2 remains live though, which admittedly sounds sort of dodgy).

	PR c++/101715

gcc/cp/ChangeLog:

	* tree.cc (fixup_deferred_exception_variants): Remove duplicate
	variants after parsing the exception specifications.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp0x/noexcept72.C: New test.
	* g++.dg/cpp0x/noexcept73.C: New test.
2022-01-21 13:11:54 -05:00
Thomas Schwinge
087e545747 Strengthen a few OpenACC test cases
Rather than rubber-stamp whatever requested vs. actual device kernel launch
configuration happens, actually (again) verify the requested values (modulo
expected variations).

This better highlights that "AMD GCN has an upper limit of 'num_workers(16)'",
and the deficiency that "AMD GCN uses the autovectorizer for the vector
dimension: the use of a function call in vector-partitioned code [...] is not
currently supported".

And, this removes several instances of race conditions, where variables are
concurrently written to in OpenACC gang-redundant mode.

	libgomp/
	* testsuite/libgomp.oacc-c-c++-common/loop-gwv-1.c: Strengthen.
	* testsuite/libgomp.oacc-c-c++-common/loop-gwv-2.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-red-gwv-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-red-v-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-red-v-2.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-red-w-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-red-w-2.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-red-wv-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-v-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-w-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/loop-wv-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/routine-gwv-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/routine-v-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/routine-w-1.c: Likewise.
	* testsuite/libgomp.oacc-c-c++-common/routine-wv-1.c: Likewise.
2022-01-21 18:45:30 +01:00
Jason Merrill
23be9f83bb c++: [[no_unique_address]] and virtual base [PR104139]
Fixing a thinko in my patch for 103681: when computing the size of a virtual
base, it would help to use its binfo instead of the one for the derived
class.

	PR c++/104139
	PR c++/103681

gcc/cp/ChangeLog:

	* class.cc (end_of_class): Use base_binfo.

gcc/testsuite/ChangeLog:

	* g++.dg/abi/no_unique_address2.C: Adjust to detect this on x86-64.
2022-01-21 12:06:18 -05:00
Jonathan Wakely
45cae5b639 libstdc++: Fix typo in comment
libstdc++-v3/ChangeLog:

	* testsuite/20_util/shared_ptr/cons/array.cc: Fix comment.
2022-01-21 16:07:34 +00:00
Jonathan Wakely
b8806796ec libstdc++: Ensure all feature test macros have type long [PR87193]
This defines all the __cpp_lib_xxx macros as type long, as required by
the standard. We had an inconsistent mix of int and long, sometimes even
for the same macro name.

The __cpp_lib_experimental_xxx macros are left as type int, because
that's what it says in the relevant TS specs.

libstdc++-v3/ChangeLog:

	PR libstdc++/87193
	PR libstdc++/104019
	* include/bits/alloc_traits.h (__cpp_lib_allocator_traits_is_always_equal):
	Define as type long.
	* include/bits/allocator.h (__cpp_lib_incomplete_container_elements):
	Likewise.
	* include/bits/basic_string.h (__cpp_lib_string_udls): Likewise.
	* include/bits/chrono.h (__cpp_lib_chrono): Likewise.
	(__cpp_lib_chrono_udls): Likewise.
	* include/bits/move.h (__cpp_lib_addressof_constexpr): Likewise.
	* include/bits/node_handle.h (__cpp_lib_node_extract): Likewise.
	* include/bits/range_access.h (__cpp_lib_nonmember_container_access):
	Likewise.
	* include/bits/shared_ptr.h (__cpp_lib_enable_shared_from_this):
	Likewise.
	* include/bits/stl_algo.h (__cpp_lib_clamp): Likewise.
	(__cpp_lib_sample): Likewise.
	* include/bits/stl_algobase.h (__cpp_lib_robust_nonmodifying_seq_ops):
	Likewise.
	* include/bits/stl_function.h (__cpp_lib_transparent_operators):
	Likewise.
	* include/bits/stl_iterator.h (__cpp_lib_make_reverse_iterator):
	Likewise.
	* include/bits/stl_map.h (__cpp_lib_map_try_emplace):
	Likewise.
	* include/bits/stl_tree.h (__cpp_lib_generic_associative_lookup):
	Likewise.
	* include/bits/unique_ptr.h (__cpp_lib_make_unique):
	Likewise.
	* include/bits/unordered_map.h (__cpp_lib_unordered_map_try_emplace):
	Likewise.
	* include/c_global/cmath (__cpp_lib_hypot): Likewise.
	* include/c_global/cstddef (__cpp_lib_byte): Likewise.
	* include/std/atomic (__cpp_lib_atomic_is_always_lock_free):
	Likewise.
	* include/std/complex (__cpp_lib_complex_udls): Likewise.
	* include/std/filesystem (__cpp_lib_filesystem): Likewise.
	* include/std/functional (__cpp_lib_not_fn): Likewise.
	(__cpp_lib_boyer_moore_searcher): Likewise.
	* include/std/iomanip (__cpp_lib_quoted_string_io): Likewise.
	* include/std/mutex (__cpp_lib_scoped_lock): Likewise.
	* include/std/numeric (__cpp_lib_gcd_lcm): Likewise.
	(__cpp_lib_gcd, __cpp_lib_lcm): Likewise.
	* include/std/tuple (__cpp_lib_apply): Likewise.
	(__cpp_lib_make_from_tuple): Likewise.
	* include/std/type_traits (__cpp_lib_integral_constant_callable)
	(__cpp_lib_bool_constant, __cpp_lib_logical_traits)
	(__cpp_lib_is_null_pointer, __cpp_lib_transformation_trait_aliases)
	(__cpp_lib_result_of_sfinae, __cpp_lib_void_t)
	(__cpp_lib_is_swappable, __cpp_lib_is_invocable)
	(__cpp_lib_has_unique_object_representations)
	(__cpp_lib_is_aggregate): Likewise.
	* include/std/version: Likewise.
	* libsupc++/new (__cpp_lib_launder): Likewise.
2022-01-21 16:07:34 +00:00
Jonathan Wakely
2da1ef06ff libstdc++: Fix condition for __cpp_lib_shared_ptr_arrays
I changed the preprocessor condition from <= to < in r12-6574 which
meant the macro was not defined by <version> for C++17.

libstdc++-v3/ChangeLog:

	* include/std/version (__cpp_lib_shared_ptr_arrays): Fix
	condition for C++17 definition.
2022-01-21 16:07:33 +00:00
Martin Liska
97f8190934 Enable configure detection of ld.mold.
gcc/ChangeLog:

	* configure.ac: Detect ld_is_mold and use it for
	comdat_group=yes and gcc_cv_ld_hidden=yes.
	* configure: Regenerate.
2022-01-21 15:48:44 +01:00
Richard Biener
199cd0e0f8 tree-optimization/100089 - BB vectorization of if-converted loop bodies
The PR complains that when we only partially BB vectorize an
if-converted loop body that this can leave unvectorized code
unconditionally executed and thus effectively slow down code.
For -O2 we already mitigated the issue by not doing BB vectorization
when not all if-converted stmts were covered but the issue is
present with -O3 as well.  Thus the following simply extends the
fix to cover all but the unlimited cost models.  It is after all
very likely that we vectorize some stmts, if only a single
paired store.

2022-01-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100089
	* tree-vect-slp.cc (vect_slp_region): Reject BB vectorization
	of if-converted loops with unvectorized COND_EXPRs for
	all but the unlimited cost models.
2022-01-21 14:23:07 +01:00
Jonathan Wakely
7d47aae7cd libstdc++: Fix constexpr constructor for atomic<shared_ptr<T>>
libstdc++-v3/ChangeLog:

	* include/bits/shared_ptr_atomic.h (_Sp_atomic::_Atomic_count):
	Add constexpr.
	(_Sp_atomic::_M_ptr): Add default member-initializer.
	* testsuite/20_util/shared_ptr/atomic/atomic_shared_ptr.cc:
	Check constant initialization.
	* testsuite/20_util/weak_ptr/atomic_weak_ptr.cc: Likewise.
2022-01-21 13:21:27 +00:00
Richard Biener
caca8eddd9 sanitizer/99673 - bad -Wstringop-overread diagnostic with asan
The testcase got fixed by lowering of &MEM[ptr + CST] to ptr + CST.

2022-01-21  Richard Biener  <rguenther@suse.de>

	PR sanitizer/99673
	* gcc.dg/asan/pr99673.c: New testcase.
2022-01-21 13:58:35 +01:00
Ard Biesheuvel
9d7a84b969 [ARM] Add support for TLS register based stack protector canary access
Add support for accessing the stack canary value via the TLS register,
so that multiple threads running in the same address space can use
distinct canary values. This is intended for the Linux kernel running in
SMP mode, where processes entering the kernel are essentially threads
running the same program concurrently: using a global variable for the
canary in that context is problematic because it can never be rotated,
and so the OS is forced to use the same value as long as it remains up.

Using the TLS register to index the stack canary helps with this, as it
allows each CPU to context switch the TLS register along with the rest
of the process, permitting each process to use its own value for the
stack canary.

gcc/ChangeLog:

	* config/arm/arm-opts.h (enum stack_protector_guard): New.
	* config/arm/arm-protos.h (arm_stack_protect_tls_canary_mem):
	New.
	* config/arm/arm.cc (TARGET_STACK_PROTECT_GUARD): Define.
	(arm_option_override_internal): Handle and put in error checks.
	for stack protector guard options.
	(arm_option_reconfigure_globals): Likewise.
	(arm_stack_protect_tls_canary_mem): New.
	(arm_stack_protect_guard): New.
	* config/arm/arm.md (stack_protect_set): New.
	(stack_protect_set_tls): Likewise.
	(stack_protect_test): Likewise.
	(stack_protect_test_tls): Likewise.
	(reload_tp_hard): Likewise.
	* config/arm/arm.opt (-mstack-protector-guard): New
	(-mstack-protector-guard-offset): New.
	* doc/invoke.texi: Document new options.

gcc/testsuite/ChangeLog:

	* gcc.target/arm/stack-protector-7.c: New test.
	* gcc.target/arm/stack-protector-8.c: New test.
2022-01-21 12:12:26 +00:00
Richard Earnshaw
bab0f691d5 aarch64: Adjust spellcheck tests for recent quotation-mark changes
Adjust tests for quotation-mark and punctuation changes.

gcc/testsuite:

	* gcc.target/aarch64/spellcheck_1.c: Adjust tests for new output.
	* gcc.target/aarch64/spellcheck_2.c: Likewise.
	* gcc.target/aarch64/spellcheck_3.c: Likewise.
	* gcc.target/aarch64/spellcheck_7.c: Likewise.
2022-01-21 11:29:40 +00:00
Richard Biener
f953c8bc5b tree-optimization/104156 - fix unswitching compare-debug issue
When hoisting guards the unswitching pass does not properly ignore
debug stmts when looking for uses outside of the loop of defs
produced in the skipped region.  The following rectifies this
by instead collecting them and resetting them after the transform.

2022-01-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/104156
	* tree-ssa-loop-unswitch.cc (tree_unswitch_outer_loop):
	Collect and reset debug stmts with out-of-loop uses when
	hoisting guards.
	(find_loop_guard): Adjust.
	(empty_bb_without_guard_p): Likewise.  Ignore debug stmts.
	(used_outside_loop_p): Push debug uses to a vector of
	debug stmts to reset.
	(hoist_guard): Adjust -fopt-info category.

	* gcc.dg/loop-unswitch-6.c: New testcase.
2022-01-21 12:18:59 +01:00
Richard Biener
1ad7281124 tree-optimization/104152 - add missing check for SLP constant build
This adds a missing check to verify we can actually build an
invariant vector from components when SLP vectorizing an associatable
chain.

2022-01-21  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/104152
	* tree-vect-slp.cc (vect_build_slp_tree_2): Add missing
	can_duplicate_and_interleave_p check.

	* gcc.dg/vect/pr104152.c: New testcase.
2022-01-21 12:18:59 +01:00
Jakub Jelinek
3e0b19f1d6 warn-access: Fix up warning_at arguments
A warning regression fix I'm about to post warns (and breaks bootstrap due
to that) on the following spot.  Seems it is a copy and paste from
earlier code that mentions the %qD variable instead of talking about
unnamed temporary.

2022-01-21  Jakub Jelinek  <jakub@redhat.com>

	* gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
	Avoid passing var to warning_at when the format string doesn't
	refer to it.
2022-01-21 11:22:22 +01:00
Aldy Hernandez
eb5ee64648 Reset relations when crossing backedges.
As discussed in PR103721, the problem here is that we are crossing a
backedge and causing us to use relations from a previous iteration of a
loop.

This handles the testcases in both PR103721 and PR104067 which are variants
of the same thing.

Tested on x86-64 Linux with the usual regstrap as well as verifying the
thread count before and after the patch.  The number of threads is
reduced by a miniscule amount.

gcc/ChangeLog:

	PR tree-optimization/103721
	* gimple-range-path.cc
	(path_range_query::relations_may_be_invalidated): New.
	(path_range_query::compute_ranges_in_block): Reset relations if
	they may be invalidated.
	(path_range_query::maybe_register_phi_relation): Exit if relations
	may be invalidated on incoming edge.
	(path_range_query::compute_phi_relations): Pass incoming PHI edge
	to maybe_register_phi_relation.
	* gimple-range-path.h (relations_may_be_invalidated): New.
	(maybe_register_phi_relation): Pass edge instead of tree.
	* tree-ssa-threadbackward.cc (back_threader::back_threader):
	Mark DFS edges.
	* value-relation.cc (path_oracle::path_oracle): Call
	mark_dfs_back_edges.
	(path_oracle::register_relation): Add SSA names to m_registered
	bitmap.
	(path_oracle::reset_path): Clear m_registered bitmap.
	* value-relation.h (path_oracle::set_root_oracle): New.

gcc/testsuite/ChangeLog:

	* gcc.dg/pr103721-2.c: New test.
	* gcc.dg/pr103721.c: New test.
2022-01-21 11:19:07 +01:00
Jakub Jelinek
c2d9159717 optabs: Don't create pseudos in prepare_cmp_insn when not allowed [PR102478]
cond traps can be created during ce3 after reload (and e.g. PR103028
recently fixed some ce3 cond trap related bug, so I think often that
works fine and we shouldn't disable cond traps after RA altogether),
but it calls prepare_cmp_insn.  This function can fail, so I don't
see why we couldn't make it work after RA (in most cases it already
just works).  The first hunk is just an optimization which doesn't
make sense after RA, so I've guarded it with can_create_pseudo_p.
The second hunk is just a theoretical case, I don't have a testcase for it.
prepare_cmp_insn has some other spots that can create pseudos, like when
both operands have VOIDmode, or when it is BLKmode comparison, or
not OPTAB_DIRECT, but I think none of that applies to ce3, we punt on
BLKmode earlier, use OPTAB_DIRECT and shouldn't be comparing two
VOIDmode CONST_INTs.

2022-01-21  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/102478
	* optabs.cc (prepare_cmp_insn): If !can_create_pseudo_p (), don't
	force_reg constants and for -fnon-call-exceptions fail if copy_to_reg
	would be needed.

	* gcc.dg/pr102478.c: New test.
2022-01-21 11:16:50 +01:00
Jeff Law
6f45deb2ae [committed] Fix expected output for various MIPS multiplication tests
The recent multiply-highpart work twiddled code generation on the MIPS targets
and is causing mips.exp failures.

The resultant code is actually better and matches a comment in the test files
which indicates that it would be better to generate a mult-highpart.  So I'm
pretty confident in removing the undesired mflo & changing the name of the
target pattern we expect to see.

This fixes the mips64 and mips64el failures in my tester.  I suspect it'll
also fix the failures on mipsisa32, but that target is bootstrapped with qemu --
which takes forever so it only runs once a week ;-)

gcc/testsuite
	* gcc.target/mips/fix-r4000-2.c: Update expected output.
	* gcc.target/mips/fix-r4000-3.c: Update expected output.  Add
	-fexpensive-optimizations for consistency in output.
	* gcc.target/mips/fix-r4000-7.c: Update expected output.
	* gcc.target/mips/fix-r4000-8.c: Update expected output.
2022-01-20 23:48:03 -05:00
Ian Lance Taylor
39cd3cce52 runtime: build panic32.go on amd64p32
Fixes https://gcc.gnu.org/PR104149

Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/380054
2022-01-20 19:06:50 -08:00
GCC Administrator
5fa55d55ab Daily bump. 2022-01-21 00:16:28 +00:00
David Malcolm
c4b8f3730a analyzer: reject ((i + 1 > 0) && (i < 0)) for integers [PR94362]
PR analyzer/94362 reports a false positive from
-Wanalyzer-null-dereference seen when analyzing OpenSSL.

The root cause is that the analyzer's path feasibility checker
erroneously considers this to be feasible:
  (R + 1 > 0) && (R < 0)
for int R (the return value from sk_EVP_PKEY_ASN1_METHOD_num),
whereas it's not satisfiable for any int R.

This patch makes the constraint manager try harder to reject
such combinations of conditions, fixing the false positive;
perhaps in the longer term we ought to use an SMT solver.

gcc/analyzer/ChangeLog:
	PR analyzer/94362
	* constraint-manager.cc (bound::ensure_closed): Convert param to
	enum bound_kind.
	(range::constrained_to_single_element): Likewise.
	(range::add_bound): New.
	(constraint_manager::add_constraint): Handle SVAL + OFFSET
	compared to a constant.
	(constraint_manager::get_ec_bounds): Rewrite in terms of
	range::add_bound.
	(constraint_manager::eval_condition): Reject if range::add_bound
	fails.
	(selftest::test_constant_comparisons): Add test coverage for
	various impossible combinations of integer comparisons.
	* constraint-manager.h (enum bound_kind): New.
	(struct bound): Likewise.
	(bound::ensure_closed): Convert to param to enum bound_kind.
	(struct range): Convert to...
	(class range): ...this, making fields private.
	(range::add_bound): New decls.
	* region-model.cc (region_model::add_constraint): Fail if
	constraint_manager::add_constraint fails.

gcc/testsuite/ChangeLog:
	PR analyzer/94362
	* gcc.dg/analyzer/pr94362-1.c: New test.
	* gcc.dg/analyzer/pr94362-2.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2022-01-20 18:43:28 -05:00
David Malcolm
f5a9d76be8 analyzer: add regression test [PR103685]
PR analyzer/103685 reports a false positive from -Wanalyzer-null-dereference
seen at -O2 with GCC 11.  I can reproduce it with GCC 11, but not with
trunk; this patch adds a reduced test case that reproduces it with
GCC 11 as a regression test for GCC 12 onwards.

gcc/testsuite/ChangeLog:
	PR analyzer/103685
	* gcc.dg/analyzer/torture/pr103685.c: New test.

Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2022-01-20 18:42:33 -05:00
Sandra Loosemore
d2ad748eee Fortran: Fix scope for OMP AFFINITY clause iterator variables [PR103695]
gfc_finish_var_decl was confused by the undocumented overloading of
the proc_name field in struct gfc_namespace to contain iterator
variables for the OpenMP AFFINITY clause, causing it to insert the
decls in the wrong scope.  This patch adds a new distinct field to
hold these variables.

2022-01-20  Sandra Loosemore  <sandra@codesourcery.com>

	PR fortran/103695
	PR fortran/102621

	gcc/fortran
	* gfortran.h (struct gfc_namespace) Add omp_affinity_iterator
	field.
	* dump-parse-tree.cc (show_iterator): Use it.
	* openmp.cc (gfc_match_iterator): Likewise.
	(resolve_omp_clauses): Likewise.
	* trans-decl.cc (gfc_finish_var_decl): Likewise.
	* trans-openmp.cc (handle_iterator): Likewise.

	gcc/testsuite/
	* gfortran.dg/gomp/affinity-clause-3.f90: Adjust pattern.
	* gfortran.dg/gomp/pr102621.f90: New.
	* gfortran.dg/gomp/pr103695.f90: New.
2022-01-20 13:29:48 -08:00
Jason Merrill
cc01cd9397 c++: designator for base class member [PR101405]
A C++20 designator must name a direct non-static member of the class; in
this case it names a member of a base class, and we should give an error
instead of crashing.

	PR c++/101405

gcc/cp/ChangeLog:

	* decl.cc (reshape_init_class): Reject designator for a member of
	another class.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/desig20.C: New test.
2022-01-20 15:23:43 -05:00
Marek Polacek
30b38394b4 c++: Add test for fixed PR [PR102338]
This was fixed by r12-6025 and is sufficiently different from
noexcept71.C that I think we should add it.

	PR c++/102338

gcc/testsuite/ChangeLog:

	* g++.dg/cpp1y/noexcept2.C: New test.
2022-01-20 15:02:21 -05:00
Patrick Palka
2f34d7ef3d c++: add testcase for recently fixed PR [PR103631]
We accept this testcase after r12-6773.

	PR c++/103631

gcc/testsuite/ChangeLog:

	* g++.dg/cpp2a/nontype-class51.C: New test.
2022-01-20 13:12:16 -05:00
Richard Biener
5c12507f5d middle-end/100786 - constant folding from incompatible alias
The following avoids us ICEing doing constant folding from variables
with aliases of different types.  The issue appears both in
folding and CCP and FRE can do more fancy stuff to still constant
fold cases where the load is smaller than the initializer so
defer it to there.

2022-01-20  Richard Biener  <rguenther@suse.de>

	PR middle-end/100786
	* gimple-fold.cc (get_symbol_constant_value): Only return
	values of compatible type to the symbol.

	* gcc.dg/torture/pr100786.c: New testcase.
2022-01-20 16:50:34 +01:00
Richard Earnshaw
62eb400b51 aarch64: allow ld1/stq in test output [PR102517]
Following the changes to the inline memcpy operations get expanded, we
now generate ld1/st1 using a 128-bit vector register rather than ldp
with Q registers.  The behaviour is equivalent, so relax the tests to
permit either variant.

gcc/testsuite/ChangeLog:

	PR target/102517
	* gcc.target/aarch64/cpymem-q-reg_1.c: Allow ld1 and st1 for the
	memcpy expansion.
2022-01-20 15:44:11 +00:00
Andrew MacLeod
6b73c07ec2 Only add equivalencies that are still valid.
When equivalencies sets are merged, each member of the set should be queried
to ensure its still valid rather than a bulk union.

	* value-relation.cc (relation_oracle::valid_equivs): Query and add
	if valid members of a set.
	(equiv_oracle::register_equiv): Call valid_equivs rather than
	bitmap direct operations.
	(path_oracle::register_equiv): Ditto.
	* value-relation.h (relation_oracle::valid_equivs): New prototype.
2022-01-20 10:26:01 -05:00
Patrick Palka
09845ad756 c++: CTAD inside alias template [PR91911, PR103672]
In the first testcase below, when processing the alias template
ConstSpanType, transparency of alias template specializations means we
replace SpanType<T> with its instantiated definition.  But this
instantiation lowers the level of the CTAD placeholder for span{T()} from
2 to 1, and so the later instantiation of ConstSpanType<int> erroneously
substitutes this CTAD placeholder with the template argument at level 1
index 0, i.e. with int, before we get a chance to perform the CTAD.

Although we represent CTAD placeholders as template parameters, we never
actually want to replace them via tsubst.  So this patch adjusts tsubst
to handle CTAD placeholders by simply substituting the template and
returning a new CTAD placeholder.  Moreover, this means that the level
of a CTAD placeholder doesn't matter, so we may as well give them all
the same level.  This patch gives them the special level 0.

The change in tsubst_decl removes a likely dead !CHECKING_P safeguard
added in 2017, which would otherwise now get triggered for variables
with CTAD placeholder types (since their level is 0).

	PR c++/91911
	PR c++/103672

gcc/cp/ChangeLog:

	* pt.cc (keep_template_parm): Punt on a level 0 template parm.
	(tsubst_decl) <case VAR_DECL>: Remove !CHECKING_P safeguard.
	(tsubst) <case TEMPLATE_TYPE_PARM>: Handle CTAD placeholders
	specially.
	(make_auto_1): Add defaulted 'level' parameter.
	(make_template_placeholder): Pass 0 as 'level' to make_auto_1.

gcc/testsuite/ChangeLog:

	* g++.dg/cpp1z/class-deduction101.C: New test.
	* g++.dg/cpp1z/class-deduction101a.C: New test.
	* g++.dg/cpp1z/class-deduction101b.C: New test.
	* g++.dg/cpp1z/class-deduction102.C: New test.
	* g++.dg/cpp1z/class-deduction102a.C: New test.
	* g++.dg/cpp1z/class-deduction102b.C: New test.
	* g++.dg/cpp1z/class-deduction103.C: New test.
2022-01-20 09:25:49 -05:00
Patrick Palka
2cda2bfa3f c++: consistently diagnose bare CTAD placeholder in fn return type
Relax slightly the existing check for diagnosing a bare CTAD placeholder
as the return type of a function declarator to also handle the abstract
declarator case.

gcc/cp/ChangeLog:

	* decl.cc (grokdeclarator): Diagnose a CTAD placeholder as
	function return type even when !funcdecl_p.

gcc/testsuite/ChangeLog:

	* g++.dg/other/pr88187.C: Adjust expected C++17 diagnostic.
2022-01-20 09:22:27 -05:00
Richard Biener
d63d9c3dd1 target/100784 - avoid ICE with folding __builtin_ia32_shufpd
This avoids ICEing when there is no LHS on the call by following
what foldings of other builtins do in , namely not folding.

2022-01-20  Richard Biener  <rguenther@suse.de>

	PR target/100784
	* config/i386/i386.cc (ix86_gimple_fold_builtin): Check for
	LHS before folding __builtin_ia32_shufpd and friends.
2022-01-20 15:19:15 +01:00
Martin Liska
ce9e0cc5da MAINTAINERS: adjust requested email address
ChangeLog:

	* MAINTAINERS: Adjust email address based on IRC request.
2022-01-20 13:40:42 +01:00
Jonathan Wakely
109f8af3d3 libstdc++: Use Clang attribute instead of __constinit
Clang doesn't support the __constinit extension that we use pre-C++20,
but it does have its own equivalent attribute that can be used instead.

This makes it a little easier to use Clang to build libstdc++ (which
isn't supported. but is sometimes attempted for esoteric targets).

libstdc++-v3/ChangeLog:

	* src/c++11/cxx11-ios_failure.cc (__constinit): Define as
	equivalent attribute for Clang.
	* src/c++11/future.cc (__constinit): Likewise.
	* src/c++11/system_error.cc (__constinit): Likewise.
	* src/c++17/memory_resource.cc (__constinit): Likewise.
2022-01-20 12:29:29 +00:00
Jonathan Wakely
5929f253fc libstdc++: Only add valid -L paths to testsuite linker options
The MacOS linker warns about -L arguments that don't exist, which causes
all tests to fail for the defauly configuration (because libbacktrace
isn't built).

libstdc++-v3/ChangeLog:

	* scripts/testsuite_flags.in: Only add src/filesystem/.libs and
	src/libbacktrace/.libs to LDFLAGS if those directories exist.
2022-01-20 12:29:29 +00:00
Richard Earnshaw
9b42782366 arm: Add test for AES erratum mitigation
Add a testcase for the erratum mitigation.  To improve coverage
use -dp on the assembler output and match the pattern names (and where
needed the alternative number).

gcc/testsuite/ChangeLog:

	* gcc.target/arm/crypto-vaese-erratum1.c: New test.
2022-01-20 11:15:27 +00:00
Richard Earnshaw
997070498b arm: elide some cases where the AES erratum workaround is not required.
Some common cases where the AES erratum workaround are not required
are when there are 64- or 128-bit loads from memory, moving a 128-bit
value from core registers, and where a 128-bit constant is being
loaded from a literal pool.  The loads may also be misaligned or
generated via a neon intrinsic function.

gcc/ChangeLog:

	* config/arm/crypto.md (aes_op_protect): Allow moves from core
	registers and from memory.
	(aes_op_protect_misalign_load): New pattern.
	(aes_op_protect_neon_vld1v16qi): New pattern.
2022-01-20 11:15:26 +00:00
Richard Earnshaw
2078550a00 arm: suppress aes erratum when forwarding from aes
AES operations are commonly chained and since the result of one AES
operation is never a 32-bit value, they do not need an additional
mitigation instruction for the forwarded result.  We handle this
common case by adding additional patterns that allow for this.

gcc/ChangeLog:

	* config/arm/crypto.md (crypto_<CRYPTO_AESMC:crypto_pattern>_protected):
	New pattern.
	(aarch32_crypto_aese_fused_protected): Likewise.
	(aarch32_crypto_aesd_fused_protected): Likewise.
2022-01-20 11:15:22 +00:00
Richard Earnshaw
bc13384e19 arm: add basic mitigation for Cortex-A AES errata
This patch adds the basic patterns for mitigation of the erratum, but no
attempt is made at this point to optimize the results for the cases where
the erratum mitigation is not needed.

The mitigation is done by guaranteeing that the input operands are fed
from a full-width operation by using an identity operation on the input
values.

gcc/ChangeLog:

	* config/arm/crypto.md (crypto_<CRYPTO_AES:crypto_pattern>): Convert
	to define_expand.  Add mitigation for the Cortex-A AES erratum
	when enabled.
	(*crypto_<CRYPTO_AES:crypto_pattern>_insn): New pattern, based
	on original crypto_<CRYPTO_AES:crypto_pattern> insn.
	(aes_op_protect): New pattern.
	* config/arm/unspecs.md (unspec): Add UNSPEC_AES_PROTECT.
2022-01-20 11:14:44 +00:00
Richard Earnshaw
facbc2368c arm: Add option for mitigating against Cortex-A CPU erratum for AES
Add a new option -mfix-cortex-a-aes for enabling the Cortex-A AES
erratum work-around and enable it automatically for the affected
products (Cortex-A57 and Cortex-A72).

gcc/ChangeLog:

	* config/arm/arm-cpus.in (quirk_aes_1742098): New quirk feature
	(ALL_QUIRKS): Add it.
	(cortex-a57, cortex-a72): Enable it.
	(cortex-a57.cortex-a53, cortex-a72.cortex-a53): Likewise.
	* config/arm/arm.opt (mfix-cortex-a57-aes-1742098): New command-line
	option.
	(mfix-cortex-a72-aes-1655431): New option alias.
	* config/arm/arm.cc (arm_option_override): Handle default settings
	for AES erratum switch.
	* doc/invoke.texi (Arm Options): Document new options.
2022-01-20 11:14:43 +00:00
Richard Earnshaw
c471ee0f05 arm: Consistently use crypto_mode attribute in crypto patterns
A couple of patterns in the crypto support code were hard-coding the
mode rather than using the iterators.  While not incorrect, it was
slightly confusing, so adapt those patterns to the style of the rest
of the file.

Also fix some white space issues.

gcc/ChangeLog:

	* config/arm/crypto.md (crypto_<CYRPTO_AES:crypto_pattern>): Use
	<crypto_mode> rather than hard-coding the mode.
	(crypto_<CRYPTO_AESMC:crypto_pattern>): Fix white space.
	(crypto_<CRYPTO_AES:crypto_pattern>): Likewise.
	(*aarch32_crypto_aese_fused): Likewise.
	(*aarch32_crypto_aesd_fused): Likewise.
	(crypto_<CRYPTO_BINARY:crypto_pattern>): Likewise.
	(crypto_<CRYPTO_TERNARY:crypto_pattern>): Likewise.
	(crypto_sha1h_lb): Likewise.
	(crypto_vmullp64): Likewise.
	(crypto_<CRYPTO_SELECTING:crypto_pattern>): Likewise.
	(crypto_<CRYPTO_SELECTING:crypto_pattern>_lb): Likewise.
2022-01-20 11:14:43 +00:00
Richard Earnshaw
0042ca7b77 arm: Disambiguate multiple crypto patterns with the same name.
No functional change, but arm/crypto.md has multiple pattenrs all
called crypto_<crypto_pattern>, which makes references to them
ambiguous, so add the iterator base to the pattern name so that it is
distinct in the commit logs.

gcc/ChangeLog:

	* config/arm/crypto.md (crypto_<CRYPTO_AESMC:crypto_pattern>): Add
	iterator to pattern name to disambiguate.
	(crypto_<CRYPTO_AES:crypto_pattern>): Likewise.
	(crypto_<CRYPTO_BINARY:crypto_pattern>): Likewise.
	(crypto_<CRYPTO_TERNARY:crypto_pattern>): Likewise.
	(crypto_<CRYPTO_SELECTING:crypto_pattern>): Likewise.
	(crypto_<CRYPTO_SELECTING:crypto_pattern>_lb): Likewise.
2022-01-20 11:14:43 +00:00
Martin Liska
6d51a27fb1 Fix Werror=format-diag with --disable-nls.
PR c++/104134

gcc/cp/ChangeLog:

	* error.cc (dump_aggr_type): Partially disable the warning.
2022-01-20 12:03:06 +01:00
Martin Liska
e744aa373d Fix -Werror=format-diag with RTL checking
PR bootstrap/104135

gcc/ChangeLog:

	* emit-rtl.cc (make_insn_raw): Fix -Wformat-diag warnings.
	* rtl.cc: Partially disable -Wformat-diag for RTL checking
	error messages.
2022-01-20 12:03:06 +01:00
Jakub Jelinek
68f03ac49c dwarf2out: Fix -gsplit-dwarf on riscv [PR103874]
riscv*-*-* are the only modern targets that !HAVE_AS_LEB128 (apparently
due to some aggressive linker optimizations).
As the following testcase shows, we mishandle in index_rnglists the
!HAVE_AS_LEB128 && !have_multiple_function_sections case.

output_rnglists does roughly:
  FOR_EACH_VEC_SAFE_ELT (ranges_table, i, r)
    {
...
      if (block_num > 0)
        {
...
          if (HAVE_AS_LEB128)
            {
              if (!have_multiple_function_sections)
                {
                  // code not using r->*_entry
                  continue;
                }
              // code that sometimes doesn't use r->*_entry,
              // sometimes r->begin_entry
            }
          else if (dwarf_split_debug_info)
            {
              // code that uses both r->begin_entry and r->end_entry
            }
          else
            {
              // code not using r->*_entry
            }
        }
      else if (block_num < 0)
        {
          if (!have_multiple_function_sections)
            gcc_unreachable ();
...
        }
    }
and index_rnglists is what sets up those r->{begin,end}_entry members.
The code did an early if (!have_multiple_function_sections) continue;
which is fine for the HAVE_AS_LEB128 case, because r->*_entry is not
used in that case, but not for !HAVE_AS_LEB128 that uses it anyway.

2022-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR debug/103874
	* dwarf2out.cc (index_rnglists): For !HAVE_AS_LEB128 and
	block_num > 0, index entry even if !have_multiple_function_sections.

	* gcc.dg/debug/dwarf2/pr103874.c: New test.
2022-01-20 11:58:20 +01:00