Martin Liska
dd7bda5eb2
tracer ported to new fibonacci_heap data structure.
...
* tracer.c (tail_duplicate): New fibonacci_heap class is used.
From-SVN: r217722
2014-11-18 16:15:52 +00:00
Martin Liska
8d261514a7
fibonacci_heap is used for bb-reoder purpose.
...
* bb-reorder.c (mark_bb_visited): New fibonacci_heap is used.
(find_traces): Likewise.
(find_traces_1_round): Likewise.
From-SVN: r217721
2014-11-18 16:13:05 +00:00
Martin Liska
4a91004954
New template fibonacci_heap class introduced.
...
* fibonacci_heap.h: New file.
(fibonacci_heap::insert): Created from fibheap_insert.
(fibonacci_heap::empty): Created from fibheap_empty.
(fibonacci_heap::nodes): Created from fibheap_nodes.
(fibonacci_heap::min_key): Created from fibheap_min_key.
(fibonacci_heap::decrease_key): Created from fibheap_replace_key.
(fibonacci_heap::replace_key_data): Created from fibheap_replace_key_data.
(fibonacci_heap::extract_min): Created from fibheap_extract_min.
(fibonacci_heap::min): Created from fibheap_min.
(fibonacci_heap::replace_data): Created from fibheap_replace_data.
(fibonacci_heap::delete_node): Created from fibheap_delete_node.
(fibonacci_heap::union_with): Created from fibheap_union.
* ipa-inline.c (update_edge_key): New heap API is used.
(update_caller_keys): Likewise.
(update_callee_keys): Likewise.
(lookup_recursive_calls): Likewise.
(recursive_inlining): Likewise.
(add_new_edges_to_heap): Likewise.
(heap_edge_removal_hook): Likewise.
(inline_small_functions): Likewise.
From-SVN: r217720
2014-11-18 16:09:11 +00:00
Paolo Carlini
1b85e4b23b
re PR c++/55942 ([C++11] sorry, unimplemented: calling a member function of the object being constructed in a constant expression)
...
2014-11-18 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/55942
* g++.dg/cpp0x/constexpr-55942.C: New.
From-SVN: r217719
2014-11-18 16:02:58 +00:00
Marek Polacek
bebcdc6742
re PR sanitizer/63866 (ICE in C++ printer with -fdump-ipa)
...
PR sanitizer/63866
* asan.c (asan_global_struct): Create a TYPE_DECL for "__asan_global",
put it into TYPE_NAME and TYPE_STUB_DECL.
* ubsan.c (ubsan_type_descriptor_type): New variable.
Function renamed to ...
(ubsan_get_type_descriptor_type): ... this. Cache
return value in ubsan_type_descriptor_type variable.
Create a TYPE_DECL for "__ubsan_type_descriptor", put it into
TYPE_NAME and TYPE_STUB_DECL.
(ubsan_get_source_location_type): Create a TYPE_DECL for
"__ubsan_source_location", put it into TYPE_NAME and TYPE_STUB_DECL.
(ubsan_type_descriptor, ubsan_create_data): Call
ubsan_get_type_descriptor_type instead of ubsan_type_descriptor_type.
Create a TYPE_DECL for name, put it into TYPE_NAME and TYPE_STUB_DECL.
* c-c++-common/ubsan/pr63866.c: New test.
From-SVN: r217718
2014-11-18 14:55:44 +00:00
Felix Yang
594bdd53d8
aarch64.c (doloop_end): New pattern.
...
* config/aarch64/aarch64.c (doloop_end): New pattern.
* config/aarch64/aarch64.md (TARGET_CAN_USE_DOLOOP_P): Implement.
From-SVN: r217717
2014-11-18 14:45:09 +00:00
Jason Merrill
ef768ba353
* pt.c (instantiate_template_1): Use tsubst_aggr_type for context.
...
From-SVN: r217716
2014-11-18 09:36:48 -05:00
Jason Merrill
59f1d0db7a
* tree.c (warn_deprecated_use): Show declaration with inform.
...
From-SVN: r217714
2014-11-18 08:36:38 -05:00
Jason Merrill
023d89c70b
re PR c++/58102 (rejects valid initialization of constexpr object with mutable member)
...
PR c++/58102
* typeck2.c (store_init_value): Set it.
* cp-tree.h (CONSTRUCTOR_MUTABLE_POISON): New.
* constexpr.c (cxx_eval_outermost_constant_expr): Check it.
From-SVN: r217713
2014-11-18 08:34:08 -05:00
Richard Biener
bee1d47857
re PR tree-optimization/63914 (ICE in set_lattice_value, at tree-ssa-ccp.c:517)
...
2014-11-18 Richard Biener <rguenther@suse.de>
PR tree-optimization/63914
* tree-ssa-ccp.c (canonicalize_value): Remove float value
canonicalization.
(valid_lattice_transition): Allow (partial) transition
from NaN to non-NaN if !HONOR_NANS.
(set_lattice_value): Check for valid lattice transitions
only when checking is enabled.
* gcc.dg/pr63914.c: New testcase.
From-SVN: r217712
2014-11-18 13:03:46 +00:00
Paolo Carlini
60dcf0e053
re PR c++/55443 (ICE for some placement new expressions inside noexcept operator)
...
2014-11-18 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/55443
* g++.dg/cpp0x/noexcept26.C: New.
* g++.dg/cpp0x/noexcept27.C: Likewise.
From-SVN: r217711
2014-11-18 12:24:34 +00:00
Bernd Schmidt
3a4d1cb198
Fix header conflicts in nvptx.
...
* config/nvptx/nvptx.c: Include <sstream> directly after "config.h".
From-SVN: r217710
2014-11-18 12:13:26 +00:00
Paolo Carlini
a6965b6517
re PR c++/60245 (function with using defined parameter not accepted as constexpr parameter)
...
2014-11-18 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/60245
* g++.dg/cpp0x/constexpr-60245.C: New.
From-SVN: r217709
2014-11-18 11:57:16 +00:00
Paolo Carlini
6e9394078a
re PR c++/60771 (static in-class constexpr const reference initialization)
...
2014-11-18 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/60771
* g++.dg/cpp0x/constexpr-ref6.C: New.
From-SVN: r217708
2014-11-18 11:25:47 +00:00
Christophe Lyon
c819692161
neon-testgen.ml (emit_prologue): Handle new compile_test_optim argument.
...
2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/neon-testgen.ml (emit_prologue): Handle new
compile_test_optim argument.
(emit_automatics): Rename to emit_variables. Support variable
indentation of its output.
(compile_test_optim): New function.
(test_intrinsic): Call compile_test_optim.
* config/arm/neon.ml (features): Add Compiler_optim.
(ops): Add Compiler_optim feature to Vbic and Vorn.
(type_in_crypto_only): Replace 'or' by '||'.
(reinterp): Likewise.
(reinterpq): Likewise.
testsuite/
* gcc.target/arm/neon/vbicQs16.c: Regenerate.
* gcc.target/arm/neon/vbicQs32.c: Likewise.
* gcc.target/arm/neon/vbicQs64.c: Likewise.
* gcc.target/arm/neon/vbicQs8.c: Likewise.
* gcc.target/arm/neon/vbicQu16.c: Likewise.
* gcc.target/arm/neon/vbicQu32.c: Likewise.
* gcc.target/arm/neon/vbicQu64.c: Likewise.
* gcc.target/arm/neon/vbicQu8.c: Likewise.
* gcc.target/arm/neon/vbics16.c: Likewise.
* gcc.target/arm/neon/vbics32.c: Likewise.
* gcc.target/arm/neon/vbics64.c: Likewise.
* gcc.target/arm/neon/vbics8.c: Likewise.
* gcc.target/arm/neon/vbicu16.c: Likewise.
* gcc.target/arm/neon/vbicu32.c: Likewise.
* gcc.target/arm/neon/vbicu64.c: Likewise.
* gcc.target/arm/neon/vbicu8.c: Likewise.
* gcc.target/arm/neon/vornQs16.c: Likewise.
* gcc.target/arm/neon/vornQs32.c: Likewise.
* gcc.target/arm/neon/vornQs64.c: Likewise.
* gcc.target/arm/neon/vornQs8.c: Likewise.
* gcc.target/arm/neon/vornQu16.c: Likewise.
* gcc.target/arm/neon/vornQu32.c: Likewise.
* gcc.target/arm/neon/vornQu64.c: Likewise.
* gcc.target/arm/neon/vornQu8.c: Likewise.
* gcc.target/arm/neon/vorns16.c: Likewise.
* gcc.target/arm/neon/vorns32.c: Likewise.
* gcc.target/arm/neon/vorns64.c: Likewise.
* gcc.target/arm/neon/vorns8.c: Likewise.
* gcc.target/arm/neon/vornu16.c: Likewise.
* gcc.target/arm/neon/vornu32.c: Likewise.
* gcc.target/arm/neon/vornu64.c: Likewise.
* gcc.target/arm/neon/vornu8.c: Likewise.
From-SVN: r217707
2014-11-18 12:19:52 +01:00
Christophe Lyon
58332aa080
vcls.c: New test.
...
2014-11-18 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.target/aarch64/advsimd-intrinsics/vcls.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcnt.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcombine.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcreate.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vcvt.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vext.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vget_high.c: New test.
* gcc.target/aarch64/advsimd-intrinsics/vget_low.c: New test.
From-SVN: r217706
2014-11-18 12:16:03 +01:00
Alan Lawrence
fcfce895d3
[AArch64]Replace temporary assembler for vld1_dup
...
* config/aarch64/arm_neon.h (vld1_dup_f32, vld1_dup_f64, vld1_dup_p8,
vld1_dup_p16, vld1_dup_s8, vld1_dup_s16, vld1_dup_s32, vld1_dup_s64,
vld1_dup_u8, vld1_dup_u16, vld1_dup_u32, vld1_dup_u64, vld1q_dup_f32,
vld1q_dup_f64, vld1q_dup_p8, vld1q_dup_p16, vld1q_dup_s8, vld1q_dup_s16,
vld1q_dup_s32, vld1q_dup_s64, vld1q_dup_u8, vld1q_dup_u16,
vld1q_dup_u32, vld1q_dup_u64): Replace inline asm with vdup_n_ and
pointer dereference.
From-SVN: r217705
2014-11-18 11:06:05 +00:00
Alexander Ivchenko
ff83f9c8e9
safe-3.c: Add bind_pic_locally.
...
gcc/testsuite
* c-c++-common/tm/safe-3.c: Add bind_pic_locally.
* g++.dg/ipa/devirt-15.C: Ditto.
* g++.dg/ipa/devirt-7.C: Ditto.
* g++.dg/ipa/pr60600.C: Ditto.
* g++.dg/opt/vt2.C: Ditto.
* g++.dg/opt/vt4.C: Ditto.
* g++.dg/pr48484.C: Ditto.
* g++.dg/tm/pr47746.C: Ditto.
* g++.dg/tree-ssa/pr57380.C: Ditto.
* gcc.dg/ipa/inline-4.c: Ditto.
* gcc.dg/ipa/inlinehint-1.c: Ditto.
* gcc.dg/ipa/inlinehint-2.c: Ditto.
* gcc.dg/ipa/inlinehint-3.c: Ditto.
* gcc.dg/pr47276.c: Ditto.
* gcc.dg/pure-2.c: Ditto.
* gcc.dg/tm/nested-2.c: Ditto.
* gcc.dg/tree-ssa/alias-29.c: Ditto.
* gcc.target/i386/3dnow-1.c: Ditto.
* gcc.target/i386/3dnow-2.c: Ditto.
* gcc.target/i386/3dnowA-1.c: Ditto.
* gcc.target/i386/3dnowA-2.c: Ditto.
* gcc.target/i386/avx-1.c: Ditto.
* gcc.target/i386/avx-2.c: Ditto.
* gcc.target/i386/memcpy-1.c: Ditto.
* gcc.target/i386/mmx-1.c: Ditto.
* gcc.target/i386/mmx-2.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-22a.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/sse-24.c: Ditto.
* gcc.target/i386/vect-double-1.c: Ditto.
* g++.dg/fstack-protector-strong.C: Add target nonpic.
* gcc.dg/fstack-protector-strong.c: Ditto.
From-SVN: r217704
2014-11-18 10:53:13 +00:00
Hale Wang
f89e12f21b
small-multiply-m0-1.c: Only apply when "-mcpu=cortex-m0/m1/m0plus.small-multiply".
...
2014-11-18 Hale Wang <hale.wang@arm.com>
* gcc.target/arm/small-multiply-m0-1.c: Only apply when
"-mcpu=cortex-m0/m1/m0plus.small-multiply".
* gcc.target/arm/small-multiply-m0-2.c: Likewise.
* gcc.target/arm/small-multiply-m0-3.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-1.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-2.c: Likewise.
* gcc.target/arm/small-multiply-m0plus-3.c: Likewise.
* gcc.target/arm/small-multiply-m1-1.c: Likewise.
* gcc.target/arm/small-multiply-m1-2.c: Likewise.
* gcc.target/arm/small-multiply-m1-3.c: Likewise.
From-SVN: r217703
2014-11-18 10:48:15 +00:00
Marc Glisse
092404511f
tree.c (element_mode, [...]): New functions.
...
2014-11-18 Marc Glisse <marc.glisse@inria.fr>
* tree.c (element_mode, integer_truep): New functions.
* tree.h (element_mode, integer_truep): Declare them.
* fold-const.c (negate_expr_p, fold_negate_expr, combine_comparisons,
fold_cond_expr_with_comparison, fold_real_zero_addition_p,
fold_comparison, fold_ternary_loc, tree_call_nonnegative_warnv_p,
fold_strip_sign_ops): Use element_mode.
(fold_binary_loc): Use element_mode and element_precision.
* match.pd: Use integer_truep, element_mode, element_precision,
VECTOR_TYPE_P and build_one_cst. Extend some transformations to
vectors. Simplify A/-A.
From-SVN: r217702
2014-11-18 10:26:31 +00:00
Kyrylo Tkachov
9f37760abe
[ARM] Use std::swap instead of manually swapping
...
* config/arm/arm.md (unaligned_loaddi): Use std::swap instead of
manual swapping implementation.
(movcond_addsi): Likewise.
* config/arm/arm.c (arm_canonicalize_comparison): Likewise.
(arm_select_dominance_cc_mode): Likewise.
(arm_reload_out_hi): Likewise.
(gen_operands_ldrd_strd): Likewise.
(output_move_double): Likewise.
(arm_print_operand_address): Likewise.
(thumb_output_move_mem_multiple): Likewise.
(SWAP_RTX): Delete.
From-SVN: r217701
2014-11-18 10:10:53 +00:00
James Greenhalgh
bd79363ce0
[Patch ARM Refactor Builtins 8/8] Neaten up the ARM Neon builtin infrastructure
...
gcc/
* config/arm/arm-builtins.c (CONVERT_QUALIFIERS): Delete.
(COPYSIGNF_QUALIFIERS): Likewise.
(CREATE_QUALIFIERS): Likewise.
(DUP_QUALIFIERS): Likewise.
(FLOAT_WIDEN_QUALIFIERS): Likewise.
(FLOAT_NARROW_QUALIFIERS): Likewise.
(REINTERP_QUALIFIERS): Likewise.
(RINT_QUALIFIERS): Likewise.
(SPLIT_QUALIFIERS): Likewise.
(FIXCONV_QUALIFIERS): Likewise.
(SCALARMUL_QUALIFIERS): Likewise.
(SCALARMULL_QUALIFIERS): Likewise.
(SCALARMULH_QUALIFIERS): Likewise.
(SELECT_QUALIFIERS): Likewise.
(VTBX_QUALIFIERS): Likewise.
(SHIFTIMM_QUALIFIERS): Likewise.
(SCALARMAC_QUALIFIERS): Likewise.
(LANEMUL_QUALIFIERS): Likewise.
(LANEMULH_QUALIFIERS): Likewise.
(LANEMULL_QUALIFIERS): Likewise.
(SHIFTACC_QUALIFIERS): Likewise.
(SHIFTINSERT_QUALIFIERS): Likewise.
(VTBL_QUALIFIERS): Likewise.
(LOADSTRUCT_QUALIFIERS): Likewise.
(LOADSTRUCTLANE_QUALIFIERS): Likewise.
(STORESTRUCT_QUALIFIERS): Likewise.
(STORESTRUCTLANE_QUALIFIERS): Likewise.
(neon_builtin_type_mode): Delete.
(v8qi_UP): Map to V8QImode.
(v8qi_UP): Map to V8QImode.
(v4hi_UP): Map to V4HImode.
(v4hf_UP): Map to V4HFmode.
(v2si_UP): Map to V2SImode.
(v2sf_UP): Map to V2SFmode.
(di_UP): Map to DImode.
(v16qi_UP): Map to V16QImode.
(v8hi_UP): Map to V8HImode.
(v4si_UP): Map to V4SImode.
(v4sf_UP): Map to V4SFmode.
(v2di_UP): Map to V2DImode.
(ti_UP): Map to TImode.
(ei_UP): Map to EImode.
(oi_UP): Map to OImode.
(neon_itype): Delete.
(neon_builtin_datum): Remove itype, make mode a machine_mode.
(VAR1): Update accordingly.
(arm_init_neon_builtins): Use machine_mode directly.
(neon_dereference_pointer): Likewise.
(arm_expand_neon_args): Use qualifiers to decide operand types.
(arm_expand_neon_builtin): Likewise.
* config/arm/arm_neon_builtins.def: Remap operation type for
many builtins.
From-SVN: r217700
2014-11-18 10:01:55 +00:00
James Greenhalgh
6276b63014
[Patch ARM Refactor Builtins 7/8] Use qualifiers arrays when initialising builtins and fix type mangling
...
gcc/
* config/arm/arm-builtins.c (arm_scalar_builtin_types): New.
(enum arm_simd_type): Likewise.
(struct arm_simd_type_info): Likewise
(arm_mangle_builtin_scalar_type): Likewise.
(arm_mangle_builtin_vector_type): Likewise.
(arm_mangle_builtin_type): Likewise.
(arm_simd_builtin_std_type): Likewise.
(arm_lookup_simd_builtin_type): Likewise.
(arm_simd_builtin_type): Likewise.
(arm_init_simd_builtin_types): Likewise.
(arm_init_simd_builtin_scalar_types): Likewise.
(arm_init_neon_builtins): Rewrite using qualifiers.
* config/arm/arm-protos.h (arm_mangle_builtin_type): New.
* config/arm/arm-simd-builtin-types.def: New file.
* config/arm/t-arm (arm-builtins.o): Depend on it.
* config/arm/arm.c (arm_mangle_type): Call arm_mangle_builtin_type.
* config/arm/arm_neon.h (int8x8_t): Use new internal type.
(int16x4_t): Likewise.
(int32x2_t): Likewise.
(float16x4_t): Likewise.
(float32x2_t): Likewise.
(poly8x8_t): Likewise.
(poly16x4_t): Likewise.
(uint8x8_t): Likewise.
(uint16x4_t): Likewise.
(uint32x2_t): Likewise.
(int8x16_t): Likewise.
(int16x8_t): Likewise.
(int32x4_t): Likewise.
(int64x2_t): Likewise.
(float32x4_t): Likewise.
(poly8x16_t): Likewise.
(poly16x8_t): Likewise.
(uint8x16_t): Likewise.
(uint16x8_t): Likewise.
(uint32x4_t): Likewise.
(uint64x2_t): Likewise.
From-SVN: r217699
2014-11-18 10:00:29 +00:00
James Greenhalgh
acb94767e6
[Patch ARM Refactor Builtins 6/8] Add some tests for "poly" mangling
...
gcc/testsuite/
* g++.dg/abi/mangle-arm-crypto.C: New.
* g++.dg/abi/mangle-neon.C (f19): New.
(f20): Likewise.
From-SVN: r217698
2014-11-18 09:57:13 +00:00
James Greenhalgh
638ba4aadf
[Patch ARM Refactor Builtins 5/8] Start keeping track of qualifiers in ARM.
...
gcc/
* gcc/config/arm/arm-builtins.c (arm_type_qualifiers): New.
(neon_itype): Add new types corresponding to the types used in
qualifiers names.
(arm_unop_qualifiers): New.
(arm_bswap_qualifiers): Likewise.
(arm_binop_qualifiers): Likewise.
(arm_ternop_qualifiers): Likewise.
(arm_getlane_qualifiers): Likewise.
(arm_lanemac_qualifiers): Likewise.
(arm_setlane_qualifiers): Likewise.
(arm_combine_qualifiers): Likewise.
(arm_load1_qualifiers): Likewise.
(arm_load1_lane_qualifiers): Likewise.
(arm_store1_qualifiers): Likewise.
(arm_storestruct_lane_qualifiers): Likewise.
(UNOP_QUALIFIERS): Likewise.
(DUP_QUALIFIERS): Likewise.
(SPLIT_QUALIFIERS): Likewise.
(CONVERT_QUALIFIERS): Likewise.
(FLOAT_WIDEN_QUALIFIERS): Likewise.
(FLOAT_NARROW_QUALIFIERS): Likewise.
(RINT_QUALIFIERS): Likewise.
(COPYSIGNF_QUALIFIERS): Likewise.
(CREATE_QUALIFIERS): Likewise.
(REINTERP_QUALIFIERS): Likewise.
(BSWAP_QUALIFIERS): Likewise.
(BINOP_QUALIFIERS): Likewise.
(FIXCONV_QUALIFIERS): Likewise.
(SCALARMUL_QUALIFIERS): Likewise.
(SCALARMULL_QUALIFIERS): Likewise.
(SCALARMULH_QUALIFIERS): Likewise.
(TERNOP_QUALIFIERS): Likewise.
(SELECT_QUALIFIERS): Likewise.
(VTBX_QUALIFIERS): Likewise.
(GETLANE_QUALIFIERS): Likewise.
(SHIFTIMM_QUALIFIERS): Likewise.
(LANEMAC_QUALIFIERS): Likewise.
(SCALARMAC_QUALIFIERS): Likewise.
(SETLANE_QUALIFIERS): Likewise.
(SHIFTINSERT_QUALIFIERS): Likewise.
(SHIFTACC_QUALIFIERS): Likewise.
(LANEMUL_QUALIFIERS): Likewise.
(LANEMULL_QUALIFIERS): Likewise.
(LANEMULH_QUALIFIERS): Likewise.
(COMBINE_QUALIFIERS): Likewise.
(VTBL_QUALIFIERS): Likewise.
(LOAD1_QUALIFIERS): Likewise.
(LOADSTRUCT_QUALIFIERS): Likewise.
(LOAD1LANE_QUALIFIERS): Likewise.
(LOADSTRUCTLANE_QUALIFIERS): Likewise.
(STORE1_QUALIFIERS): Likewise.
(STORESTRUCT_QUALIFIERS): Likewise.
(STORE1LANE_QUALIFIERS): Likewise.
(STORESTRUCTLANE_QUALIFIERS): Likewise.
(neon_builtin_datum): Keep track of qualifiers.
(VAR1): Likewise.
From-SVN: r217697
2014-11-18 09:55:56 +00:00
James Greenhalgh
1add35dbd5
[Patch ARM Refactor Builtins 4/8] Refactor "VAR<n>" Macros
...
gcc/
* config/arm/arm-builtins.c (VAR1): Add a comma.
(VAR2): Rewrite in terms of VAR1.
(VAR3-10): Likewise.
(arm_builtins): Remove leading comma before ARM_BUILTIN_MAX.
* config/arm/arm_neon_builtins.def: Remove trailing commas.
From-SVN: r217696
2014-11-18 09:54:22 +00:00
James Greenhalgh
33857df2d9
[Patch ARM Refactor Builtins 3/8] Pull builtins code to its own file
...
gcc/
* config.gcc (extra_objs): Add arm-builtins.o for arm*-*-*.
(target_gtfiles): Add config/arm/arm-builtins.c for arm*-*-*.
* config/arm/arm-builtins.c: New.
* config/arm/t-arm (arm_builtins.o): New.
* config/arm/arm-protos.h (arm_expand_builtin): New.
(arm_builtin_decl): Likewise.
(arm_init_builtins): Likewise.
(arm_atomic_assign_expand_fenv): Likewise.
* config/arm/arm.c (arm_atomic_assign_expand_fenv): Remove prototype.
(arm_init_builtins): Likewise.
(arm_init_iwmmxt_builtins): Likewise
(safe_vector_operand): Likewise
(arm_expand_binop_builtin): Likewise
(arm_expand_unop_builtin): Likewise
(arm_expand_builtin): Likewise
(arm_builtin_decl): Likewise
(insn_flags): Remove static.
(tune_flags): Likewise.
(enum arm_builtins): Move to config/arm/arm-builtins.c.
(arm_init_neon_builtins): Likewise.
(struct builtin_description): Likewise.
(arm_init_iwmmxt_builtins): Likewise.
(arm_init_fp16_builtins): Likewise.
(arm_init_crc32_builtins): Likewise.
(arm_init_builtins): Likewise.
(arm_builtin_decl): Likewise.
(safe_vector_operand): Likewise.
(arm_expand_ternop_builtin): Likewise.
(arm_expand_binop_builtin): Likewise.
(arm_expand_unop_builtin): Likewise.
(neon_dereference_pointer): Likewise.
(arm_expand_neon_args): Likewise.
(arm_expand_neon_builtin): Likewise.
(neon_split_vcombine): Likewise.
(arm_expand_builtin): Likewise.
(arm_builtin_vectorized_function): Likewise.
(arm_atomic_assign_expand_fenv): Likewise.
From-SVN: r217695
2014-11-18 09:52:46 +00:00
James Greenhalgh
a27d8d801a
[Patch ARM Refactor Builtins 2/8] Move Processor flags to arm-protos.h
...
gcc/
* config/arm/t-arm (arm.o): Include arm-protos.h in the recipe.
* config/arm/arm.c (FL_CO_PROC): Move to arm-protos.h.
(FL_ARCH3M): Likewise.
(FL_MODE26): Likewise.
(FL_MODE32): Likewise.
(FL_ARCH4): Likewise.
(FL_ARCH5): Likewise.
(FL_THUMB): Likewise.
(FL_LDSCHED): Likewise.
(FL_STRONG): Likewise.
(FL_ARCH5E): Likewise.
(FL_XSCALE): Likewise.
(FL_ARCH6): Likewise.
(FL_VFPV2): Likewise.
(FL_WBUF): Likewise.
(FL_ARCH6K): Likewise.
(FL_THUMB2): Likewise.
(FL_NOTM): Likewise.
(FL_THUMB_DIV): Likewise.
(FL_VFPV3): Likewise.
(FL_NEON): Likewise.
(FL_ARCH7EM): Likewise.
(FL_ARCH7): Likewise.
(FL_ARM_DIV): Likewise.
(FL_ARCH8): Likewise.
(FL_CRC32): Likewise.
(FL_SMALLMUL): Likewise.
(FL_IWMMXT): Likewise.
(FL_IWMMXT2): Likewise.
(FL_TUNE): Likewise.
(FL_FOR_ARCH2): Likewise.
(FL_FOR_ARCH3): Likewise.
(FL_FOR_ARCH3M): Likewise.
(FL_FOR_ARCH4): Likewise.
(FL_FOR_ARCH4T): Likewise.
(FL_FOR_ARCH5): Likewise.
(FL_FOR_ARCH5T): Likewise.
(FL_FOR_ARCH5E): Likewise.
(FL_FOR_ARCH5TE): Likewise.
(FL_FOR_ARCH5TEJ): Likewise.
(FL_FOR_ARCH6): Likewise.
(FL_FOR_ARCH6J): Likewise.
(FL_FOR_ARCH6K): Likewise.
(FL_FOR_ARCH6Z): Likewise.
(FL_FOR_ARCH6ZK): Likewise.
(FL_FOR_ARCH6T2): Likewise.
(FL_FOR_ARCH6M): Likewise.
(FL_FOR_ARCH7): Likewise.
(FL_FOR_ARCH7A): Likewise.
(FL_FOR_ARCH7VE): Likewise.
(FL_FOR_ARCH7R): Likewise.
(FL_FOR_ARCH7M): Likewise.
(FL_FOR_ARCH7EM): Likewise.
(FL_FOR_ARCH8A): Likewise.
* config/arm/arm-protos.h: Take definitions moved from arm.c.
From-SVN: r217694
2014-11-18 09:50:30 +00:00
James Greenhalgh
94f0f2ccaf
[ARM Refactor Builtins: 1/8] Remove arm_neon.h's "Magic Words"
...
gcc/testsuite/
* gcc.target/arm/pr51968.c (foo): Do not try to pass "Magic Word".
gcc/
* config/arm/arm.c (arm_expand_neon_builtin): Remove "Magic Word"
parameter, rearrange switch statement accordingly.
(arm_evpc_neon_vrev): Remove "Magic Word".
* config/arm/unspecs.md (unspec): Split many UNSPECs to
rounding, or signed/unsigned variants.
* config/arm/neon.md: Remove "Magic Word" code.
* config/arm/iterators.md (VPF): New.
(VADDL): Likewise.
(VADDW): Likewise.
(VHADD): Likewise.
(VQADD): Likewise.
(VADDHN): Likewise.
(VMLAL): Likewise.
(VMLAL_LANE): Likewise.
(VLMSL): Likewise.
(VMLSL_LANE): Likewise.
(VQDMULH): Likewise,
(VQDMULH_LANE): Likewise.
(VMULL): Likewise.
(VMULL_LANE): Likewise.
(VSUBL): Likewise.
(VSUBW): Likewise.
(VHSUB): Likewise.
(VQSUB): Likewise.
(VSUBHN): Likewise.
(VABD): Likewise.
(VABDL): Likewise.
(VMAXMIN): Likewise.
(VMAXMINF): Likewise.
(VPADDL): Likewise.
(VPADAL): Likewise.
(VPMAXMIN): Likewise.
(VPMAXMINF): Likewise.
(VCVT_US): Likewise.
(VCVT_US_N): Likewise.
(VQMOVN): Likewise.
(VMOVL): Likewise.
(VSHL): Likewise.
(VQSHL): Likewise.
(VSHR_N): Likewise.
(VSHRN_N): Likewise.
(VQSHRN_N): Likewise.
(VQSHRUN_N): Likewise.
(VQSHL_N): Likewise.
(VSHLL_N): Likewise.
(VSRA_N): Likewise.
(pf): Likewise.
(sup): Likewise.
(r): Liekwise.
(maxmin): Likewise.
(shift_op): Likewise.
* config/arm/arm_neon_builtins.def: Split many patterns.
* config/arm/arm_neon.h (vaddl_s8): Remove "Magic Word" code.
From-SVN: r217693
2014-11-18 09:48:14 +00:00
Kyrylo Tkachov
e8c4308977
[ARM] Handle simple SImode PLUS and MINUS cases in rtx costs
...
* config/arm/arm.c (arm_new_rtx_costs, case PLUS, MINUS):
Add cost of alu.arith in simple SImode case.
From-SVN: r217692
2014-11-18 09:33:25 +00:00
Jiong Wang
ddcfa953fc
[LRA] Relax one gcc_assert in lra-eliminate for fixed register
...
gcc/
* lra-eliminations.c (update_reg_eliminate): Relax gcc_assert for fixed
registers.
From-SVN: r217691
2014-11-18 09:30:08 +00:00
Marat Zakirov
9ca0032c91
opts.c (finish_options): Disable aggressive opts for sanitizer.
...
gcc
2014-11-18 Marat Zakirov <m.zakirov@samsung.com>
* opts.c (finish_options): Disable aggressive opts for sanitizer.
(common_handle_option): Move code to finish_options.
gcc/testsuite
2014-11-18 Marat Zakirov <m.zakirov@samsung.com>
* c-c++-common/asan/aggressive-opts.c: New test.
From-SVN: r217690
2014-11-18 08:46:39 +00:00
Yury Gribov
24ebfddf68
re PR sanitizer/63802 (UBSan doesn't catch misaligned access if address is 16-bytes (or more) aligned)
...
2014-11-18 Yury Gribov <y.gribov@samsung.com>
PR sanitizer/63802
gcc/
* stor-layout.c (min_align_of_type): Respect user alignment
more.
gcc/testsuite/
* c-c++-common/ubsan/pr63802.c: New test.
From-SVN: r217689
2014-11-18 07:37:17 +00:00
Ilya Enkovich
005581f187
passes.c (remove_cgraph_node_from_order): New.
...
gcc/
* passes.c (remove_cgraph_node_from_order): New.
(do_per_function_toporder): Register cgraph removal
hook.
gcc/testsuite/
* g++.dg/pr63766.C: New.
From-SVN: r217688
2014-11-18 07:25:12 +00:00
Terry Guo
92191d7b1b
arm.c (arm_issue_rate): Return 2 for cortex-m7.
...
2014-11-17 Terry Guo <terry.guo@arm.com>
* config/arm/arm.c (arm_issue_rate): Return 2 for cortex-m7.
* config/arm/arm.md (generic_sched): Exclude cortex-m7.
(generic_vfp): Likewise.
* config/arm/cortex-m7.md: Pipeline description for cortex-m7.
From-SVN: r217687
2014-11-18 02:20:47 +00:00
GCC Administrator
dcaa37015b
Daily bump.
...
From-SVN: r217686
2014-11-18 00:16:38 +00:00
Vladimir Makarov
daab44bffd
re PR rtl-optimization/63906 (lra_remat miscompiles glibc on aarch64)
...
2014-11-17 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/63906
* lra-remat.c (operand_to_remat): Check SP and
frame_pointer_required.
From-SVN: r217683
2014-11-18 00:14:25 +00:00
Mircea Namolaru
46cdd0c8cd
Support for unroll and jam optimization.
...
From-SVN: r217682
2014-11-17 22:59:07 +00:00
Andrew Pinski
d6f1bcb23d
thunderx.md: Remove copyright which should not have been there.
...
2014-11-17 Andrew Pinski <apinski@cavium.com>
* config/aarch64/thunderx.md: Remove copyright which should not
have been there.
From-SVN: r217680
2014-11-17 14:33:23 -08:00
Michael Meissner
25adc5d044
rs6000.c (RELOAD_REG_AND_M16): Add support for Altivec style vector loads that ignore the bottom 3 bits of the...
...
[gcc]
2014-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
* config/rs6000/rs6000.c (RELOAD_REG_AND_M16): Add support for
Altivec style vector loads that ignore the bottom 3 bits of the
address.
(rs6000_debug_addr_mask): New function to print the addr_mask
values if debugging.
(rs6000_debug_print_mode): Call rs6000_debug_addr_mask to print
out addr_mask.
(rs6000_setup_reg_addr_masks): Add support for Altivec style
vector loads that ignore the bottom 3 bits of the address. Allow
pre-increment and pre-decrement on floating point, even if the
-mupper-regs-{sf,df} options were used.
(rs6000_init_hard_regno_mode_ok): Rework DFmode support if
-mupper-regs-df. Add support for -mupper-regs-sf. Rearrange code
placement for direct move support.
(rs6000_option_override_internal): Add checks for -mupper-regs-df
requiring -mvsx, and -mupper-regs-sf requiring -mpower8-vector.
If -mupper-regs, set both -mupper-regs-sf and -mupper-regs-df,
depending on the underlying cpu.
(rs6000_secondary_reload_fail): Add ATTRIBUTE_NORETURN.
(rs6000_secondary_reload_toc_costs): Helper function to identify
costs of a TOC load for secondary reload support.
(rs6000_secondary_reload_memory): Helper function for secondary
reload, to determine if a particular memory operation is directly
handled by the hardware, or if it needs support from secondary
reload to create a valid address.
(rs6000_secondary_reload): Rework code, to be clearer. If the
appropriate -mupper-regs-{sf,df} is used, use FPR registers to
reload scalar values, since the FPR registers have D-form
addressing. Move most of the code handling memory to the function
rs6000_secondary_reload_memory, and use the reg_addr structure to
determine what type of address modes are supported. Print more
debug information if -mdebug=addr.
(rs6000_secondary_reload_inner): Rework entire function to be more
general. Use the reg_addr bits to determine what type of
addressing is supported.
(rs6000_preferred_reload_class): Rework. Move constant handling
into a single place. Prefer using FLOAT_REGS for scalar floating
point.
(rs6000_secondary_reload_class): Use a FPR register to move a
value from an Altivec register to a GPR, and vice versa. Move VSX
handling above traditional floating point.
* config/rs6000/rs6000.md (mov<mode>_hardfloat, FMOVE32 case):
Delete some spaces in the constraints.
(DF->DF move peephole2): Disable if -mupper-regs-{sf,df} to
allow using FPR registers to load/store an Altivec register for
scalar floating point types.
(SF->SF move peephole2): Likewise.
(DFmode splitter): Add a define_split to move floating point
constants to the constant pool before register allocation.
Normally constants are put into the pool immediately, but
-ffast-math delays putting them into the constant pool for the
reciprocal approximation support.
(SFmode splitter): Likewise.
* config/rs6000/rs6000.opt (-mupper-regs-df): Make option public.
(-mupper-regs-sf): Likewise.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__UPPER_REGS_DF__ if -mupper-regs-df. Define __UPPER_REGS_SF__ if
-mupper-regs-sf.
(-mupper-regs): New combination option that sets -mupper-regs-sf
and -mupper-regs-df by default if the cpu supports the instructions.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mupper-regs, -mupper-regs-sf, and -mupper-regs-df.
* config/rs6000/predicates.md (memory_fp_constant): New predicate
to return true if the operand is a floating point constant that
must be put into the constant pool, before register allocation
occurs.
* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Enable
-mupper-regs-df by default.
(ISA_2_7_MASKS_SERVER): Enable -mupper-regs-sf by default.
(POWERPC_MASKS): Add -mupper-regs-{sf,df} as options set by the
various -mcpu=... options.
(power7 cpu): Enable -mupper-regs-df by default.
* doc/invoke.texi (RS/6000 and PowerPC Options): Document
-mupper-regs.
[gcc/testsuite]
2014-11-17 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-ldst.c: Rewrite to use 40 live
floating point variables instead of using asm to test allocating
values to the Altivec registers.
* gcc.target/powerpc/upper-regs-sf.c: New -mupper-regs-sf and
-mupper-regs-df tests.
* gcc.target/powerpc/upper-regs-df.c: Likewise.
* config/rs6000/predicates.md (memory_fp_constant): New predicate
Co-Authored-By: Ulrich Weigand <uweigand@de.ibm.com>
From-SVN: r217679
2014-11-17 22:32:26 +00:00
H.J. Lu
5a4e7cade9
Export "detect_leaks=0"
...
PR bootstrap/63888
* bootstrap-asan.mk (ASAN_OPTIONS): Export "detect_leaks=0".
From-SVN: r217678
2014-11-17 14:12:55 -08:00
Jason Merrill
5f7282e2cb
re PR c++/33911 (attribute deprecated vs. templates)
...
PR c++/33911
gcc/cp/
* call.c (build_call_a): Don't warn_deprecated_use here.
(build_over_call): Or here.
* decl2.c (mark_used): Do it here.
(is_late_template_attribute): Attribute deprecated is not deferred.
(cplus_decl_attributes): Propagate TREE_DEPRECATED out to the template.
* parser.c (cp_parser_template_name): Warn about deprecated template.
(cp_parser_template_argument): Likewise.
libstdc++-v3/
* include/backward/binders.h: Suppress -Wdeprecated-declarations.
* include/ext/array_allocator.h: Likewise.
From-SVN: r217677
2014-11-17 17:09:27 -05:00
Zhouyi Zhou
60408d8b5e
ira-conflicts.c (build_conflict_bit_table): Add the current object to OBJECTS_LIVE after traversing OBJECTS_LIVE.
...
* ira-conflicts.c (build_conflict_bit_table): Add the current
object to OBJECTS_LIVE after traversing OBJECTS_LIVE.
From-SVN: r217676
2014-11-17 15:05:45 -07:00
Jan Hubicka
231b4916bf
ipa-cp.c (ipa_get_indirect_edge_target_1): Handle speculation.
...
* ipa-cp.c (ipa_get_indirect_edge_target_1): Handle speculation.
(ipa_get_indirect_edge_target): Add SPECULATIVE argument.
(devirtualization_time_bonus): Use it.
(ipcp_discover_new_direct_edges): Likewise.
* ipa-inline-analysis.c (estimate_edge_devirt_benefit): Update.
* ipa-prop.h (ipa_get_indirect_edge_target): Update prototype.
From-SVN: r217675
2014-11-17 22:04:36 +00:00
Tom de Vries
a19faae31e
Add -ftree-tail-merge to tail-merge testcases
...
2014-11-17 Tom de Vries <tom@codesourcery.com>
* gcc.dg/pr43864-2.c: Add -ftree-tail-merge to dg-options.
* gcc.dg/pr43864-3.c: Same.
* gcc.dg/pr43864-4.c: Same.
* gcc.dg/pr43864.c: Same.
* gcc.dg/pr50763.c: Same.
* gcc.dg/pr51879-12.c: Same.
* gcc.dg/pr51879-16.c: Same.
* gcc.dg/pr51879-17.c: Same.
* gcc.dg/pr51879-18.c: Same.
* gcc.dg/pr51879-2.c: Same.
* gcc.dg/pr51879-3.c: Same.
* gcc.dg/pr51879-4.c: Same.
* gcc.dg/pr51879-6.c: Same.
* gcc.dg/pr51879-7.c: Same.
* gcc.dg/pr51879.c: Same.
From-SVN: r217674
2014-11-17 21:48:14 +00:00
Tom de Vries
81ba3dd3a4
Fix scan patterns for pr43864-{2,3,4].c
...
2014-11-17 Tom de Vries <tom@codesourcery.com>
* gcc.dg/pr43864-2.c: Fix scan-tree-dump-times scan pattern.
* gcc.dg/pr43864-3.c: Same.
* gcc.dg/pr43864-4.c: Same.
From-SVN: r217673
2014-11-17 21:48:05 +00:00
Jason Merrill
51d72abe5e
re PR c++/50473 ([C++0x] ICE in type_has_nontrivial_copy_init, at cp/tree.c:2574)
...
PR c++/50473
* decl.c (cp_finish_decl): Don't try to process a non-dependent
constant initializer for a reference.
* pt.c (value_dependent_expression_p): A reference is always
dependent.
* call.c (extend_ref_init_temps_1): Also clear TREE_SIDE_EFFECTS
on any NOP_EXPRs.
From-SVN: r217672
2014-11-17 15:17:56 -05:00
Jan Hubicka
88436c83a4
tree.c (free_lang_data_in_decl): Set DECL_FUNCTION_SPECIFIC_OPTIMIZATION to optimization_default_node.
...
* tree.c (free_lang_data_in_decl): Set DECL_FUNCTION_SPECIFIC_OPTIMIZATION
to optimization_default_node.
From-SVN: r217671
2014-11-17 19:35:57 +00:00
Jason Merrill
56632b2773
Handle C++14 constexpr flow control.
...
* constexpr.c (cxx_eval_loop_expr, cxx_eval_switch_expr): New.
(cxx_eval_statement_list): New.
(cxx_eval_constant_expression): Handle LABEL_EXPR,
CASE_LABEL_EXPR, GOTO_EXPR, LOOP_EXPR, SWITCH_EXPR. Handle jump
semantics of RETURN_EXPR.
(many functions): Add jump_target parameter.
(returns, breaks, continues, switches, label_matches): New.
* cp-tree.h (LABEL_DECL_BREAK, LABEL_DECL_CONTINUE): New.
* cp-gimplify.c (begin_bc_block): Set them.
From-SVN: r217670
2014-11-17 14:08:07 -05:00
Jason Merrill
27d93d2c8a
cp-gimplify.c (genericize_cp_loop): Use LOOP_EXPR.
...
* cp-gimplify.c (genericize_cp_loop): Use LOOP_EXPR.
(genericize_for_stmt): Handle null statement-list.
From-SVN: r217669
2014-11-17 14:08:02 -05:00