Paolo Carlini
7f3083e71d
limits: Remove stray spaces after backslash.
...
2014-10-15 Paolo Carlini <paolo.carlini@oracle.com>
* include/std/limits: Remove stray spaces after backslash.
* testsuite/20_util/declval/requirements/1_neg.cc: Adjust dg-error
line number.
* testsuite/20_util/make_signed/requirements/typedefs_neg.cc:
Likewise.
* testsuite/20_util/make_unsigned/requirements/typedefs_neg.cc:
Likewise.
From-SVN: r216242
2014-10-15 08:51:07 +00:00
Richard Biener
d5e149d186
pr63419.C: Add -Wno-psabi.
...
2014-10-15 Richard Biener <rguenther@suse.de>
* g++.dg/torture/pr63419.C: Add -Wno-psabi.
From-SVN: r216241
2014-10-15 08:25:36 +00:00
Andreas Schwab
c582bb1580
explow.c (convert_memory_address_addr_space_1): Mark in_const as ATTRIBUTE_UNUSED.
...
* explow.c (convert_memory_address_addr_space_1): Mark in_const
as ATTRIBUTE_UNUSED.
From-SVN: r216240
2014-10-15 08:20:02 +00:00
Jan Hubicka
f8934be787
loop-unroll.c: (decide_unrolling_and_peeling): Rename to
...
* loop-unroll.c: (decide_unrolling_and_peeling): Rename to
(decide_unrolling): ... this one.
(peel_loops_completely): Remove.
(decide_peel_simple): Remove.
(decide_peel_once_rolling): Remove.
(decide_peel_completely): Remove.
(peel_loop_simple): Remove.
(peel_loop_completely): Remove.
(unroll_and_peel_loops): Rename to ...
(unroll_loops): ... this one; handle only unrolling.
* cfgloop.h (lpt_dec): Remove LPT_PEEL_COMPLETELY and
LPT_PEEL_SIMPLE.
(UAP_PEEL): Remove.
(unroll_and_peel_loops): Remove.
(unroll_loops): New.
* passes.def: Replace
pass_rtl_unroll_and_peel_loops by pass_rtl_unroll_loops.
* loop-init.c (gate_rtl_unroll_and_peel_loops,
rtl_unroll_and_peel_loops): Rename to ...
(gate_rtl_unroll_loops, rtl_unroll_loops): ... these; update.
(pass_rtl_unroll_and_peel_loops): Rename to ...
(pass_rtl_unroll_loops): ... this one.
* tree-pass.h (make_pass_rtl_unroll_and_peel_loops): Remove.
(make_pass_rtl_unroll_loops): New.
* tree-ssa-loop-ivcanon.c: (estimated_peeled_sequence_size, try_peel_loop): New.
(canonicalize_loop_induction_variables): Update.
* gcc.dg/tree-prof/peel-1.c: Update.
* gcc.dg/tree-prof/unroll-1.c: Update.
* gcc.dg/gcc.dg/unroll_1.c: Update.
* gcc.dg/gcc.dg/unroll_2.c: Update.
* gcc.dg/gcc.dg/unroll_3.c: Update.
* gcc.dg/gcc.dg/unroll_4.c: Update.
From-SVN: r216238
2014-10-15 08:02:06 +00:00
Paolo Carlini
fa7fa585ea
typedefs.cc: Rename to alias_decl.cc.
...
2014-10-14 Paolo Carlini <paolo.carlini@oracle.com>
* testsuite/20_util/add_lvalue_reference/requirements/typedefs.cc:
Rename to alias_decl.cc.
* testsuite/20_util/add_rvalue_reference/requirements/typedefs.cc:
Likewise.
* testsuite/20_util/common_type/requirements/typedefs-3.cc: Likewise.
* testsuite/20_util/conditional/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/decay/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/enable_if/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/make_signed/requirements/typedefs-3.cc: Likewise.
* testsuite/20_util/make_unsigned/requirements/typedefs-3.cc:
Likewise.
* testsuite/20_util/remove_reference/requirements/typedefs.cc:
Likewise.
* testsuite/20_util/result_of/requirements/typedefs.cc: Likewise.
* testsuite/20_util/underlying_type/requirements/typedefs-3.cc:
Likewise.
From-SVN: r216237
2014-10-15 07:49:06 +00:00
Max Filippov
f211daa3d5
xtensa: use pre- and postincrement FP load/store when available
...
Earlier versions of xtensa FPU used to support preincrement FP load and
store instructions (lsiu/ssiu). Recent FPU supports postincrement FP
load and store instructions only (lsip/ssip). Use configuration macro to
decide which version is available.
2014-10-14 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.h (TARGET_HARD_FLOAT_POSTINC): new macro.
* config/xtensa/xtensa.md (*lsiu, *ssiu): add dependency on
!TARGET_HARD_FLOAT_POSTINC.
(*lsip, *ssip): new instructions.
From-SVN: r216234
2014-10-15 04:20:03 +00:00
Max Filippov
cf14ea9fe3
xtensa: drop unimplemented floating point operations
...
xtensa ISA never implemented FP division, reciprocal, square root and
inverse square root as single opcode. Remove patterns that can emit
them.
2014-10-09 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.md (divsf3, *recipsf2, sqrtsf2, *rsqrtsf2):
remove.
From-SVN: r216233
2014-10-15 04:17:30 +00:00
Max Filippov
5d12b7688f
MAINTAINERS: add myself to write-after-approval list.
...
2014-10-15 Max Filippov <jcmvbkbc@gmail.com>
* MAINTAINERS (write-after-approval): Add myself.
From-SVN: r216232
2014-10-15 04:15:20 +00:00
Andrew Pinski
7745730ff6
explow.c (convert_memory_address_addr_space): Rename to ...
...
2014-10-14 Andrew Pinski <apinski@cavium.com>
* explow.c (convert_memory_address_addr_space): Rename to ...
(convert_memory_address_addr_space_1): This. Add in_const argument.
Inside a CONST RTL, permute the conversion and addition of constant
for zero and sign extended pointers.
(convert_memory_address_addr_space): New function.
From-SVN: r216230
2014-10-14 17:39:16 -07:00
Andrew Pinski
ceeb2cbc4f
revert: re PR middle-end/49721 (convert_memory_address_addr_space may generate invalid new insns)
...
2014-10-14 Andrew Pinski <apinski@cavium.com>
Revert:
2011-08-19 H.J. Lu <hongjiu.lu@intel.com>
PR middle-end/49721
* explow.c (convert_memory_address_addr_space): Also permute the
conversion and addition of constant for zero-extend.
From-SVN: r216229
2014-10-14 17:38:03 -07:00
GCC Administrator
e24ad4ec60
Daily bump.
...
From-SVN: r216228
2014-10-15 00:16:19 +00:00
DJ Delorie
c32ab325fd
msp430-modes.def (PSI): Add.
...
* config/msp430/msp430-modes.def (PSI): Add.
* config/msp430/msp430-protos.h (msp430_hard_regno_nregs_has_padding): New.
(msp430_hard_regno_nregs_with_padding): New.
* config/msp430/msp430.c (msp430_scalar_mode_supported_p): New.
(msp430_hard_regno_nregs_has_padding): New.
(msp430_hard_regno_nregs_with_padding): New.
(msp430_unwind_word_mode): Use PSImode instead of SImode.
(msp430_addr_space_legitimate_address_p): New.
(msp430_asm_integer): New.
(msp430_init_dwarf_reg_sizes_extra): New.
(msp430_print_operand): Use X suffix for PSImode even in small model.
* config/msp430/msp430.h (POINTER_SIZE): Use 20 bits, not 32.
(PTR_SIZE): ...but 4 bytes for EH.
(SIZE_TYPE): Use __int20.
(PTRDIFF_TYPE): Likewise.
(INCOMING_FRAME_SP_OFFSET): Adjust.
* config/msp430/msp430.md (movqi_topbyte): New.
(movpsi): Use fixed suffixes.
(movsipsi2): Enable for 430X, not large model.
(extendhipsi2): Likewise.
(zero_extendhisi2): Likewise.
(zero_extendhisipsi2): Likewise.
(extend_and_shift1_hipsi2): Likewise.
(extendpsisi2): Likewise.
(*bitbranch<mode>4_z): Fix suffix logic.
From-SVN: r216225
2014-10-14 17:35:03 -04:00
David S. Miller
c84733360b
Fix sanitizer build on sparc.
...
* sanitizer_common/sanitizer_platform_limits_linux.cc (time_t):
Define at __kernel_time_t, as needed for sparc.
(struct __old_kernel_stat): Don't check if __sparc__ is defined.
* libsanitizer/sanitizer_common/sanitizer_platform_limits_posix.h
(__sanitizer): Define struct___old_kernel_stat_sz,
struct_kernel_stat_sz, and struct_kernel_stat64_sz for sparc.
(__sanitizer_ipc_perm): Adjust for sparc targets.
(__sanitizer_shmid_ds): Likewsie.
(__sanitizer_sigaction): Likewsie.
(IOC_SIZE): Likewsie.
From-SVN: r216224
2014-10-14 14:20:46 -07:00
Eric Botcazou
5940e204bd
re PR ada/62019 (gnat.dg/weak2.adb fails everywhere)
...
PR ada/62019
* tree-eh.c (tree_could_trap) <FUNCTION_DECL>: Revamp and really
do not choke on null node.
<VAR_DECL>: Likewise.
From-SVN: r216223
2014-10-14 21:04:05 +00:00
DJ Delorie
9edc6e4cf9
More missed bits from the big __intN patch
...
From-SVN: r216222
2014-10-14 16:53:29 -04:00
DJ Delorie
e1217ac7f2
Missed bit of previous commit.
...
From-SVN: r216221
2014-10-14 16:01:39 -04:00
DJ Delorie
78a7c3172f
machmode.h (int_n_data_t): New.
...
* machmode.h (int_n_data_t): New.
(int_n_enabled_p): New.
(int_n_data): New.
* tree.c (int_n_enabled_p): New.
(int_n_trees): New.
(make_or_reuse_type): Check for all __intN types, not just
__int128.
(build_common_tree_nodes): Likewise. Also fill in integer_typs[]
entries.
* tree.h (int128_integer_type_node): Remove.
(int128_unsigned_type_node): Remove.
(int_n_trees_t): New.
(int_n_enabled_p): New.
(int_n_trees): New.
* toplev.c (standard_type_bitsize): New.
(do_compile): Check which __intN types are enabled for the current
run.
* builtin-types.def (BT_INT128): Remove.
(BT_UINT128): Remove.
* machmode.def: Add macro to create __int128 for all targets.
* stor-layout.c (mode_for_size): Support __intN types.
(smallest_mode_for_size): Likewise.
(initialize_sizetypes): Support __intN types.
* genmodes.c (struct mode_data): Add int_n field.
(blank_mode): Likewise.
(INT_N): New.
(make_int_n): New.
(emit_insn_modes_h): Count __intN entries and define
NUM_INT_N_ENTS.
(emit_mode_int_n): New.
(emit_insn_modes_c): Call it.
* gimple.c (gimple_signed_or_unsigned_type): Check for all __intN
types, not just __int128.
* tree-core.h (integer_type_kind): Remove __int128-specific
entries, reserve spots for __intN entries.
libstdc++-v3/
* src/c++11/limits.cc: Add support for __intN types.
* include/std/type_traits: Likewise.
* include/std/limits: Likewise.
* include/c_std/cstdlib: Likewise.
* include/bits/cpp_type_traits.h: Likewise.
* include/c_global/cstdlib: Likewise.
c-family/
* c-pretty-print.c (pp_c_integer_constant): Check for all __intN
types, not just __int128.
* c-cppbuiltin.c (c_cpp_builtins): Add builtins for all __intN
types, not just __int128.
(cpp_atomic_builtins): Round pointer sizes up.
(type_suffix): Use type precision, not specific types.
* c-common.c (c_common_reswords): Remove __int128 special case.
(c_common_type_for_size): Check for all __intN types, not just
__int128.
(c_common_type_for_mode): Likewise.
(c_common_signed_or_unsigned_type): Likewise.
(c_build_bitfield_integer_type): Likewise.
(c_common_nodes_and_builtins): Likewise.
(keyword_begins_type_specifier): Likewise.
* c-common.h (rid): Remove RID_INT128 and add RID_INT_N_* for all
__intN variants.
c/
* c-parser.c (c_parse_init): Add RID entries for each __intN.
(c_token_starts_typename): Check all __intN, not just __int128.
(c_token_starts_declspecs): Likewise.
(c_parser_declspecs): Likewise.
(c_parser_attribute_any_word): Likewise.
(c_parser_objc_selector): Likewise.
* c-tree.h (c_typespec_keyword): cts_int128 -> cts_int_n.
(struct c_declspecs): Add int_n_idx field to record *which* __intN
is specified.
* c-decl.c (declspecs_add_type): Check for all __intN, not just
__int128.
(finish_declspecs): Likewise.
testsuite/
* g++.dg/abi/mangle64.C: New.
cp/
* typeck.c (cp_common_type): Check for all __intN types, not just
__int128.
* decl.c (grokdeclarator): Likewise.
* rtti.c (emit_support_tinfos): Check for all __intN types, not just
__int128.
* parser.c (cp_lexer_next_token_is_decl_specifier_keyword): Check
for all __intN types, not just __int128.
(cp_parser_simple_type_specifier): Likewise.
* mangle.c (integer_type_codes): Remove int128-specific codes.
* cp-tree.h (cp_decl_specifier_seq): Add int_n_idx to store which
__intN was specified.
* lex.c (init_reswords): Reserve all __intN keywords.
lto/
* lto-lang.c (lto_build_c_type_nodes): Check intN types for
size-type as well.
(lto_init): Initialize all intN types, not just int128.
From-SVN: r216220
2014-10-14 15:44:36 -04:00
Kito Cheng
df3e34938d
ira.c: Fix typo in comment.
...
2014-10-14 Kito Cheng <kito@0xlab.org>
* ira.c: Fix typo in comment.
* ira.h: Ditto.
* ira-build.c: Ditto.
* ira-color.c: Ditto.
* ira-emit.c: Ditto.
* ira-int.h: Ditto.
* ira-lives.c: Ditto.
From-SVN: r216218
2014-10-14 13:13:33 -06:00
Uros Bizjak
0777fc0210
re PR rtl-optimization/63475 (Postreload CSE propagates aliased memory operand)
...
PR rtl-optimization/63475
* alias.c (true_dependence_1): Always use get_addr to extract
true address operands from x_addr and mem_addr. Use extracted
address operands to check for references with alignment ANDs.
Use extracted address operands with find_base_term and
base_alias_check. For noncanonicalized operands call canon_rtx with
extracted address operand.
(write_dependence_1): Ditto.
(may_alias_p): Ditto. Remove unused calls to canon_rtx.
From-SVN: r216217
2014-10-14 20:40:59 +02:00
Joel Brobecker
2a523cfe4e
Use strtod instead of strtold in libiberty/d-demangle.c
...
strtold is currently used to decode templates which have a floating-point
value encoded inside; but this routine is not available on some systems,
such as Solaris 2.9 for instance.
This patch fixes the issue by replace the use of strtold by strtod.
It reduces a bit the precision, but it should still remain acceptable
in most cases.
libiberty/ChangeLog:
* d-demangle.c: Replace strtold with strtod in global comment.
(strtold): Remove declaration.
(strtod): New declaration.
(dlang_parse_real): Declare value as double instead of long
double. Replace call to strtold by call to strtod.
Update format in call to snprintf.
From-SVN: r216216
2014-10-14 17:57:08 +00:00
Jonathan Wakely
9570791897
intro.xml: Update.
...
* doc/xml/manual/intro.xml: Update.
* doc/xml/manual/status_cxx2011.xml: Update.
* doc/html/manual/*: Regenerate.
From-SVN: r216215
2014-10-14 18:24:38 +01:00
Jonathan Wakely
facb4d1b3e
1.cc: Add dg-require-stdint.
...
* testsuite/20_util/align/1.cc: Add dg-require-stdint.
* testsuite/20_util/align/2.cc: Likewise.
From-SVN: r216214
2014-10-14 18:14:07 +01:00
Rüdiger Sonderfeld
ffffc732ef
re PR libstdc++/54354 (TODO extended iomanip manipulators std::get_time and std::put_time (C++11, section 27.7.5))
...
2014-10-14 Rüdiger Sonderfeld <ruediger@c-plusplus.de>
PR libstdc++/54354
* include/std/iomanip (_Put_time): New struct.
(put_time): New manipulator.
(operator<<): New overloaded function.
* testsuite/27_io/manipulators/extended/put_time/char/1.cc: New.
* testsuite/27_io/manipulators/extended/put_time/char/2.cc: New.
* testsuite/27_io/manipulators/extended/put_time/wchar_t/1.cc: New.
* testsuite/27_io/manipulators/extended/put_time/wchar_t/2.cc: New.
From-SVN: r216211
2014-10-14 18:01:25 +01:00
Kai Tietz
78bd42c423
re PR libstdc++/57440 (Memory usage with future and std containers)
...
2014-10-14 Kai Tietz <ktietz@redhat.com>
PR libstdc++/57440
* config/os/mingw32/os_defines.h (_GTHREAD_USE_MUTEX_INIT_FUNC):
Define to avoid leak.
* config/os/mingw32-w64/os_defines.h: Likewise.
From-SVN: r216210
2014-10-14 18:58:37 +02:00
Evgeny Stupachenko
4513cb8caf
re PR target/63534 (Bootstrap failure on x86_64/i686-linux)
...
PR target/63534
gcc/
* config/i386/i386.c (ix86_expand_split_stack_prologue): Make
__morestack local.
From-SVN: r216208
2014-10-14 16:26:57 +00:00
Jakub Jelinek
694b4cfa08
Makefile.am (DEFS): Add -DPIC.
...
* ubsan/Makefile.am (DEFS): Add -DPIC.
* ubsan/Makefile.in: Regenerated.
From-SVN: r216206
2014-10-14 17:56:52 +02:00
Manuel López-Ibáñez
3aac09524b
line-map.h (linemap_location_from_macro_expansion_p): const struct line_maps * argument.
...
libcpp/ChangeLog:
2014-10-14 Manuel López-Ibáñez <manu@gcc.gnu.org>
* include/line-map.h (linemap_location_from_macro_expansion_p):
const struct line_maps * argument.
(linemap_position_for_line_and_column): const struct line_map *
argument.
* line-map.c (linemap_add_macro_token): Use correct argument name
in comment.
(linemap_position_for_line_and_column): const struct line_map *
argument.
(linemap_macro_map_loc_to_def_point): Fix comment. Make static.
(linemap_location_from_macro_expansion_p): const struct line_maps *
argument.
(linemap_resolve_location): Fix argument names in comment.
From-SVN: r216205
2014-10-14 14:45:36 +00:00
Marc Glisse
48d3af1259
typeck.c (cp_build_unary_op): Accept float vectors.
...
2014-10-14 Marc Glisse <marc.glisse@inria.fr>
gcc/cp/
* typeck.c (cp_build_unary_op) [TRUTH_NOT_EXPR]: Accept float vectors.
gcc/testsuite/
* g++.dg/ext/vector9.C: Test ! with float vectors.
From-SVN: r216201
2014-10-14 13:40:36 +00:00
Alexander Ivchenko
ebe87abf2b
AVX-512. 77/n. Use blend for cond-set V32HI and V64QI.
...
gcc/
* config/i386/i386.c
(ix86_expand_sse_movcc): Handle V64QI and V32HI mode.
(ix86_expand_int_vcond): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216193
2014-10-14 08:56:56 +00:00
Alexander Ivchenko
0ab03ea08c
AVX-512. 74/n. Add byte/word max/mix reduction.
...
gcc/
* config/i386/i386.c
(emit_reduc_half): Handle V64QI and V32HI mode.
* config/i386/sse.md
(define_mode_iterator VI_AVX512BW): New.
(define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216192
2014-10-14 08:52:11 +00:00
Alexander Ivchenko
805e20ad38
AVX-512. 73/n. Extend reduc min/max autogen.
...
gcc/
* config/i386/sse.md
(define_mode_iterator REDUC_SMINMAX_MODE): Add V64QI and V32HI modes.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216191
2014-10-14 08:50:43 +00:00
Alexander Ivchenko
9945a4328a
AVX-512. 72/n. Extend VI itterator.
...
gcc/
* config/i386/i386.c
(ix86_expand_vector_logical_operator): Handle V16SF and V8DF modes.
* config/i386/sse.md
(define_mode_iterator VI): Add V64QI and V32HI modes.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216190
2014-10-14 08:49:23 +00:00
Alexander Ivchenko
7c3a34ae94
AVX-512. 71/n. Remove redudant iterator attribute.
...
gcc/
* config/i386/sse.md (define_mode_attr avx2_avx512f): Remove.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216189
2014-10-14 08:47:55 +00:00
Paolo Carlini
181e036880
typedefs.cc: Rename to alias_decl.cc.
...
2014-10-14 Paolo Carlini <paolo.carlini@oracle.com>
* testsuite/20_util/add_lvalue_reference/requirements/typedefs.cc:
Rename to alias_decl.cc.
* testsuite/20_util/add_rvalue_reference/requirements/typedefs.cc:
Likewise.
* testsuite/20_util/common_type/requirements/typedefs-3.cc: Likewise.
* testsuite/20_util/conditional/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/decay/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/enable_if/requirements/typedefs-2.cc: Likewise.
* testsuite/20_util/make_signed/requirements/typedefs-3.cc: Likewise.
* testsuite/20_util/make_unsigned/requirements/typedefs-3.cc:
Likewise.
* testsuite/20_util/remove_reference/requirements/typedefs.cc:
Likewise.
* testsuite/20_util/result_of/requirements/typedefs.cc: Likewise.
* testsuite/20_util/underlying_type/requirements/typedefs-3.cc:
Likewise.
From-SVN: r216188
2014-10-14 08:45:38 +00:00
Alexander Ivchenko
c305ca7f62
AVX-512. 70/n. Add vpmaxmin.
...
gcc/
* config/i386/sse.md
(define_insn "*sse4_1_<code><mode>3<mask_name>"): Add masking.
(define_insn "*sse4_1_<code><mode>3<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216187
2014-10-14 08:45:17 +00:00
Alexander Ivchenko
cf25c30945
AVX-512. 69/n. Add vpmulhrsw insn support.
...
gcc/
* config/i386/sse.md
(define_insn "avx512bw_umulhrswv32hi3<mask_name>"): New.
(define_expand "<ssse3_avx2>_pmulhrsw<mode>3_mask"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216186
2014-10-14 08:42:02 +00:00
Alexander Ivchenko
ed3e611e05
AVX-512. 68/n. Add vpmullw, vpacksdw, pmaddwd insn.
...
gcc/
* config/i386/sse.md
(define_c_enum "unspec"): Add UNSPEC_PMADDWD512.
(define_mode_iterator VI2_AVX2): Add V32HI mode.
(define_expand "mul<mode>3<mask_name>"): Add masking.
(define_insn "*mul<mode>3<mask_name>"): Ditto.
(define_expand "<s>mul<mode>3_highpart<mask_name>"): Ditto.
(define_insn "*<s>mul<mode>3_highpart<mask_name>"): Ditto.
(define_insn "avx512bw_pmaddwd512<mode><mask_name>"): New.
(define_mode_attr SDOT_PMADD_SUF): Ditto.
(define_expand "sdot_prod<mode>"): Add <SDOT_PMADD_SUF>.
(define_insn "<sse2_avx2>_packssdw<mask_name>"): Add masking.
(define_insn "*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>"): Ditto.
(define_insn "avx2_packusdw"): Delete.
(define_insn "sse4_1_packusdw"): Ditto.
(define_insn "<sse4_1_avx2>_packusdw<mask_name>"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216185
2014-10-14 08:40:34 +00:00
Alexander Ivchenko
1aff6f9a2f
AVX-512. 67/n. Update constraints in vec_dup insn.
...
gcc/
* config/i386/sse.md
(define_insn "vec_dup<mode>"): Update constraints.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216184
2014-10-14 08:38:47 +00:00
Alexander Ivchenko
b99ba39a84
AVX-512. 66/n. Extend vpalignr insn patterns.
...
gcc/
* config/i386/sse.md
(define_mode_iterator SSESCALARMODE): Add V4TI mode.
(define_insn "<ssse3_avx2>_palignr<mode>_mask"): New.
(define_insn "<ssse3_avx2>_palignr<mode>"): Add EVEX version.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216183
2014-10-14 08:35:12 +00:00
Alexander Ivchenko
2ac7a566e8
AVX-512. 65/n. Add rest of VI1-AVX2: mul insn pattern.
...
gcc/
* config/i386/sse.md
(define_expand "mul<mode>3<mask_name>"): Add masking.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216182
2014-10-14 08:33:01 +00:00
Alexander Ivchenko
d281ef4281
AVX-512. 64/n. Add rest of VI1-AVX2: vpack[us]wb.
...
gcc/
* config/i386/sse.md
(define_insn "<sse2_avx2>_packsswb<mask_name>"): Add masking.
(define_insn "<sse2_avx2>_packuswb<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216181
2014-10-14 08:28:33 +00:00
Alexander Ivchenko
5f64b49668
AVX-512. 62/n. Add vpmaddubsw,vdbpsadbw insn patterns.
...
gcc/
* config/i386/sse.md
(define_c_enum "unspec"): Add UNSPEC_DBPSADBW, UNSPEC_PMADDUBSW512.
(define_insn "avx512bw_pmaddubsw512<mode><mask_name>"): New.
(define_insn "<mask_codefor>avx512bw_dbpsadbw<mode><mask_name>"):
Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216180
2014-10-14 08:26:09 +00:00
Alexander Ivchenko
26358fb6a0
AVX-512. 61/n. Update FP logic insn patterns.
...
gcc/
* config/i386/sse.md
(define_insn "<sse>_andnot<VF_128_256:mode>3<mask_name>"): Add masking,
use VF_128_256 mode iterator and update assembler emit code.
(define_insn "<sse>_andnot<VF_512:mode>3<mask_name>"): New.
(define_expand "<any_logic:code><VF_128_256:mode>3<mask_name>"):
Add masking, use VF_128_256 mode iterator.
(define_expand "<any_logic:code><VF_512:mode>3<mask_name>"): New.
(define_insn "*<any_logic:code><VF_128_256:mode>3<mask_name>"):
Add masking, use VF_128_256 mode iterator and update assembler emit
code.
(define_insn "*<any_logic:code><VF_512:mode>3<mask_name>"): New.
(define_mode_attr avx512flogicsuff): Delete.
(define_insn "avx512f_<logic><mode>"): Ditto.
(define_insn "*andnot<mode>3<mask_name>"): Update MODE_XI, MODE_OI,
MODE_TI.
(define_insn "<mask_codefor><code><mode>3<mask_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216179
2014-10-14 08:20:43 +00:00
Alexander Ivchenko
06ba0585d6
AVX-512. 60/n. Update 128bit ashrv insn pattern.
...
gcc/
* config/i386/sse.md
(define_mode_iterator VI128_128 [V16QI V8HI V2DI]): Delete.
(define_expand "vashr<mode>3<mask_name>"): Add masking,
use VI12_128 mode iterator.
(define_expand "ashrv2di3<mask_name>"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216178
2014-10-14 08:19:17 +00:00
Alexander Ivchenko
54967fb0c8
AVX-512. 59/n. Add vptest[n]m, ucmp, cmpeq insn patterns.
...
gcc/
* config/i386/i386.c
(ix86_expand_args_builtin): Handle CODE_FOR_avx512vl_cmpv4di3_mask,
CODE_FOR_avx512vl_cmpv8si3_mask, CODE_FOR_avx512vl_ucmpv4di3_mask,
CODE_FOR_avx512vl_ucmpv8si3_mask, CODE_FOR_avx512vl_cmpv2di3_mask,
CODE_FOR_avx512vl_cmpv4si3_mask, CODE_FOR_avx512vl_ucmpv2di3_mask,
CODE_FOR_avx512vl_ucmpv4si3_mask.
* config/i386/sse.md
(define_insn "avx512f_ucmp<mode>3<mask_scalar_merge_name>"): Delete.
"<avx512>_ucmp<VI12_AVX512VL:mode>3<mask_scalar_merge_name>"):New.
(define_insn
"<avx512>_ucmp<VI48_AVX512VL:mode>3<mask_scalar_merge_name>"):Ditto.
(define_expand "<avx512>_eq<mode>3<mask_scalar_merge_name>"): Ditto.
(define_insn "<avx512>_eq<mode>3<mask_scalar_merge_name>_1"): Ditto.
(define_insn "<avx512>_gt<mode>3<mask_scalar_merge_name>"): Ditto.
(define_insn "<avx512>_testm<mode>3<mask_scalar_merge_name>"): Ditto.
(define_insn "<avx512>_testnm<mode>3<mask_scalar_merge_name>"): Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216177
2014-10-14 08:15:32 +00:00
Alexander Ivchenko
f1df7a1c52
AVX-512. 58/n. Add vpmul[u]dq insn patterns.
...
gcc/
* config/i386/sse.md
(define_expand "vec_widen_umult_even_v8si<mask_name>"): Add masking.
(define_insn "*vec_widen_umult_even_v8si<mask_name>"): Ditto.
(define_expand "vec_widen_umult_even_v4si<mask_name>"): Ditto.
(define_insn "*vec_widen_umult_even_v4si<mask_name>"): Ditto.
(define_expand "vec_widen_smult_even_v8si<mask_name>"): Ditto.
(define_insn "*vec_widen_smult_even_v8si<mask_name>"): Ditto.
(define_expand "sse4_1_mulv2siv2di3<mask_name>"): Ditto.
(define_insn "*sse4_1_mulv2siv2di3<mask_name>"): Ditto.
(define_insn "avx512dq_mul<mode>3<mask_name>"): New.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216176
2014-10-14 08:13:31 +00:00
Alexander Ivchenko
51e14b0572
AVX-512. 57/n. Extend blend/cmp/brodcast insn patterns.
...
gcc/
* config/i386/sse.md
(define_insn "avx512f_blendm<mode>"): Delete.
(define_insn "<avx512>_blendm<VI48_AVX512VL:mode>"): New.
(define_insn "<avx512>_blendm<VI12_AVX512VL:mode>"): Ditto..
(define_mode_attr cmp_imm_predicate): Add V8SF, V4DF, V8SI, V4DI, V4SF,
V2DF, V4SI, V2DI, V32HI, V64QI, V16HI, V32QI, V8HI, V16QI modes.
(define_insn
"avx512f_cmp<mode>3<mask_scalar_merge_name><round_saeonly_name>"):
Remove.
(define_insn
"<avx512>_cmp<VI48_AVX512VL:mode>3<mask_scalar_merge_name><round_saeonly_name>"):
New.
(define_insn
"<avx512>_cmp<VI12_AVX512VL:mode>3<mask_scalar_merge_name><round_saeonly_name>"):
Ditto.
(define_insn "<mask_codefor>avx512f_vec_dup<mode><mask_name>"): Delete.
(define_insn "<avx512>_vec_dup<V48_AVX512VL:mode><mask_name>"): New.
(define_insn "<avx512>_vec_dup<V12_AVX512VL:mode><mask_name>"): Ditto.
(define_insn "<mask_codefor>avx512f_vec_dup_gpr<mode><mask_name>"):
Delete.
(define_insn
"<mask_codefor><avx512>_vec_dup_gpr<VI48_AVX512VL:mode><mask_name>"):
New.
(define_insn
"<mask_codefor><avx512>_vec_dup_gpr<VI12_AVX512VL:mode><mask_name>"):
Ditto.
(define_insn·"<mask_codefor>avx512f_vec_dup_mem<mode><mask_name>"):
Delete.
(define_insn
"<mask_codefor><avx512>_vec_dup_mem<VI48_AVX512VL:mode><mask_name>"):
New.
(define_insn
"<mask_codefor><avx512>_vec_dup_mem<VI12_AVX512VL:mode><mask_name>"):
Ditto.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216175
2014-10-14 08:10:42 +00:00
Richard Biener
b6fed550a3
re PR tree-optimization/63512 (ICE: error: virtual use of statement not up-to-date)
...
2014-10-14 Richard Biener <rguenther@suse.de>
PR tree-optimization/63512
* tree-ssa-pre.c (create_expression_by_pieces): Mark stmts
modified.
* g++.dg/torture/pr63512.C: New testcase.
From-SVN: r216174
2014-10-14 07:36:02 +00:00
Oleg Endo
340232b7e4
re PR target/63260 ([SH] fabs, fneg do not need fp-mode setting and do not use fpscr)
...
gcc/
PR target/63260
* config/sh/sh.md (negsf2, negsf2_i, negdf2, negdf2_i, abssf2,
abssf2_i, absdf2, absdf2_i): Remove fp_mode attribute. Remove use
of FPSCR.
(negsf2_i): Rename to *negsf2_i.
(abssf2_i): Rename to *abssf2_i.
(negdf2_i): Rename to *negdf2_i.
(absdf2_i): Rename to *absdf2_i.
gcc/testsuite/
PR target/63260
* gcc.target/sh/pr63260.c: New.
From-SVN: r216173
2014-10-14 00:50:18 +00:00
GCC Administrator
f0a81c69c9
Daily bump.
...
From-SVN: r216172
2014-10-14 00:16:25 +00:00