arm.h has had this error message since 1997, but it is no longer
needed since option parsing has been improved: -mXXX-endian is handled
via arm.opt and updates the BIG_END mask. So, the last
instance of -mXXX-endian on the command line wins.
Tested on many arm* configurations, with no impact on the testsuite results.
2021-05-16 Christophe Lyon <christophe.lyon@linaro.org>
gcc/
* config/arm/arm.h (CPP_SPEC): Remove error message about
-mlittle-endian/-mbig-endian conflict.
The test requires an FPU, so use -march=armv7-a+fp -mfpu=auto instead
of -march=armv7-a.
We also remove dg-require-effective-target arm_fp_ok, but keep
dg-add-options arm_fp: this enables the test to pass on arm-eabi
configured with default cpu/fpu/mode.
dg-require-effective-target arm_fp_ok fails on such a configuration
for lack of FPU, since dg-options are not taken into account by
dg-require-effective-target.
Add -march=armv7-a+fp -mfpu=auto is sufficient for arm_fp options to
be acceptable.
This enables the test to pass on all the arm-eabi configurations I'm
testing, as well as arm-linux-gnueabi when forcing -march=armv5t.
2021-05-16 Christophe Lyon <christophe.lyon@linaro.org>
gcc/testsuite/
* gcc.target/arm/unsigned-float.c: Remove arm_fp_ok, adjust
dg-options.
2021-05-13 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
__ROP_PROTECT__ if -mrop-protect is selected.
The typo here, is obviously mistaken removal of lines next
to a line that was validly removed. Targets affected are
those with a delay-slot *and* defining TARGET_FLAGS_REGNUM.
In-tree, a git-grep says the only ones matching are CRIS,
h8300 and visium. The code removal has the effect of
wrong-code, not reverting the effect of r11-2814.
I'm "guessing" it was the effect of an incorrect conflict
resolution in preparatory work for the r12-440 /
bd1cd0d0e0 / "Remove CC0" commit, when rebasing a related
branch, and not testing any of the affected targets. Either
way, the effect was a btest-gcc.sh state of "regress-1152"
for cris-elf. FWIW, I wrote the removed code (sans the
validly removed cc0 line), a part of what was committed at
2020-08-24 as 0e6c51de8e / r11-2814.
This commit gets cris-elf test-results back to a sane state
(tested at 0ffdbc85d9 / r12-761).
gcc:
* reorg.c (fill_slots_from_thread): Reinstate code typoed out in
"Remove CC0".
This reverts commit ca9bb74a5f.
...because of Ada issues I did not catch with original testing.
gcc/ChangeLog:
2021-05-12 Martin Jambor <mjambor@suse.cz>
Revert:
PR tree-optimization/100453
* tree-sra.c (sra_modify_assign): All const base accesses do not
need refreshing, not just those from decl_pool.
(sra_modify_assign): Do not refresh into a const base decl.
gcc/testsuite/ChangeLog:
2021-05-12 Martin Jambor <mjambor@suse.cz>
Revert:
PR tree-optimization/100453
* gcc.dg/tree-ssa/pr100453.c: New test.
On Tue, Jan 19, 2021 at 04:10:33PM +0000, Richard Sandiford via Gcc-patches wrote:
> Ah, ok, thanks for the extra context.
>
> So AIUI the problem when recording xmm2<-di isn't just:
>
> [A] partial_subreg_p (vd->e[sr].mode, GET_MODE (src))
>
> but also that:
>
> [B] partial_subreg_p (vd->e[sr].mode, vd->e[vd->e[sr].oldest_regno].mode)
>
> For example, all registers in this sequence can be part of the same chain:
>
> (set (reg:HI R1) (reg:HI R0))
> (set (reg:SI R2) (reg:SI R1)) // [A]
> (set (reg:DI R3) (reg:DI R2)) // [A]
> (set (reg:SI R4) (reg:SI R[0-3]))
> (set (reg:HI R5) (reg:HI R[0-4]))
>
> But:
>
> (set (reg:SI R1) (reg:SI R0))
> (set (reg:HI R2) (reg:HI R1))
> (set (reg:SI R3) (reg:SI R2)) // [A] && [B]
>
> is problematic because it dips below the precision of the oldest regno
> and then increases again.
>
> When this happens, I guess we have two choices:
>
> (1) what the patch does: treat R3 as the start of a new chain.
> (2) pretend that the copy occured in vd->e[sr].mode instead
> (i.e. copy vd->e[sr].mode to vd->e[dr].mode)
>
> I guess (2) would need to be subject to REG_CAN_CHANGE_MODE_P.
> Maybe the optimisation provided by (2) compared to (1) isn't common
> enough to be worth the complication.
>
> I think we should test [B] as well as [A] though. The pass is set
> up to do some quite elaborate mode changes and I think rejecting
> [A] on its own would make some of the other code redundant.
> It also feels like it should be a seperate “if” or “else if”,
> with its own comment.
Unfortunately, we now have a testcase that shows that testing also [B]
is a problem (unfortunately now latent on the trunk, only reproduces
on 10 and 11 branches).
The comment in the patch tries to list just the interesting instructions,
we have a 64-bit value, copy low 8 bit of those to another register,
copy full 64 bits to another register and then clobber the original register.
Before that (set (reg:DI r14) (const_int ...)) we have a chain
DI r14, QI si, DI bp , that instruction drops the DI r14 from that chain, so
we have QI si, DI bp , si being the oldest_regno.
Next DI si is copied into DI dx. Only the low 8 bits of that are defined,
the rest is unspecified, but we would add DI dx into that same chain at the
end, so QI si, DI bp, DI dx [*]. Next si is overwritten, so the chain is
DI bp, DI dx. And then we see (set (reg:DI dx) (reg:DI bp)) and remove it
as redundant, because we think bp and dx are already equivalent, when in
reality that is true only for the lowpart 8 bits.
I believe the [*] marked step above is where the bug is.
The committed regcprop.c (copy_value) change (but only committed to
trunk/11, not to 10) added
else if (partial_subreg_p (vd->e[sr].mode, GET_MODE (src))
&& partial_subreg_p (vd->e[sr].mode,
vd->e[vd->e[sr].oldest_regno].mode))
return;
and while the first partial_subreg_p call returns true, the second one
doesn't; before the (set (reg:DI r14) (const_int ...)) insn it would be
true and we'd return, but as that reg got clobbered, si became the oldest
regno in the chain and so vd->e[vd->e[sr].oldest_regno].mode is QImode
and vd->e[sr].mode is QImode too, so the second partial_subreg_p is false.
But as the testcase shows, what is the oldest_regno in the chain is
something that changes over time, so relying on it for anything is
problematic, something could have a different oldest_regno and later
on get a different oldest_regno (perhaps with different mode) because
the oldest_regno got overwritten and it can change both ways.
The following patch effectively implements your (2) above.
2021-05-15 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/100342
* regcprop.c (copy_value): When copying a source reg in a wider
mode than it has recorded for the value, adjust recorded destination
mode too or punt if !REG_CAN_CHANGE_MODE_P.
* gcc.target/i386/pr100342.c: New test.
gcc/fortran/ChangeLog:
* resolve.c (resolve_symbol): Handle implicit SAVE of main-program
for vars in 'omp threadprivate' and 'omp declare target'.
gcc/testsuite/ChangeLog:
* gfortran.dg/gomp/implicit-save.f90: New test.
Comparing DECL_SOURCE_LOCATION like the GCC 11 patch for PR 95870 will also
work for user-defined functions, if we update their location when
instantiating. Another option would be to use LAMBDA_EXPR_REGEN_INFO for
lambdas, but this way is even simpler.
gcc/cp/ChangeLog:
PR c++/95870
* pt.c (enclosing_instantiation_of): Just compare
DECL_SOURCE_LOCATION.
(regenerate_decl_from_template): Copy DECL_SOURCE_LOCATION.
The sqdmlal2 patterns are hidden beneath the SBINQOPS iterator and unfortunately they don't match
canonical RTL because the simple accumulate operand comes in the first arm of the SS_PLUS.
This patch splits the SS_PLUS and SS_MINUS forms with the SS_PLUS operands set up to match
the canonical form, where the complex operand comes first.
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md
(aarch64_sqdml<SBINQOPS:as>l2_lane<mode>_internal): Split into...
(aarch64_sqdmlsl2_lane<mode>_internal): ... This...
(aarch64_sqdmlal2_lane<mode>_internal): ... And this.
(aarch64_sqdml<SBINQOPS:as>l2_laneq<mode>_internal): Split into ...
(aarch64_sqdmlsl2_laneq<mode>_internal): ... This...
(aarch64_sqdmlal2_laneq<mode>_internal): ... And this.
(aarch64_sqdml<SBINQOPS:as>l2_n<mode>_internal): Split into...
(aarch64_sqdmlsl2_n<mode>_internal): ... This...
(aarch64_sqdmlal2_n<mode>_internal): ... And this.
The various sqdmlal2 and sqdmlsl2 expanders perform almost identical functions and can be
merged using code iterators and attributes to reduce the code in the MD file.
No behavioural change is expected.
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md (aarch64_sqdmlal2<mode>): Merge into...
(aarch64_sqdml<SBINQOPS:as>l2<mode>): ... This.
(aarch64_sqdmlsl2<mode>): Delete.
(aarch64_sqdmlal2_lane<mode>): Merge this...
(aarch64_sqdmlsl2_lane<mode>): ... And this...
(aarch64_sqdml<SBINQOPS:as>l2_lane<mode>): ... Into this.
(aarch64_sqdmlal2_laneq<mode>): Merge this...
(aarch64_sqdmlsl2_laneq<mode>): ... And this...
(aarch64_sqdml<SBINQOPS:as>l2_laneq<mode>): ... Into this.
(aarch64_sqdmlal2_n<mode>): Merge this...
(aarch64_sqdmlsl2_n<mode>): ... And this...
(aarch64_sqdml<SBINQOPS:as>l2_n<mode>): ... Into this.
This patch implements [dcl.attr.grammar]/5: "If an attribute-specifier-seq
appertains to a friend declaration ([class.friend]), that declaration shall
be a definition."
This restriction applies to C++11-style attributes as well as GNU
attributes with the exception that we allow GNU attributes that require
a type, such as vector_size to continue accepting code as in attrib63.C.
There are various forms of friend declarations, we have friend
templates, C++11 extended friend declarations, and so on. In some cases
we already ignore the attribute and warn that it was ignored. But
certain cases weren't diagnosed, and with this patch we'll give a hard
error. I tried hard not to emit both a warning and error and I think it
worked out.
Jason provided the cp_parser_decl_specifier_seq hunk to detect using
standard attributes in the middle of decl-specifiers, which is invalid.
Co-authored-by: Jason Merrill <jason@redhat.com>
gcc/cp/ChangeLog:
PR c++/99032
* cp-tree.h (any_non_type_attribute_p): Declare.
* decl.c (grokdeclarator): Diagnose when an attribute appertains to
a friend declaration that is not a definition.
* decl2.c (any_non_type_attribute_p): New.
* parser.c (cp_parser_decl_specifier_seq): Diagnose standard attributes
in the middle of decl-specifiers.
(cp_parser_elaborated_type_specifier): Diagnose when an attribute
appertains to a friend declaration that is not a definition.
(cp_parser_member_declaration): Likewise.
gcc/testsuite/ChangeLog:
PR c++/99032
* g++.dg/cpp0x/friend7.C: New test.
* g++.dg/cpp0x/gen-attrs-4.C: Add dg-error.
* g++.dg/cpp0x/gen-attrs-39-1.C: Likewise.
* g++.dg/cpp0x/gen-attrs-74.C: New test.
* g++.dg/ext/attrib63.C: New test.
When SRA transforms an assignment where the RHS is an aggregate decl
that it creates replacements for, the (least efficient) fallback
method of dealing with them is to store all the replacements back into
the original decl and then let the original assignment takes itc
sourse.
That of course should not need to be done for TREE_READONLY bases
which cannot change contents. The SRA code handled this situation in
one of two necessary places but only for DECL_IN_CONSTANT_POOL const
decls, this patch modifies both to check TREE_READONLY.
gcc/ChangeLog:
2021-05-12 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/100453
* tree-sra.c (sra_modify_assign): All const base accesses do not
need refreshing, not just those from decl_pool.
(sra_modify_assign): Do not refresh into a const base decl.
gcc/testsuite/ChangeLog:
2021-05-12 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/100453
* gcc.dg/tree-ssa/pr100453.c: New test.
This adds the local patch to handle missing __builtin_os_log_format
on Darwin.
libsanitizer/ChangeLog:
* LOCAL_PATCHES: Add Darwin patch for __builtin_os_log_format.
GCC does not, currently, define __builtin_os_log_format, which
is needed by os/log.h. Do not include that header unless the
builtin is defined (since the header errors out on the same
condition). Provide a work-around solution to the missing API
provided via the header.
libsanitizer/ChangeLog:
* sanitizer_common/sanitizer_mac.cpp : Check for the
availability of __builtin_os_log_format before trying to
include a header depending on it.
(OS_LOG_DEFAULT): New.
(os_log_error): Define to a fall-back using an older API.
This should help LD's --gc-sections feature to reduce final ELF size.
libgcc/ChangeLog:
* config/pru/mpyll.S (__pruabi_mpyll): Place into own section.
Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
The function declarations were updated to use `const scope', but the
static asserts were not.
Reviewed-on: https://github.com/dlang/druntime/pull/3470
libphobos/ChangeLog:
* libdruntime/MERGE: Merge upstream druntime 98c6ff0c.
Addresses the following clang warning:
gcc/tree-ssa-dom.c:652:33: warning: private field 'm_simplifier' is not used [-Wunused-private-field]
gcc/ChangeLog:
* tree-ssa-dom.c: Remove m_simplifier.
In preparation of PR99928 patch review, I've prepared testcases with clauses
that need more interesting handling on combined/composite constructs,
in particular firstprivate, lastprivate, firstprivate+lastprivate, linear
(explicit on non-iv, explicit on simd iv, implicit on simd iv, implicit on
simd iv declared in the construct), reduction (scalars, array sections of
array variables, array sections with pointer bases) and in_reduction.
OpenMP 5.0 had the wording broken for reduction, the intended rule to use
map(tofrom:) on target when combined with it was bound only on inscan modifier
presence which makes no sense, as then inscan may not be used, this has
been fixed in 5.1 and I'm just assuming 5.1 wording for that.
There are various cases where e.g. from historical or optimization reasons
GCC slightly deviates from the rules, but in most cases it is something
that shouldn't be really observable, e.g. whether
#pragma omp parallel for firstprivate(x)
is handled as
#pragma omp parallel shared(x)
#pragma omp for firstprivate(x)
or
#pragma omp parallel firstprivate(x)
#pragma omp for
shouldn't be possible to distinguish in user code. I've added FIXMEs
in the testcases about that, but maybe we just should keep it as is
(alternative would be to do it in standard compliant way and transform
into whatever we like after gimplification (e.g. early during omplower)).
Some cases we for historical reasons implement even with clauses on
constructs which in the standard don't accept them that way and then
handling those magically in omp lowering/expansion, in particular e.g.
#pragma omp parallel for firstprivate(x) lastprivate(x)
we treat as
#pragma omp parallel firstprivate(x) lastprivate(x)
#pragma omp for
even when lastprivate is not valid on parallel. Maybe one day we
could change that if we make sure we don't regress generated code quality.
I've also found a bug in OpenMP 5.0/5.1,
#pragma omp parallel sections firstprivate(x) lastprivate(x)
incorrectly says that it should be handled as
#pragma omp parallel firstprivate(x)
#pragma omp sections lastprivate(x)
which when written that way results in error; filed as
https://github.com/OpenMP/spec/issues/2758
to be fixed in OpenMP 5.2. GCC handles it the way it used to do
and users expect, so nothing to fix on the GCC side.
Also, we don't support yet in_reduction clause on target construct,
which means the -11.c testcase can't include any tests about in_reduction
handling on all the composite constructs that include target.
The work found two kinds of bugs on the GCC side, one is the known thing
that we implement still the 4.5 behavior and don't mark for
lastprivate/linear/reduction the list item as map(tofrom:) as mentioned
in PR99928. These cases are xfailed in the tests.
And another one is with r21 and r28 in -{8,9,10}.c tests - we don't add
reduction clause on teams for
#pragma omp {target ,}teams distribute simd reduction(+:r)
even when the spec says that teams shouldn't receive reduction only
when combined with loop construct.
In
make check-gcc check-g++ RUNTESTFLAGS='--target_board=unix\{-m32,-m64\} gomp.exp=pr99928*'
testing this shows:
# of expected passes 5648
# of expected failures 872
and with Tobias' patch applied:
# of expected passes 5648
# of unexpected successes 384
# of expected failures 488
2021-05-13 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99928
* c-c++-common/gomp/pr99928-1.c: New test.
* c-c++-common/gomp/pr99928-2.c: New test.
* c-c++-common/gomp/pr99928-3.c: New test.
* c-c++-common/gomp/pr99928-4.c: New test.
* c-c++-common/gomp/pr99928-5.c: New test.
* c-c++-common/gomp/pr99928-6.c: New test.
* c-c++-common/gomp/pr99928-7.c: New test.
* c-c++-common/gomp/pr99928-8.c: New test.
* c-c++-common/gomp/pr99928-9.c: New test.
* c-c++-common/gomp/pr99928-10.c: New test.
* c-c++-common/gomp/pr99928-11.c: New test.
Fix a warning when building on machines that don't have 32-bit pointers
gcc/testsuite:
PR target/100563
* gcc.dg/pr100563.c (dg-options): Add -wno-pointer-to-int-cast.
contrib/ChangeLog:
* mklog.py: Put PR entries before all ChangeLog entries
(will be added to all ChangeLog locations by Daily bump script).
* test_mklog.py: Test the new behavior.
Normally we expect the gimple optimizers to fold away comparisons that
are always true, but at some lower optimization levels this is not
always the case, so the back-end has to be able to generate correct
code in these cases.
In this example, we have a comparison of the form
(unsigned long long) op <= ~0ULL
which, of course is always true.
Normally, in the arm back-end we handle these expansions where the
immediate cannot be handled directly by adding 1 to the constant and
then adjusting the comparison operator:
(unsigned long long) op < CONST + 1
but we cannot do that when the constant is already the largest value.
Fortunately, we observe that the comparisons we need to handle this
way are either always true or always false, so instead of forming a
comparison against the maximum value, we can replace it with a
comparison against the minimum value (which just happens to also be a
constant we can handle. So
op1 <= ~0ULL -> op1 >= 0U
op1 > ~0ULL -> op1 < 0U
op1 <= LONG_LONG_INT_MAX -> op1 >= (-LONG_LONG_INT_MAX - 1)
op1 > LONG_LONG_INT_MAX -> op1 < (-LONG_LONG_INT_MAX - 1)
gcc:
PR target/100563
* config/arm/arm.c (arm_canonicalize_comparison): Correctly
canonicalize DImode inequality comparisons against the
maximum integral value.
gcc/testsuite:
* gcc.dg/pr100563.c: New test.
As mentioned in the PR, we don't support arithmetic right V2DImode or
V4DImode on x86 without -mavx512vl or -mxop. The ISAs indeed don't have
{,v}psraq instructions until AVX512VL, but we actually can emulate it quite
easily.
One case is arithmetic >> 63, we can just emit {,v}pxor; {,v}pcmpgt for
that for SSE4.2+, or for SSE2 psrad $31; pshufd $0xf5.
Then arithmetic >> by constant > 32, that can be done with {,v}psrad $31
and {,v}psrad $(cst-32) and two operand permutation,
arithmetic >> 32 can be done as {,v}psrad $31 and permutation of that
and the original operand. Arithmetic >> by constant < 32 can be done
as {,v}psrad $cst and {,v}psrlq $cst and two operand permutation.
And arithmetic >> by variable scalar amount can be done as
arithmetic >> 63, logical >> by the amount, << by (64 - amount of the
>> 63 result; note that the vector << 64 result in 0) and oring together.
I had to improve the permutation generation so that it actually handles
the needed permutations (or handles them better).
2021-05-13 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/98856
* config/i386/i386.c (ix86_shift_rotate_cost): Add CODE argument.
Expect V2DI and V4DI arithmetic right shifts to be emulated.
(ix86_rtx_costs, ix86_add_stmt_cost): Adjust ix86_shift_rotate_cost
caller.
* config/i386/i386-expand.c (expand_vec_perm_2perm_interleave,
expand_vec_perm_2perm_pblendv): New functions.
(ix86_expand_vec_perm_const_1): Use them.
* config/i386/sse.md (ashr<mode>3<mask_name>): Rename to ...
(<mask_codefor>ashr<mode>3<mask_name>): ... this.
(ashr<mode>3): New define_expand with VI248_AVX512BW iterator.
(ashrv4di3): New define_expand.
(ashrv2di3): Change condition to TARGET_SSE2, handle !TARGET_XOP
and !TARGET_AVX512VL expansion.
* gcc.target/i386/sse2-psraq-1.c: New test.
* gcc.target/i386/sse4_2-psraq-1.c: New test.
* gcc.target/i386/avx-psraq-1.c: New test.
* gcc.target/i386/avx2-psraq-1.c: New test.
* gcc.target/i386/avx-pr82370.c: Adjust expected number of vpsrad
instructions.
* gcc.target/i386/avx2-pr82370.c: Likewise.
* gcc.target/i386/avx512f-pr82370.c: Likewise.
* gcc.target/i386/avx512bw-pr82370.c: Likewise.
* gcc.dg/torture/vshuf-4.inc: Add two further permutations.
* gcc.dg/torture/vshuf-8.inc: Likewise.
