Commit Graph

182347 Commits

Author SHA1 Message Date
Marius Hillenbrand
2f49508599 MAINTAINERS: Add myself for write after approval.
ChangeLog:

2020-12-17  Marius Hillenbrand  <mhillen@linux.ibm.com>

	* MAINTAINERS (Write After Approval): Add myself.
2020-12-17 11:36:43 +01:00
Tobias Burnus
ba9fa68405 Fortran: Delay vtab generation until after parsing [PR92587]
gcc/fortran/ChangeLog:

	PR fortran/92587
	* match.c (gfc_match_assignment): Move gfc_find_vtab call from here ...
	* resolve.c (gfc_resolve_code): ... to here.

gcc/testsuite/ChangeLog:

	PR fortran/92587
	* gfortran.dg/finalize_37.f90: New test.
2020-12-17 10:39:09 +01:00
Harald Anlauf
c09deceb53 PR fortran/98307 - Dependency check fails when using "allocatable"
The dependency check for FORALL constructs already handled pointer
components to derived types, but missed allocatables.  Fix that.

gcc/fortran/ChangeLog:

	PR fortran/98307
	* trans-stmt.c (check_forall_dependencies): Extend dependency
	check to allocatable components of derived types.

gcc/testsuite/ChangeLog:

	PR fortran/98307
	* gfortran.dg/forall_19.f90: New test.
2020-12-17 10:31:55 +01:00
Ian Lance Taylor
6f8486523f test: add new Go tests from source repo 2020-12-16 19:43:20 -08:00
Ian Lance Taylor
ba74e74ac6 test: add new Go tests from source repo 2020-12-16 19:38:08 -08:00
Takayuki 'January June' Suwa
40bf68bbe0 gcc: xtensa: add optimizations for shift operations
2020-12-16  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
gcc/
	* config/xtensa/xtensa.md (*ashlsi3_1, *ashlsi3_3x, *ashrsi3_3x)
	(*lshrsi3_3x): New patterns.

gcc/testsuite/
	* gcc.target/xtensa/shifts.c: New test.
2020-12-16 17:53:17 -08:00
GCC Administrator
eefe499fdf Daily bump. 2020-12-17 00:16:37 +00:00
Richard Sandiford
0b76990a9d fwprop: Rewrite to use RTL SSA
This patch rewrites fwprop.c to use the RTL SSA framework.  It tries
as far as possible to mimic the old behaviour, even in caes where
that doesn't fit naturally with the new framework.  I've added ???
comments to mark those places, but I think “fixing” them should
be done separately to make bisection easier.

In particular:

* The old implementation iterated over uses, and after a successful
  substitution, the new insn's uses were added to the end of the list.
  The pass still processed those uses, but because it processed them at
  the end, it didn't fully optimise one instruction before propagating
  it into the next.

  The new version follows the same approach for comparison purposes,
  but I'd like to drop that as a follow-on patch.

* The old implementation operated on single use sites (DF_REF_LOCs).
  This doesn't work well for instructions with match_dups, where it's
  necessary to update both an operand and its dups at the same time.
  For example, attempting to substitute into a divmod instruction would
  fail because only the div or the mod side would be updated.

  The new version again follows this to some extent for comparison
  purposes (although not exactly).  Again I'd like to drop it as a
  follow-on patch.

  One difference is that if a register occurs in multiple MEM addresses
  in a set, the new version will try to update them all at once.  This is
  what causes the SVE ACLE st4* output to improve.

Also, the old version didn't naturally guarantee termination (PR79405),
whereas the new one does.

gcc/
	* fwprop.c: Rewrite to use the RTL SSA framework.

gcc/testsuite/
	* gcc.dg/rtl/x86_64/test-return-const.c.before-fwprop.c: Don't
	expect insn updates to be deferred.
	* gcc.target/aarch64/sve/acle/asm/st4_s8.c: Expect the addition
	to be folded into the address.
	* gcc.target/aarch64/sve/acle/asm/st4_u8.c: Likewise.
2020-12-17 00:15:12 +00:00
Richard Sandiford
73b7582775 Add rtl-ssa
This patch adds the RTL SSA infrastructure itself.  The following
fwprop.c patch will make use of it.

gcc/
	* configure.ac: Add rtl-ssa to the list of dependence directories.
	* configure: Regenerate.
	* Makefile.in (rtl-ssa-warn): New variable.
	(OBJS): Add the rtl-ssa object files.
	* emit-rtl.h (rtl_data::ssa): New field.
	* rtl-ssa.h: New file.
	* system.h: Include <functional> when INCLUDE_FUNCTIONAL is defined.
	* rtl-ssa/access-utils.h: Likewise.
	* rtl-ssa/accesses.h: New file.
	* rtl-ssa/accesses.cc: Likewise.
	* rtl-ssa/blocks.h: New file.
	* rtl-ssa/blocks.cc: Likewise.
	* rtl-ssa/change-utils.h: Likewise.
	* rtl-ssa/changes.h: New file.
	* rtl-ssa/changes.cc: Likewise.
	* rtl-ssa/functions.h: New file.
	* rtl-ssa/functions.cc: Likewise.
	* rtl-ssa/insn-utils.h: Likewise.
	* rtl-ssa/insns.h: New file.
	* rtl-ssa/insns.cc: Likewise.
	* rtl-ssa/internals.inl: Likewise.
	* rtl-ssa/is-a.inl: Likewise.
	* rtl-ssa/member-fns.inl: Likewise.
	* rtl-ssa/movement.h: Likewise.
2020-12-17 00:15:11 +00:00
Richard Sandiford
47d52e17ad doc: Add documentation for rtl-ssa
This patch adds some documentation to rtl.texi about the SSA form.
It only really describes the high-level structure -- I think for
API-level stuff it's better to rely on function comments instead.

gcc/
	* doc/rtl.texi (RTL SSA): New node.
2020-12-17 00:15:11 +00:00
Richard Sandiford
a20cc01679 rtlanal: Add simple_regno_set
This patch adds a routine for finding a “simple” SET for a register
definition.  See the comment in the patch for details.

gcc/
	* rtl.h (simple_regno_set): Declare.
	* rtlanal.c (simple_regno_set): New function.
2020-12-17 00:15:10 +00:00
Richard Sandiford
04ee46ed1c rtlanal: Add some new helper classes
This patch adds some classes for gathering the list of registers
and memory that are read and written by an instruction, along
with various properties about the accesses.  In some ways it's
similar to the information that DF collects for registers,
but extended to memory.  The main reason for using it instead
of DF is that it can analyse tentative changes to instructions
before they've been committed.

The classes also collect general information about the instruction,
since it's cheap to do and helps to avoid multiple walks of the same
RTL pattern.

I've tried to optimise the code quite a bit, since with later patches
it becomes relatively performance-sensitive.  See the discussion in
the comments for the trade-offs involved.

I put the declarations in a new rtlanal.h header file since it
seemed a bit excessive to put so much new inline stuff in rtl.h.

gcc/
	* rtlanal.h: New file.
	(MEM_REGNO): New constant.
	(rtx_obj_flags): New namespace.
	(rtx_obj_reference, rtx_properties): New classes.
	(growing_rtx_properties, vec_rtx_properties_base): Likewise.
	(vec_rtx_properties): New alias.
	* rtlanal.c: Include it.
	(rtx_properties::try_to_add_reg): New function.
	(rtx_properties::try_to_add_dest): Likewise.
	(rtx_properties::try_to_add_src): Likewise.
	(rtx_properties::try_to_add_pattern): Likewise.
	(rtx_properties::try_to_add_insn): Likewise.
	(vec_rtx_properties_base::grow): Likewise.
2020-12-17 00:15:09 +00:00
Richard Sandiford
a240ea024d recog: Add an RAII class for undoing insn changes
When using validate_change to make a group of changes, you have
to remember to cancel them if something goes wrong.  This patch
adds an RAII class to make that easier.  See the comments in the
patch for details and examples.

gcc/
	* recog.h (insn_change_watermark): New class.
2020-12-17 00:15:08 +00:00
Richard Sandiford
0d74260a1f recog: Add a class for propagating into insns
This patch adds yet another way of propagating into an instruction and
simplifying the result.  (The net effect of the series is to keep the
total number of propagation approaches the same though, since a later
patch removes the fwprop.c routines.)

One of the drawbacks of the validate_replace_* routines is that
they only do simple simplifications, mostly canonicalisations:

  /* Do changes needed to keep rtx consistent.  Don't do any other
     simplifications, as it is not our job.  */
  if (simplify)
    simplify_while_replacing (loc, to, object, op0_mode);

But substituting can often lead to real simplification opportunities.
simplify-rtx.c:simplify_replace_rtx does fully simplify the result,
but it only operates on specific rvalues rather than full instruction
patterns.  It is also nondestructive, which means that it returns a
new rtx whenever a substitution or simplification was possible.
This can create quite a bit of garbage rtl in the context of a
speculative recog, where changing the contents of a pointer is
often enough.

The new routines are therefore supposed to provide simplify_replace_rtx-
style substitution in recog.  They go to some effort to prevent garbage
rtl from being created.

At the moment, the new routines fail if the pattern would still refer
to the old "from" value in some way.  That might be unnecessary in
some contexts; if so, it could be put behind a configuration parameter.

gcc/
	* recog.h (insn_propagation): New class.
	* recog.c (insn_propagation::apply_to_mem_1): New function.
	(insn_propagation::apply_to_rvalue_1): Likewise.
	(insn_propagation::apply_to_lvalue_1): Likewise.
	(insn_propagation::apply_to_pattern_1): Likewise.
	(insn_propagation::apply_to_pattern): Likewise.
	(insn_propagation::apply_to_rvalue): Likewise.
2020-12-17 00:15:07 +00:00
Richard Sandiford
eb74135dd3 recog: Add a way of temporarily undoing changes
In some cases, it can be convenient to roll back the changes that
have been made by validate_change to see how things looked before,
then reroll the changes.  For example, this makes it possible
to defer calculating the cost of an instruction until we know that
the result is actually needed.  It can also make dumps easier to read.

This patch adds a couple of helper functions for doing that.

gcc/
	* recog.h (temporarily_undo_changes, redo_changes): Declare.
	* recog.c (temporarily_undone_changes): New variable.
	(validate_change_1, confirm_change_group): Check that it's zero.
	(cancel_changes): Likewise.
	(swap_change, temporarily_undo_changes): New functions.
	(redo_changes): Likewise.
2020-12-17 00:15:07 +00:00
Richard Sandiford
6059a3dd08 recog: Add a validate_change_xveclen function
A later patch wants to be able to use the validate_change machinery
to reduce the XVECLEN of a PARALLEL.  This should be more efficient
than allocating a separate PARALLEL at a possibly distant memory
location, especially since the new PARALLEL would be garbage rtl if
the new pattern turns out not to match.  Combine already pulls this
trick with SUBST_INT.

This patch adds a general helper for doing that.

gcc/
	* recog.h (validate_change_xveclen): Declare.
	* recog.c (change_t::old_len): New field.
	(validate_change_1): Add a new_len parameter.  Conditionally
	replace the XVECLEN of an rtx, avoiding single-element PARALLELs.
	(validate_change_xveclen): New function.
	(cancel_changes): Undo changes made by validate_change_xveclen.
2020-12-17 00:15:06 +00:00
Richard Sandiford
f48b51496d simplify-rtx: Put simplify routines into a class
One of the recurring warts of RTL is that multiplication by a power
of 2 is represented as a MULT inside a MEM but as an ASHIFT outside
a MEM.  It would obviously be better if we didn't have this kind of
context sensitivity, but it would be difficult to remove.

Currently the simplify-rtx.c routines are hard-coded for the
ASHIFT form.  This means that some callers have to convert the
ASHIFTs “back” into MULTs after calling the simplify-rtx.c
routines; see fwprop.c:canonicalize_address for an example.

I think we can relieve some of the pain by wrapping the simplify-rtx.c
routines in a simple class that tracks whether the expression occurs
in a MEM or not, so that no post-processing is needed.

An obvious concern is whether passing the “this” pointer around
will slow things down or bloat the code.  I can't measure any
increase in compile time after applying the patch.  Sizewise,
simplify-rtx.o text increases by 2.3% in default-checking builds
and 4.1% in release-checking builds.

I realise the MULT/ASHIFT thing isn't the most palatable
reason for doing this, but I think it might be useful for
other things in future, such as using local nonzero_bits
hooks/virtual functions instead of the global hooks.

The obvious alternative would be to add a static variable
and hope that it is always updated correctly.

Later patches make use of this.

gcc/
	* rtl.h (simplify_context): New class.
	(simplify_unary_operation, simplify_binary_operation): Use it.
	(simplify_ternary_operation, simplify_relational_operation): Likewise.
	(simplify_subreg, simplify_gen_unary, simplify_gen_binary): Likewise.
	(simplify_gen_ternary, simplify_gen_relational): Likewise.
	(simplify_gen_subreg, lowpart_subreg): Likewise.
	* simplify-rtx.c (simplify_gen_binary): Turn into a member function
	of simplify_context.
	(simplify_gen_unary, simplify_gen_ternary, simplify_gen_relational)
	(simplify_truncation, simplify_unary_operation): Likewise.
	(simplify_unary_operation_1, simplify_byte_swapping_operation)
	(simplify_associative_operation, simplify_logical_relational_operation)
	(simplify_binary_operation, simplify_binary_operation_series)
	(simplify_distributive_operation, simplify_plus_minus): Likewise.
	(simplify_relational_operation, simplify_relational_operation_1)
	(simplify_cond_clz_ctz, simplify_merge_mask): Likewise.
	(simplify_ternary_operation, simplify_subreg, simplify_gen_subreg)
	(lowpart_subreg): Likewise.
	(simplify_binary_operation_1): Likewise.  Test mem_depth when
	deciding whether the ASHIFT or MULT form is canonical.
	(simplify_merge_mask): Use simplify_context.
2020-12-17 00:15:05 +00:00
Richard Sandiford
b665081f57 recog: Split out a register_asm_p function
verify_changes has a test for whether a particular hard register
is a user-defined register asm.  A later patch needs to test the
same thing, so this patch splits it out into a helper.

gcc/
	* rtl.h (register_asm_p): Declare.
	* recog.c (verify_changes): Split out the test for whether
	a hard register is a register asm to...
	* rtlanal.c (register_asm_p): ...this new function.
2020-12-17 00:15:04 +00:00
Richard Sandiford
d6c9781e07 Export print-rtl.c:print_insn_with_notes
Later patches want to use print_insn_with_notes (printing to
a pretty_printer).  This patch exports it from print-rtl.c.

The non-notes version is already public.

gcc/
	* print-rtl.h (print_insn_with_notes): Declare.
	* print-rtl.c (print_insn_with_notes): Make non-static
2020-12-17 00:15:04 +00:00
Richard Sandiford
21335c4857 Split update_cfg_for_uncondjump out of combine
Later patches want to reuse combine's update_cfg_for_uncondjump,
so this patch makes it a public cfgrtl.c function.

gcc/
	* cfgrtl.h (update_cfg_for_uncondjump): Declare.
	* combine.c (update_cfg_for_uncondjump): Move to...
	* cfgrtl.c: ...here.
2020-12-17 00:15:03 +00:00
Richard Sandiford
d4b520d88e Add a cut-down version of std::span (array_slice)
A later patch wants to be able to pass around subarray views of an
existing array.  The standard class to do that is std::span, but it's
a C++20 thing.  This patch just adds a cut-down version of it.

The intention is just to provide what's currently needed.

gcc/
	* vec.h (array_slice): New class.
2020-12-17 00:15:02 +00:00
Richard Sandiford
9a0882ef6a Add an alternative splay tree implementation
We already have two splay tree implementations: the old C one in
libiberty and a templated reimplementation of it in typed-splay-tree.h.
However, they have some drawbacks:

- They hard-code the assumption that nodes should have both a key and
  a value, which isn't always true.

- They use the two-phase method of lookup, and so nodes need to store
  a temporary back pointer.  We can avoid that overhead by using the
  top-down method (as e.g. the bitmap tree code already does).

- The tree node has to own the key and the value.  For some use cases
  it's more convenient to embed the tree links in the value instead.

Also, a later patch wants to use splay trees to represent an
adaptive total order: the splay tree itself records whether node N1
is less than node N2, and (in the worst case) comparing nodes is
a splay operation.

This patch therefore adds an alternative implementation.  The main
features are:

- Nodes can optionally point back to their parents.

- An Accessors class abstracts accessing child nodes and (where
  applicable) parent nodes, so that the information can be embedded
  in larger data structures.

- There is no fixed comparison function at the class level.  Instead,
  individual functions that do comparisons take a comparison function
  argument.

- There are two styles of comparison function, optimised for different
  use cases.  (See the comments in the patch for details.)

- It's possible to do some operations directly on a given node,
  without knowing whether it's the root.  This includes the comparison
  use case described above.

This of course has its own set of drawbacks.  It's really providing
splay utility functions rather than a true ADT, and so is more low-level
than the existing routines.  It's mostly geared for cases in which the
client code wants to participate in the splay operations to some extent.

gcc/
	* Makefile.in (OBJS): Add splay-tree-utils.o.
	* system.h: Include <array> when INCLUDE_ARRAY is defined.
	* selftest.h (splay_tree_cc_tests): Declare.
	* selftest-run-tests.c (selftest::run_tests): Run splay_tree_cc_tests.
	* splay-tree-utils.h: New file.
	* splay-tree-utils.tcc: Likewise.
	* splay-tree-utils.cc: Likewise.
2020-12-17 00:15:01 +00:00
Richard Sandiford
ac62dce5e5 Add a class that multiplexes two pointer types
This patch adds a pointer_mux<T1, T2> class that provides similar
functionality to:

    union { T1 *a; T2 *b; };
    ...
    bool is_b_rather_than_a;

except that the is_b_rather_than_a tag is stored in the low bit
of the pointer.  See the comments in the patch for a comparison
between the two approaches and why this one can be more efficient.

I've tried to microoptimise the class a fair bit, since a later
patch uses it extensively in order to keep the sizes of data
structures down.

gcc/
	* mux-utils.h: New file.
2020-12-17 00:15:01 +00:00
Richard Sandiford
0dd4829643 Add an RAII class for managing obstacks
This patch adds an RAII class for managing the lifetimes of objects
on an obstack.  See the comments in the patch for more details and
example usage.

gcc/
	* obstack-utils.h: New file.
2020-12-17 00:15:00 +00:00
Richard Sandiford
4187be442f Add more iterator utilities
This patch adds some more iterator helper classes.  They really fall
into two groups, but there didn't seem much value in separating them:

- A later patch has a class hierarchy of the form:

     Base
      +- Derived1
      +- Derived2

  A class wants to store an array A1 of Derived1 pointers and an
  array A2 of Derived2 pointers.  However, for compactness reasons,
  it was convenient to have a single array of Base pointers,
  with A1 and A2 being slices of this array.  This reduces the
  overhead from two pointers and two ints (3 LP64 words) to one
  pointer and two ints (2 LP64 words).

  But consumers of the class shouldn't be aware of this: they should
  see A1 as containing Derived1 pointers rather than Base pointers
  and A2 as containing Derived2 pointers rather than Base pointers.
  This patch adds derived_iterator and const_derived_container
  classes to support this use case.

- A later patch also adds various linked lists.  This patch adds
  wrapper_iterator and list_iterator classes to make it easier
  to create iterators for these linked lists.  For example:

    // Iterators for lists of definitions.
    using def_iterator = list_iterator<def_info, &def_info::next_def>;
    using reverse_def_iterator
      = list_iterator<def_info, &def_info::prev_def>;

  This in turn makes it possible to use range-based for loops
  on the lists.

The patch just adds the things that the later patches need; it doesn't
try to make the classes as functionally complete as possible.  I think
we should add extra functionality when needed rather than ahead of time.

gcc/
	* iterator-utils.h (derived_iterator): New class.
	(const_derived_container, wrapper_iterator): Likewise.
	(list_iterator): Likewise.
2020-12-17 00:14:59 +00:00
Richard Sandiford
900846cda6 reginfo: Add a global_reg_set
A later patch wants to use the set of global registers as a HARD_REG_SET
rather than a bool/char array.  Most other arrays already have a
HARD_REG_SET counterpart, but this one didn't.

gcc/
	* hard-reg-set.h (global_reg_set): Declare.
	* reginfo.c (global_reg_set): New variable.
	(init_reg_sets_1, globalize_reg): Update it when globalizing
	registers.
2020-12-17 00:14:58 +00:00
Jonathan Wakely
7c1e7eed89 libstdc++: Add C++ runtime support for new 128-bit long double format
This adds support for the new __ieee128 long double format on
powerpc64le targets.

Most of the complexity comes from wanting a single libstdc++.so library
that contains the symbols needed by code compiled with both
-mabi=ibmlongdouble and -mabi=ieeelongdouble (and not forgetting
-mlong-double-64 as well!)

In a few places this just requires an extra overload, for example
std::from_chars has to be overloaded for both forms of long double.
That can be done in a single translation unit that defines overloads
for 'long double' and also '__ieee128', so that user code including
<charconv> will be able to link to a definition for either type of long
double. Those are the easy cases.

The difficult parts are (as for the std::string ABI transition) the I/O
and locale facets. In order to be able to write either form of long
double to an ostream such as std::cout we need the locale to contain a
std::num_put facet that can handle both forms. The same approach is
taken as was already done for supporting 64-bit long double and 128-bit
long double: adding extra overloads of do_put to the facet class. On
targets where the new long double code is enabled, the facets that are
registered in the locale at program startup have additional overloads so
that they can work with any long double type. Where this fails to work
is if user code installs its own facet, which will probably not have the
additional overloads and so will only be able to output one or the other
type. In practice the number of users expecting to be able to use their
own locale facets in code using a mix of -mabi=ibmlongdouble and
-mabi=ieeelongdouble is probably close to zero.

libstdc++-v3/ChangeLog:

	* Makefile.in: Regenerate.
	* config.h.in: Regenerate.
	* config/abi/pre/gnu.ver: Make patterns less greedy.
	* config/os/gnu-linux/ldbl-ieee128-extra.ver: New file with patterns
	for IEEE128 long double symbols.
	* configure: Regenerate.
	* configure.ac: Enable alternative 128-bit long double format on
	powerpc64*-*-linux*.
	* doc/Makefile.in: Regenerate.
	* fragment.am: Regenerate.
	* include/Makefile.am: Set _GLIBCXX_LONG_DOUBLE_ALT128_COMPAT.
	* include/Makefile.in: Regenerate.
	* include/bits/c++config: Define inline namespace for new long
	double symbols. Don't define _GLIBCXX_USE_FLOAT128 when it's the
	same type as long double.
	* include/bits/locale_classes.h [_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT]
	(locale::_Impl::_M_init_extra_ldbl128): Declare new member function.
	* include/bits/locale_facets.h (_GLIBCXX_NUM_FACETS): Simplify by
	only counting narrow character facets.
	(_GLIBCXX_NUM_CXX11_FACETS): Likewise.
	(_GLIBCXX_NUM_LBDL_ALT128_FACETS): New.
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT] (num_get::__do_get): Define
	vtable placeholder for __ibm128 long double type.
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT && __LONG_DOUBLE_IEEE128__]
	(num_get::__do_get): Declare vtable placeholder for __ibm128 long
	double type.
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT && __LONG_DOUBLE_IEEE128__]
	(num_put::__do_put): Likewise.
	* include/bits/locale_facets.tcc
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT && __LONG_DOUBLE_IEEE128__]
	(num_get::__do_get, num_put::__do_put): Define.
	* include/bits/locale_facets_nonio.h
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT && __LONG_DOUBLE_IEEE128__]
	(money_get::__do_get): Declare vtable placeholder for __ibm128 long
	double type.
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT && __LONG_DOUBLE_IEEE128__]
	(money_put::__do_put): Likewise.
	* include/bits/locale_facets_nonio.tcc
	[_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT && __LONG_DOUBLE_IEEE128__]
	(money_get::__do_get, money_put::__do_put): Define.
	* include/ext/numeric_traits.h [_GLIBCXX_LONG_DOUBLE_ALT128_COMPAT]
	(__numeric_traits<__ibm128>, __numeric_traits<__ieee128>): Define.
	* libsupc++/Makefile.in: Regenerate.
	* po/Makefile.in: Regenerate.
	* python/Makefile.in: Regenerate.
	* src/Makefile.am: Add compatibility-ldbl-alt128.cc and
	compatibility-ldbl-alt128-cxx11.cc sources and recipes for objects.
	* src/Makefile.in: Regenerate.
	* src/c++11/Makefile.in: Regenerate.
	* src/c++11/compatibility-ldbl-alt128-cxx11.cc: New file defining
	symbols using the old 128-bit long double format, for the cxx11 ABI.
	* src/c++11/compatibility-ldbl-alt128.cc: Likewise, for the
	gcc4-compatible ABI.
	* src/c++11/compatibility-ldbl-facets-aliases.h: New header for long
	double compat aliases.
	* src/c++11/cow-locale_init.cc: Add comment.
	* src/c++11/cxx11-locale-inst.cc: Define C and C_is_char
	unconditionally.
	* src/c++11/cxx11-wlocale-inst.cc: Add sanity check. Include
	locale-inst.cc directly, not via cxx11-locale-inst.cc.
	* src/c++11/locale-inst-monetary.h: New header for monetary
	category instantiations.
	* src/c++11/locale-inst-numeric.h: New header for numeric category
	instantiations.
	* src/c++11/locale-inst.cc: Include new headers for monetary,
	numeric, and long double definitions.
	* src/c++11/wlocale-inst.cc: Remove long double compat aliases that
	are defined in new header now.
	* src/c++17/Makefile.am: Use -mabi=ibmlongdouble for
	floating_from_chars.cc.
	* src/c++17/Makefile.in: Regenerate.
	* src/c++17/floating_from_chars.cc (from_chars_impl): Add
	if-constexpr branch for __ieee128.
	(from_chars): Overload for __ieee128.
	* src/c++20/Makefile.in: Regenerate.
	* src/c++98/Makefile.in: Regenerate.
	* src/c++98/locale_init.cc (num_facets): Adjust calculation.
	(locale::_Impl::_Impl(size_t)): Call _M_init_extra_ldbl128.
	* src/c++98/localename.cc (num_facets): Adjust calculation.
	(locale::_Impl::_Impl(const char*, size_t)): Call
	_M_init_extra_ldbl128.
	* src/filesystem/Makefile.in: Regenerate.
	* testsuite/Makefile.in: Regenerate.
	* testsuite/util/testsuite_abi.cc: Add new symbol versions.
	Allow new symbols to be added to GLIBCXX_IEEE128_3.4.29 and
	CXXABI_IEEE128_1.3.13 too.
	* testsuite/26_numerics/complex/abi_tag.cc: Add u9__ieee128 to
	regex matching expected symbols.
2020-12-16 23:25:01 +00:00
Jakub Jelinek
f4ae1f2c43 maintainer-scripts: Use /sourceware/snapshot-tmp/gcc as temp directory if possible
> https://gcc.gnu.org/pipermail/gccadmin/2020q4/017037.html
>
> OSError: [Errno 28] No space left on device:
> '/tmp/tmp.Zq3p6D4MxS/gcc/.git/objects/objn31xpefh' ->
> '/tmp/tmp.Zq3p6D4MxS/gcc/.git/objects/db/ffb02a4bcdd4ec04af3db75d86b8cc2e52bdff'
>
> Maybe change the script to use /sourceware/snapshot-tmp/gcc (which has
> rather more space) instead of /tmp?

This patch implements that.

2020-12-17  Jakub Jelinek  <jakub@redhat.com>

	* update_version_git: Put BASEDIR into /sourceware/snapshot-tmp/gcc
	if it exist.
2020-12-17 00:15:23 +01:00
Piotr Kubaj
2a4183234a rs6000: Add support for powerpc64le-unknown-freebsd
This implements support for powerpc64le architecture on FreeBSD.  Since
we don't have powerpcle (32-bit), I did not add support for powerpcle
here. This remains to be changed if there is powerpcle support in the
future.

2020-12-15  Piotr Kubaj  <pkubaj@FreeBSD.org>

gcc/
	* config.gcc (powerpc*le-*-freebsd*): Add.
	* configure.ac (powerpc*le-*-freebsd*): Ditto.
	* configure: Regenerate.
	* config/rs6000/freebsd64.h (ASM_SPEC_COMMON): Use ENDIAN_SELECT.
	(DEFAULT_ASM_ENDIAN): Add little endian support.
	(LINK_OS_FREEBSD_SPEC64): Ditto.
2020-12-16 22:54:51 +00:00
Ian Lance Taylor
e38c912700 test: add new Go tests from source repo 2020-12-16 14:53:31 -08:00
Martin Uecker
58a45ce44a C: Drop qualifiers of assignment expressions. [PR98047]
ISO C17 6.5.15.1 specifies that the result is the
type the LHS would have after lvalue conversion.

2020-12-16  Martin Uecker  <muecker@gwdg.de>

gcc/c/
	PR c/98047
	* c-typeck.c (build_modify_expr): Drop qualifiers.

gcc/testsuite/
	PR c/98047
	* gcc.dg/qual-assign-7.c: New test.
2020-12-16 23:51:25 +01:00
Martin Uecker
ec13758ed4 C: Avoid incorrect warning for volatile in compound expressions [PR98260]
2020-12-16  Martin Uecker  <muecker@gwdg.de>

gcc/c/
	PR c/98260
	* c-parser.c (c_parser_expression): Look into
	nop expression when marking expressions as read.

gcc/testsuite/
	PR c/98260
	* gcc.dg/unused-9.c: New test.
2020-12-16 23:43:42 +01:00
Takayuki 'January June' Suwa
64a54505ec gcc: xtensa: rearrange DI mode constant loading
2020-12-16  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>
gcc/
	* config/xtensa/xtensa.c (xtensa_emit_move_sequence): Try to
	replace 'l32r' with 'movi' + 'slli' when optimizing for size.
	* config/xtensa/xtensa.md (movdi): Split loading DI mode constant
	into register pair into two loads of SI mode constants.
2020-12-16 13:09:02 -08:00
Tamar Christina
db253e8b1d Arm: MVE: Split refactoring of remaining complex instrinsics
This refactors the complex numbers bits of MVE to go through the same unspecs
as the NEON variant.

This is pre-work to allow code to be shared between NEON and MVE for the complex
vectorization patches.

gcc/ChangeLog:

	* config/arm/arm_mve.h (__arm_vcmulq_rot90_f16):
	(__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, __arm_vcmulq_f16,
	__arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32,
	__arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16,
	__arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16,
	__arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, __arm_vcmlaq_rot180_f32,
	__arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin calls.
	* config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f,
	vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f,
	vcmlaq_rot180_f, vcmlaq_rot270_f): Removed.
	(vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq,
	vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New.
	* config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, UNSPEC_VCMLA90,
	UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, UNSPEC_VCMUL90,
	UNSPEC_VCMUL180, UNSPEC_VCMUL270.
	(VCMUL): New.
	* config/arm/mve.md (mve_vcmulq_f<mode, mve_vcmulq_rot180_f<mode>,
	mve_vcmulq_rot270_f<mode>, mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>,
	mve_vcmlaq_rot180_f<mode>, mve_vcmlaq_rot270_f<mode>,
	mve_vcmlaq_rot90_f<mode>): Removed.
	(mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>,
	mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>):
	New.
	* config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270, UNSPEC_VCMUL,
	UNSPEC_VCMUL180): New.
	(VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F,
	VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F): Removed.
2020-12-16 20:45:52 +00:00
Tamar Christina
9732dc855e Arm: Add NEON and MVE RTL patterns for Complex Addition.
This adds implementation for the optabs for complex additions.  With this the
following C code:

  void f90 (float complex a[restrict N], float complex b[restrict N],
	    float complex c[restrict N])
  {
    for (int i=0; i < N; i++)
      c[i] = a[i] + (b[i] * I);
  }

generates

  f90:
	  add     r3, r2, #1600
  .L2:
	  vld1.32 {q8}, [r0]!
	  vld1.32 {q9}, [r1]!
	  vcadd.f32       q8, q8, q9, #90
	  vst1.32 {q8}, [r2]!
	  cmp     r3, r2
	  bne     .L2
	  bx      lr

instead of

  f90:
	  add     r3, r2, #1600
  .L2:
	  vld2.32 {d24-d27}, [r0]!
	  vld2.32 {d20-d23}, [r1]!
	  vsub.f32	q8, q12, q11
	  vadd.f32	q9, q13, q10
	  vst2.32 {d16-d19}, [r2]!
	  cmp     r3, r2
	  bne     .L2
	  bx      lr

gcc/ChangeLog:

	* config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8,
	__arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8,
	__arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16,
	__arm_vcaddq_rot90_s16, __arm_vcaddq_rot270_s16,
	__arm_vcaddq_rot90_u32, __arm_vcaddq_rot270_u32,
	__arm_vcaddq_rot90_s32, __arm_vcaddq_rot270_s32,
	__arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16,
	__arm_vcaddq_rot90_f32, __arm_vcaddq_rot270_f32):  Update builtin calls.
	* config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u,
	vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f):
	Removed.
	(vcaddq_rot90, vcaddq_rot270): New.
	* config/arm/constraints.md (Dz): Include MVE.
	* config/arm/iterators.md (mve_rot): New.
	(supf): Remove VCADDQ_ROT270_S, VCADDQ_ROT270_U, VCADDQ_ROT90_S,
	VCADDQ_ROT90_U.
	(VCADDQ_ROT270, VCADDQ_ROT90): Removed.
	* config/arm/mve.md (mve_vcaddq_rot270_<supf><mode,
	mve_vcaddq_rot90_<supf><mode>, mve_vcaddq_rot270_f<mode>,
	mve_vcaddq_rot90_f<mode>): Removed.
	(mve_vcaddq<mve_rot><mode>, mve_vcaddq<mve_rot><mode>): New.
	* config/arm/unspecs.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S,
	VCADDQ_ROT270_U, VCADDQ_ROT90_U, VCADDQ_ROT270_F,
	VCADDQ_ROT90_F): Removed.
	* config/arm/vec-common.md (cadd<rot><mode>3): New.
2020-12-16 20:44:57 +00:00
Tamar Christina
84747acf8d AArch64: Add NEON, SVE and SVE2 RTL patterns for Complex Addition.
This adds implementation for the optabs for add complex operations.  With this
the following C code:

  void f90 (float complex a[restrict N], float complex b[restrict N],
	    float complex c[restrict N])
  {
    for (int i=0; i < N; i++)
      c[i] = a[i] + (b[i] * I);
  }

generates

  f90:
	  mov     x3, 0
	  .p2align 3,,7
  .L2:
	  ldr     q0, [x0, x3]
	  ldr     q1, [x1, x3]
	  fcadd   v0.4s, v0.4s, v1.4s, #90
	  str     q0, [x2, x3]
	  add     x3, x3, 16
	  cmp     x3, 1600
	  bne     .L2
	  ret

instead of

  f90:
	  add     x3, x1, 1600
	  .p2align 3,,7
  .L2:
	  ld2     {v4.4s - v5.4s}, [x0], 32
	  ld2     {v2.4s - v3.4s}, [x1], 32
	  fsub    v0.4s, v4.4s, v3.4s
	  fadd    v1.4s, v5.4s, v2.4s
	  st2     {v0.4s - v1.4s}, [x2], 32
	  cmp     x3, x1
	  bne     .L2
	  ret

gcc/ChangeLog:

	* config/aarch64/aarch64-simd.md (cadd<rot><mode>3): New.
	* config/aarch64/iterators.md (SVE2_INT_CADD_OP): New.
	* config/aarch64/aarch64-sve.md (cadd<rot><mode>3): New.
	* config/aarch64/aarch64-sve2.md (cadd<rot><mode>3): New.
2020-12-16 20:43:54 +00:00
David Edelsohn
cdb1c27656 testsuite: Adjust expected instruction count for PPC fold testcases.
commit r11-5958 changed the code generation for the vector logical fold
tests.  This patch updates the expected instruction counts for different
instructions.

gcc/testsuite/ChangeLog:

2020-12-16  David Edelsohn  <dje.gcc@gmail.com>

	PR target/98280
	* gcc.target/powerpc/fold-vec-logical-ors-char.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-ors-int.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-ors-short.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-char.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-int.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-longlong.c: Adjust count.
	* gcc.target/powerpc/fold-vec-logical-other-short.c: Adjust count.
2020-12-16 15:22:04 -05:00
Nathan Sidwell
b7b6879f0b c++: Another solaris header use [PR 98315]
Rather than early-include sys/socket.h, let's allow the includer to
tell cody no networking.

	libcody/
	* cody.hh: Allow user to set CODY_NETWORKING.
	gcc/cp/
	* mapper-resolver.cc: Remove early include of
	sys/socket.h.  Specify no CODY_NETWORKING instead.
	* module.cc: Specify no CODY_NETWORKING.
2020-12-16 11:57:31 -08:00
Nathan Sidwell
8d8bb85b48 c++: Fix template parm ICE [PR 98297]
I think this is nonsense code, we seem to be naming an instantiation
of a template template parm.  But this fixes the ICE.  Perhaps we
should diagnose the issue earlier?

	gcc/cp/
	* parser.c (cp_parser_elaborated_type_specifier): Test
	BOUND_TEMPLATE_TEMPLATE_PARM before checking for instantiation.
	gcc/testsuite/
	* g++.dg/template/pr98297.C: New.
2020-12-16 11:57:31 -08:00
Nathan Sidwell
3f78c8cb7f c++tools: fix install-strip [PR 98328]
I'd missed an install-strip rule in c++tools.  Here it is, cribbed
from gcc/ subdir.

	c++tools/
	* Makefile.in (INSTALL): Replace with ...
	(INSTALL_PROGRAM): ... this.
	(INSTALL_STRIP_PROGRAM): New.
	(install-strip): New target.
	(install): Use INSTALL_PROGRAM.
	* configure.ac: Add INSTALL_PROGRAM.
	* configure: Regenerated.
2020-12-16 11:57:31 -08:00
Jonathan Wakely
4d4f82959a libstdc++: Simplify built-in detection in <utility>
Now that GCC supports __has_builtin there is no need to test whether
it's defined, we can just use it unconditionally.

libstdc++-v3/ChangeLog:

	* include/std/utility: Use __has_builtin without checking if
	it's defined.
2020-12-16 19:25:09 +00:00
Jonathan Wakely
767537a8b0 libstdc++: Warn if __STRICT_ANSI has been undefined
Recent changes to use __int128 as an integer-like type in <ranges> and
to optimize std::uniform_int_distribution mean that the library relies
on __int128 more heavily than in the past.

The library expects that if __int128 is supported then either
__GLIBCXX_TYPE_INT_N_0 is defined (and we treat is like the standard
integer types), or __STRICT_ANSI__ is defined (and we need to add
special handling for __int128 as a non-standard integer type).

If users compile with -std=c++NN -U__STRICT_ANSI__ then it puts the
library into a broken and inconsistent state, where the compiler doesn't
define the __GLIBCXX_TYPE_INT_N_0 macro, but the library thinks it
doesn't need special handling for __int128. What the user should do is
compile with -std=gnu++NN instead.

This adds a warning if it appears that __int128 is supported but neither
__GLIBCXX_TYPE_INT_N_0 nor __STRICT_ANSI__ is defined.

libstdc++-v3/ChangeLog:

	* include/bits/c++config: Warn if __STRICT_ANSI__ state is
	inconsistent with __GLIBCXX_TYPE_INT_N_0.
2020-12-16 19:25:09 +00:00
Pat Haugen
e128aaa6e5 Fix instruction length for MMA insns.
Prefixed instructions should not have their length explicitly set to '8'. The function get_attr_length() will adjust the length appropriately based on the value of the "prefixed" attribute.

2020-12-16  Pat Haugen  <pthaugen@linux.ibm.com>

gcc/
	* config/rs6000/mma.md (*movxo, mma_<vvi4i4i8>, mma_<avvi4i4i8>,
	mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>,
	mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>):
	Remove explicit setting of length attribute.
2020-12-16 12:50:35 -06:00
Nathan Sidwell
8379916b16 c++: Fix offsetof use [PR 98232]
offsetof is underspecified.  GCC happened to accept an unneeded
explicit scoping, clang does not.

	gcc/cp/
	* module.cc (dumper::push): Clangify offsetof use.
2020-12-16 09:44:38 -08:00
Nathan Sidwell
269e82d49e C++: Fix solaris header use (mk 2)
There is another path to get to a poisoned bcopy.  Fixed thusly.

	gcc/cp/
	* mapper-resolver.cc: #include sys/socket before system.h
	due to poisoned bcopy use.
2020-12-16 09:41:05 -08:00
Jakub Jelinek
652702b0c9 libcody: fix --enable-checking=... follow-up [PR98311]
> The -enable-checking configure code in libcody didn't play well with
> us.  This just uses libcpp's configurey for that piece.

This doesn't set is_release anywhere, which means when --enable-checking*
or --disable-checking isn't specified, it always treats it as
--enable-checking=yes, while the normal gcc behavior is treat only trunk
as --enable-checking=yes and treat release branches as
--enable-checking=release by default.

On the other side, nothing uses those ac_assert_checking and
ac_valgrind_checking variables, so it is a waste to compute those.

2020-12-16  Jakub Jelinek  <jakub@redhat.com>

	* configure.ac: Compute is_release.
	(NMS_ENABLE_CHECKING): Simplify but not computing ac_assert_checking
	and ac_valgrind_checking the code doesn't use.
	* configure: Regenerated.
2020-12-16 18:21:32 +01:00
Harald Anlauf
5098d35fb1 PR fortran/98284 - ICE in get_array_index
Reject DATA elements with the ALLOCATABLE attribute also when they are
components of a derived type.

gcc/fortran/ChangeLog:

	PR fortran/98284
	* resolve.c (check_data_variable): Reject DATA elements with the
	ALLOCATABLE attribute.

gcc/testsuite/ChangeLog:

	PR fortran/98284
	* gfortran.dg/pr98284.f90: New test.
2020-12-16 17:25:06 +01:00
Jakub Jelinek
134afa38f0 varasm: Fix up __patchable_function_entries handling
The SECTION_LINK_ORDER changes don't seem to work properly.

If I compile:
static inline __attribute__((__gnu_inline__)) __attribute__((__unused__)) __attribute__((patchable_function_entry(0, 0))) int foo (int x)
{
  return x + 1;
}

static inline __attribute__((__gnu_inline__)) __attribute__((__unused__)) __attribute__((patchable_function_entry(0, 0))) int bar (int x)
{
  return x + 2;
}

int
baz (int x)
{
  return foo (x) + 1;
}

int
qux (int x)
{
  return bar (x) + 2;
}
(distilled from aarch64 Linux kernel) with
-O2 -fpatchable-function-entry=2 on aarch64 compiler configured against
latest binutils, I get:
...
	.section	__patchable_function_entries,"awo",@progbits,baz
...
	.section	__patchable_function_entries
...
in the assembly, but when it is assembled, one gets:
  [ 4] __patchable_function_entries PROGBITS        0000000000000000 000060 000008 00 WAL  1   0  8
  [ 5] .rela__patchable_function_entries RELA            0000000000000000 000280 000018 18   I 12   4  8
  [ 6] __patchable_function_entries PROGBITS        0000000000000000 000068 000008 00      0   0  8
  [ 7] .rela__patchable_function_entries RELA            0000000000000000 000298 000018 18   I 12   6  8
i.e. one writable allocated section with SHF_LINK_ORDER and another
non-allocated non-writable without link order.  In the kernel case there is
always one entry in the WAL section and then dozens or more in the
non-allocated one.
The kernel then fails to link:
WARNING: modpost: vmlinux.o (__patchable_function_entries): unexpected non-allocatable section.
Did you forget to use "ax"/"aw" in a .S file?
Note that for example <linux/init.h> contains
section definitions for use in .S files.
ld: .init.data has both ordered [`__patchable_function_entries' in init/main.o] and unordered [`.init.data' in
+./drivers/firmware/efi/libstub/vsprintf.stub.o] sections
ld: final link failed: bad value
make: *** [Makefile:1175: vmlinux] Error 1

The following patch fixes it by always forcing full section flags for
SECTION_LINK_ORDER sections.

2020-12-16  Jakub Jelinek  <jakub@redhat.com>

	* varasm.c (default_elf_asm_named_section): Always force
	section flags even for sections with SECTION_LINK_ORDER flag.
2020-12-16 16:15:35 +01:00
Jonathan Wakely
4e42f6ebf4 libcody: Fix build for older GCC versions
Before CWG DR 1955 the controlling expression for an #elif must be
syntactically correct, meaning this won't compile with C++11 compilers
such as gcc 4.8:

The solution is to define __has_include(X) as 0 for compilers that don't
support it.

The second problem is that when <source_location> is found, it is used
without the std:: qualification.

libcody/ChangeLog:

	* internal.hh: Define fallback macros for __has_builtin and
	__has_include. Use __has_builtin for __builtin_FILE and
	__builtin_LINE. Define alias for std::source_location.
2020-12-16 14:33:26 +00:00
Jonathan Wakely
96d9670e88 libstdc++: Only use __builtin_sprintf if supported [PR 96083]
Clang doesn't support __builtin_sprintf, so use std::sprintf instead.

libstdc++-v3/ChangeLog:

	PR libstdc++/96083
	* include/ext/throw_allocator.h: Use __has_builtin to check for
	__builtin_sprintf support, and use std::sprtinf if necessary.
2020-12-16 14:33:26 +00:00