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AArch64: Remove special handling of generic cpu.
In anticipation of adding new generic turning values this removes the hardcoding of the "generic" CPU and instead just specifies it as a normal CPU. No change in behavior is expected. gcc/ChangeLog: PR target/111370 * config/aarch64/aarch64-cores.def: Add generic. * config/aarch64/aarch64-opts.h (enum aarch64_proc): Remove generic. * config/aarch64/aarch64-tune.md: Regenerate * config/aarch64/aarch64.cc (all_cores): Remove generic * config/aarch64/aarch64.h (enum target_cpus): Remove TARGET_CPU_generic.
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@ -189,4 +189,7 @@ AARCH64_CORE("neoverse-n2", neoversen2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPER
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AARCH64_CORE("neoverse-v2", neoversev2, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
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AARCH64_CORE("demeter", demeter, cortexa57, V9A, (I8MM, BF16, SVE2_BITPERM, RNG, MEMTAG, PROFILE), neoversev2, 0x41, 0xd4f, -1)
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/* Generic Architecture Processors. */
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AARCH64_CORE("generic", generic, cortexa53, V8A, (), generic, 0x0, 0x0, -1)
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#undef AARCH64_CORE
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@ -32,8 +32,6 @@ enum aarch64_processor
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#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
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INTERNAL_IDENT,
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#include "aarch64-cores.def"
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/* Used to indicate that no processor has been specified. */
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generic,
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/* Used to mark the end of the processor table. */
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aarch64_none
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};
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@ -1,5 +1,5 @@
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;; -*- buffer-read-only: t -*-
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;; Generated automatically by gentune.sh from aarch64-cores.def
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(define_attr "tune"
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"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexx2,cortexx3,cortexx4,neoversen2,neoversev2,demeter"
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"cortexa34,cortexa35,cortexa53,cortexa57,cortexa72,cortexa73,thunderx,thunderxt88p1,thunderxt88,octeontx,octeontxt81,octeontxt83,thunderxt81,thunderxt83,ampere1,ampere1a,emag,xgene1,falkor,qdf24xx,exynosm1,phecda,thunderx2t99p1,vulcan,thunderx2t99,cortexa55,cortexa75,cortexa76,cortexa76ae,cortexa77,cortexa78,cortexa78ae,cortexa78c,cortexa65,cortexa65ae,cortexx1,cortexx1c,neoversen1,ares,neoversee1,octeontx2,octeontx2t98,octeontx2t96,octeontx2t93,octeontx2f95,octeontx2f95n,octeontx2f95mm,a64fx,tsv110,thunderx3t110,neoversev1,zeus,neoverse512tvb,saphira,cortexa57cortexa53,cortexa72cortexa53,cortexa73cortexa35,cortexa73cortexa53,cortexa75cortexa55,cortexa76cortexa55,cortexr82,cortexa510,cortexa520,cortexa710,cortexa715,cortexa720,cortexx2,cortexx3,cortexx4,neoversen2,neoversev2,demeter,generic"
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(const (symbol_ref "((enum attr_tune) aarch64_tune)")))
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@ -427,8 +427,6 @@ static const struct processor all_cores[] =
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{NAME, IDENT, SCHED, AARCH64_ARCH_##ARCH, \
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feature_deps::cpu_##IDENT, &COSTS##_tunings},
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#include "aarch64-cores.def"
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{"generic", generic, cortexa53, AARCH64_ARCH_V8A,
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feature_deps::V8A ().enable, &generic_tunings},
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{NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, NULL}
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};
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@ -720,7 +720,6 @@ enum target_cpus
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#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART, VARIANT) \
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TARGET_CPU_##INTERNAL_IDENT,
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#include "aarch64-cores.def"
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TARGET_CPU_generic
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};
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/* If there is no CPU defined at configure, use generic as default. */
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