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RISC-V: Enforce Libatomic LR/SC SEQ_CST

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Replace LR.aq/SC.rl pairs with the SEQ_CST LR.aqrl/SC.rl pairs
recommended by table A.6 of the ISA manual.

2023-04-27 Patrick O'Neill <patrick@rivosinc.com>

libgcc/ChangeLog:

	* config/riscv/atomic.c: Change LR.aq/SC.rl pairs into
	sequentially consistent LR.aqrl/SC.rl pairs.

Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
This commit is contained in:
Patrick O'Neill 2023-04-05 09:44:57 -07:00
parent f37a36bce8
commit dcd7b2f5f7
1 changed files with 2 additions and 2 deletions
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4
libgcc/config/riscv/atomic.c
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@ -41,7 +41,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
unsigned old, tmp1, tmp2; \
\
asm volatile ("1:\n\t" \
"lr.w.aq %[old], %[mem]\n\t" \
"lr.w.aqrl %[old], %[mem]\n\t" \
#insn " %[tmp1], %[old], %[value]\n\t" \
invert \
"and %[tmp1], %[tmp1], %[mask]\n\t" \
@ -75,7 +75,7 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
unsigned old, tmp1; \
\
asm volatile ("1:\n\t" \
"lr.w.aq %[old], %[mem]\n\t" \
"lr.w.aqrl %[old], %[mem]\n\t" \
"and %[tmp1], %[old], %[mask]\n\t" \
"bne %[tmp1], %[o], 1f\n\t" \
"and %[tmp1], %[old], %[not_mask]\n\t" \