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s390.md (UNSPEC_SRST): New constant.
* config/s390/s390.md (UNSPEC_SRST): New constant. ("strlendi", "strlensi"): New expanders. ("*strlendi", "*strlensi"): New insns. Co-Authored-By: Mark Dettinger <dettinge@de.ibm.com> From-SVN: r74794
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2003-12-18 Ulrich Weigand <uweigand@de.ibm.com>
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Mark Dettinger <dettinge@de.ibm.com>
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* config/s390/s390.md (UNSPEC_SRST): New constant.
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("strlendi", "strlensi"): New expanders.
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("*strlendi", "*strlensi"): New insns.
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2003-12-18 Mark Mitchell <mark@codesourcery.com>
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2003-12-18 Mark Mitchell <mark@codesourcery.com>
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* config/sol2.h (LINK_ARCH32_SPEC): Define in terms of ...
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* config/sol2.h (LINK_ARCH32_SPEC): Define in terms of ...
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@ -104,6 +104,9 @@
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(UNSPEC_TP 510)
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(UNSPEC_TP 510)
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(UNSPEC_TLSLDM_NTPOFF 511)
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(UNSPEC_TLSLDM_NTPOFF 511)
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(UNSPEC_TLS_LOAD 512)
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(UNSPEC_TLS_LOAD 512)
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; String Functions
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(UNSPEC_SRST 600)
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])
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])
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;;
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;;
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@ -1733,6 +1736,82 @@
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;; String instructions.
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;; String instructions.
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;;
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;;
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;
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; strlenM instruction pattern(s).
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;
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(define_expand "strlendi"
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[(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
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(parallel
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[(set (match_dup 4)
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(unspec:DI [(const_int 0)
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(match_operand:BLK 1 "memory_operand" "")
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(reg:QI 0)
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(match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
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(clobber (scratch:DI))
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(clobber (reg:CC 33))])
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(parallel
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[(set (match_operand:DI 0 "register_operand" "")
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(minus:DI (match_dup 4) (match_dup 5)))
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(clobber (reg:CC 33))])]
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"TARGET_64BIT"
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{
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operands[4] = gen_reg_rtx (DImode);
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operands[5] = gen_reg_rtx (DImode);
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emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
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operands[1] = replace_equiv_address (operands[1], operands[5]);
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})
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(define_insn "*strlendi"
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[(set (match_operand:DI 0 "register_operand" "=a")
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(unspec:DI [(match_operand:DI 2 "general_operand" "0")
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(mem:BLK (match_operand:DI 3 "register_operand" "1"))
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(reg:QI 0)
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(match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
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(clobber (match_scratch:DI 1 "=a"))
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(clobber (reg:CC 33))]
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"TARGET_64BIT"
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"srst\t%0,%1\;jo\t.-4"
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[(set_attr "op_type" "NN")
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(set_attr "type" "vs")
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(set_attr "length" "8")])
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(define_expand "strlensi"
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[(set (reg:QI 0) (match_operand:QI 2 "immediate_operand" ""))
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(parallel
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[(set (match_dup 4)
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(unspec:SI [(const_int 0)
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(match_operand:BLK 1 "memory_operand" "")
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(reg:QI 0)
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(match_operand 3 "immediate_operand" "")] UNSPEC_SRST))
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(clobber (scratch:SI))
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(clobber (reg:CC 33))])
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(parallel
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[(set (match_operand:SI 0 "register_operand" "")
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(minus:SI (match_dup 4) (match_dup 5)))
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(clobber (reg:CC 33))])]
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"!TARGET_64BIT"
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{
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operands[4] = gen_reg_rtx (SImode);
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operands[5] = gen_reg_rtx (SImode);
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emit_move_insn (operands[5], force_operand (XEXP (operands[1], 0), NULL_RTX));
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operands[1] = replace_equiv_address (operands[1], operands[5]);
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})
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(define_insn "*strlensi"
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[(set (match_operand:SI 0 "register_operand" "=a")
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(unspec:SI [(match_operand:SI 2 "general_operand" "0")
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(mem:BLK (match_operand:SI 3 "register_operand" "1"))
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(reg:QI 0)
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(match_operand 4 "immediate_operand" "")] UNSPEC_SRST))
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(clobber (match_scratch:SI 1 "=a"))
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(clobber (reg:CC 33))]
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"!TARGET_64BIT"
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"srst\t%0,%1\;jo\t.-4"
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[(set_attr "op_type" "NN")
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(set_attr "type" "vs")
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(set_attr "length" "8")])
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;
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;
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; movstrM instruction pattern(s).
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; movstrM instruction pattern(s).
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;
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;
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