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re PR target/50751 (SH Target: Displacement addressing does not work for QImode and HImode)
PR target/50751 * config/sh/sh.c (sh_legitimize_address, sh_legitimize_reload_address): Rearrange conditional logic. Move displacement address calculations to ... (sh_find_mov_disp_adjust): ... this new function. From-SVN: r185894
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@ -1,3 +1,11 @@
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2012-03-27 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/50751
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* config/sh/sh.c (sh_legitimize_address, sh_legitimize_reload_address):
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Rearrange conditional logic. Move displacement address calculations
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to ...
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(sh_find_mov_disp_adjust): ... this new function.
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2012-03-27 H.J. Lu <hongjiu.lu@intel.com>
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* config/arm/arm.opt (mapcs): Remove MaskExists.
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@ -9783,13 +9783,80 @@ legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED,
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return orig;
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}
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/* Try machine-dependent ways of modifying an illegitimate address
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to be legitimate. If we find one, return the new, valid address.
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Otherwise, return X.
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/* Given a (logical) mode size and an offset in bytes, try to find a the
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appropriate displacement value for a mov insn. On SH the displacements
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are limited to max. 60 bytes for SImode, max. 30 bytes in HImode and max.
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15 bytes in QImode. To compensate this we create a new base address by
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adding an adjustment value to it.
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For the SH, if X is almost suitable for indexing, but the offset is
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out of range, convert it into a normal form so that CSE has a chance
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of reducing the number of address registers used. */
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If the originally requested offset is greater than 127 we prefer using
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values 124..127 over 128..131 to increase opportunities to use the
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add #imm, Rn insn.
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In some cases it is possible that a requested offset might seem unaligned
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or inappropriate for the mode size, like offset = 2 and mode size = 4.
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This is compensated by adjusting the base address so that the effective
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address of the displacement move insn will be aligned.
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This is not the best possible way of rebasing the base address, as it
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does not look at other present displacement addressings around it.
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In some cases this can create more base address adjustments than would
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actually be necessary. */
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struct disp_adjust
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{
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rtx offset_adjust;
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rtx mov_disp;
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int max_mov_disp;
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};
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static struct disp_adjust
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sh_find_mov_disp_adjust (int mode_sz, HOST_WIDE_INT offset)
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{
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struct disp_adjust res = { NULL_RTX, NULL_RTX, 0 };
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/* The max. available mode for actual move insns is SImode.
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Larger accesses will be split into multiple loads/stores. */
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const int max_mov_sz = GET_MODE_SIZE (SImode);
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const int mov_insn_size = mode_sz >= max_mov_sz ? max_mov_sz : mode_sz;
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const HOST_WIDE_INT max_disp = 15 * mov_insn_size;
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HOST_WIDE_INT align_modifier = offset > 127 ? mov_insn_size : 0;
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HOST_WIDE_INT offset_adjust;
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/* In some cases this actually does happen and we must check for it. */
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if (mode_sz < 1 || mode_sz > 8)
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return res;
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/* FIXME: HImode with displacement addressing is not supported yet.
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Make it purposefully fail for now. */
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if (mov_insn_size == 2)
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return res;
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/* Keeps the previous behavior for QImode displacement addressing.
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This just decides how the offset is re-based. Removing this special
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case will result in slightly bigger code on average, but it's not that
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bad actually. */
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if (mov_insn_size == 1)
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align_modifier = 0;
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res.max_mov_disp = max_disp + mov_insn_size;
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offset_adjust = ((offset + align_modifier) & ~max_disp) - align_modifier;
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if (mode_sz + offset - offset_adjust <= res.max_mov_disp)
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{
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res.offset_adjust = GEN_INT (offset_adjust);
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res.mov_disp = GEN_INT (offset - offset_adjust);
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}
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return res;
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}
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/* Try to modify an illegitimate address and make it legitimate.
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If we find one, return the new, valid address.
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Otherwise, return the original address. */
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static rtx
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sh_legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
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@ -9797,66 +9864,33 @@ sh_legitimize_address (rtx x, rtx oldx, enum machine_mode mode)
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if (flag_pic)
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x = legitimize_pic_address (oldx, mode, NULL_RTX);
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if (GET_CODE (x) == PLUS
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&& (GET_MODE_SIZE (mode) == 4
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|| GET_MODE_SIZE (mode) == 8)
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&& CONST_INT_P (XEXP (x, 1))
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&& BASE_REGISTER_RTX_P (XEXP (x, 0))
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&& ! TARGET_SHMEDIA
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&& ! ((TARGET_SH4 || TARGET_SH2A_DOUBLE) && mode == DFmode)
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&& ! (TARGET_SH2E && mode == SFmode))
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if (TARGET_SHMEDIA)
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return x;
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if (((TARGET_SH4 || TARGET_SH2A_DOUBLE) && mode == DFmode)
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|| (TARGET_SH2E && mode == SFmode))
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return x;
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if (GET_CODE (x) == PLUS && CONST_INT_P (XEXP (x, 1))
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&& BASE_REGISTER_RTX_P (XEXP (x, 0)))
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{
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rtx index_rtx = XEXP (x, 1);
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HOST_WIDE_INT offset = INTVAL (index_rtx), offset_base;
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rtx sum;
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const int mode_sz = GET_MODE_SIZE (mode);
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struct disp_adjust adj = sh_find_mov_disp_adjust (mode_sz,
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INTVAL (XEXP (x, 1)));
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/* On rare occasions, we might get an unaligned pointer
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that is indexed in a way to give an aligned address.
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Therefore, keep the lower two bits in offset_base. */
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/* Instead of offset_base 128..131 use 124..127, so that
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simple add suffices. */
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if (offset > 127)
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offset_base = ((offset + 4) & ~60) - 4;
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else
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offset_base = offset & ~60;
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/* Sometimes the normal form does not suit DImode. We
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could avoid that by using smaller ranges, but that
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would give less optimized code when SImode is
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prevalent. */
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if (GET_MODE_SIZE (mode) + offset - offset_base <= 64)
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{
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sum = expand_binop (Pmode, add_optab, XEXP (x, 0),
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GEN_INT (offset_base), NULL_RTX, 0,
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OPTAB_LIB_WIDEN);
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return gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base));
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}
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}
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/* This could be generalized for SImode, HImode, QImode displacement
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addressing. */
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if (mode == QImode && GET_CODE (x) == PLUS
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&& BASE_REGISTER_RTX_P (XEXP (x, 0)) && CONST_INT_P (XEXP (x, 1)))
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{
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rtx index_rtx = XEXP (x, 1);
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HOST_WIDE_INT offset = INTVAL (index_rtx);
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HOST_WIDE_INT offset_base = offset & ~15;
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if (offset - offset_base <= 16)
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if (adj.offset_adjust != NULL_RTX && adj.mov_disp != NULL_RTX)
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{
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rtx sum = expand_binop (Pmode, add_optab, XEXP (x, 0),
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GEN_INT (offset_base), NULL_RTX, 0,
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OPTAB_LIB_WIDEN);
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return gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base));
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adj.offset_adjust, NULL_RTX, 0,
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OPTAB_LIB_WIDEN);
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return gen_rtx_PLUS (Pmode, sum, adj.mov_disp);
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}
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}
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return x;
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}
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/* Attempt to replace *P, which is an address that needs reloading, with
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/* Attempt to replace *p, which is an address that needs reloading, with
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a valid memory address for an operand of mode MODE.
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Like for sh_legitimize_address, for the SH we try to get a normal form
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of the address. That will allow inheritance of the address reloads. */
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@ -9866,75 +9900,71 @@ sh_legitimize_reload_address (rtx *p, enum machine_mode mode, int opnum,
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int itype)
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{
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enum reload_type type = (enum reload_type) itype;
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const int mode_sz = GET_MODE_SIZE (mode);
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if (GET_CODE (*p) == PLUS
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&& (GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)
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&& CONST_INT_P (XEXP (*p, 1))
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if (TARGET_SHMEDIA)
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return false;
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if (GET_CODE (*p) == PLUS && CONST_INT_P (XEXP (*p, 1))
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&& MAYBE_BASE_REGISTER_RTX_P (XEXP (*p, 0), true)
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&& ! TARGET_SHMEDIA
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&& ! (TARGET_SH4 && mode == DFmode)
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&& ! (mode == PSImode && type == RELOAD_FOR_INPUT_ADDRESS)
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&& (ALLOW_INDEXED_ADDRESS
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|| XEXP (*p, 0) == stack_pointer_rtx
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|| XEXP (*p, 0) == hard_frame_pointer_rtx))
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{
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rtx index_rtx = XEXP (*p, 1);
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HOST_WIDE_INT offset = INTVAL (index_rtx), offset_base;
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rtx sum;
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const HOST_WIDE_INT offset = INTVAL (XEXP (*p, 1));
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struct disp_adjust adj = sh_find_mov_disp_adjust (mode_sz, offset);
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if (TARGET_SH2A && mode == DFmode && (offset & 0x7))
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{
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push_reload (*p, NULL_RTX, p, NULL,
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BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, opnum, type);
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goto win;
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return true;
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}
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if (TARGET_SH2E && mode == SFmode)
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{
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*p = copy_rtx (*p);
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push_reload (*p, NULL_RTX, p, NULL,
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BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, opnum, type);
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goto win;
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return true;
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}
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/* Instead of offset_base 128..131 use 124..127, so that
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simple add suffices. */
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if (offset > 127)
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offset_base = ((offset + 4) & ~60) - 4;
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else
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offset_base = offset & ~60;
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/* Sometimes the normal form does not suit DImode. We could avoid
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that by using smaller ranges, but that would give less optimized
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code when SImode is prevalent. */
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if (GET_MODE_SIZE (mode) + offset - offset_base <= 64)
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/* FIXME: Do not allow to legitimize QImode and HImode displacement
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moves because then reload has a problem figuring the constraint
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that the move insn target/source reg must be R0.
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Or maybe some handling is wrong in sh_secondary_reload for this
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to work properly? */
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if ((mode_sz == 4 || mode_sz == 8)
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&& ! (TARGET_SH4 && mode == DFmode)
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&& adj.offset_adjust != NULL_RTX && adj.mov_disp != NULL_RTX)
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{
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sum = gen_rtx_PLUS (Pmode, XEXP (*p, 0), GEN_INT (offset_base));
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*p = gen_rtx_PLUS (Pmode, sum, GEN_INT (offset - offset_base));
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rtx sum = gen_rtx_PLUS (Pmode, XEXP (*p, 0), adj.offset_adjust);
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*p = gen_rtx_PLUS (Pmode, sum, adj.mov_disp);
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push_reload (sum, NULL_RTX, &XEXP (*p, 0), NULL,
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BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, opnum, type);
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goto win;
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return true;
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}
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}
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/* We must re-recognize what we created before. */
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else if (GET_CODE (*p) == PLUS
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&& (GET_MODE_SIZE (mode) == 4 || GET_MODE_SIZE (mode) == 8)
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&& GET_CODE (XEXP (*p, 0)) == PLUS
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&& CONST_INT_P (XEXP (XEXP (*p, 0), 1))
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&& MAYBE_BASE_REGISTER_RTX_P (XEXP (XEXP (*p, 0), 0), true)
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&& CONST_INT_P (XEXP (*p, 1))
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&& ! TARGET_SHMEDIA
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&& ! (TARGET_SH2E && mode == SFmode))
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if (GET_CODE (*p) == PLUS
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&& (mode_sz == 4 || mode_sz == 8)
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&& GET_CODE (XEXP (*p, 0)) == PLUS
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&& CONST_INT_P (XEXP (XEXP (*p, 0), 1))
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&& MAYBE_BASE_REGISTER_RTX_P (XEXP (XEXP (*p, 0), 0), true)
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&& CONST_INT_P (XEXP (*p, 1))
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&& ! (TARGET_SH2E && mode == SFmode))
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{
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/* Because this address is so complex, we know it must have
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been created by LEGITIMIZE_RELOAD_ADDRESS before; thus,
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it is already unshared, and needs no further unsharing. */
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push_reload (XEXP (*p, 0), NULL_RTX, &XEXP (*p, 0), NULL,
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BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, opnum, type);
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goto win;
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return true;
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}
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return false;
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win:
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return true;
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}
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/* In the name of slightly smaller debug output, and to cater to
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