From 77f4b1097e6aec50053577a8a1a65487ed58cbb0 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Fri, 22 Nov 2024 10:02:59 +0100 Subject: [PATCH] testsuite: Fix up vector-{8,9,10}.c tests MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit On Thu, Nov 21, 2024 at 01:30:39PM +0100, Christoph Müllner wrote: > > > * gcc.dg/tree-ssa/satd-hadamard.c: New test. > > > * gcc.dg/tree-ssa/vector-10.c: New test. > > > * gcc.dg/tree-ssa/vector-8.c: New test. > > > * gcc.dg/tree-ssa/vector-9.c: New test. I see FAILs on i686-linux or on x86_64-linux (in the latter with -m32 testing). One problem is that vector-10.c doesn't use -Wno-psabi option and uses a function which returns a vector and takes vector as first parameter, the other problems are that 3 other tests don't arrange for at least basic vector ISA support, plus non-standardly test only on x86_64-*-*, while normally one would allow both i?86-*-* x86_64-*-* and if it is e.g. specific to 64-bit, also check for lp64 or int128 or whatever else is needed. E.g. Solaris I think has i?86-*-* triplet even for 64-bit code, etc. The following patch fixes these. 2024-11-22 Jakub Jelinek * gcc.dg/tree-ssa/satd-hadamard.c: Add -msse2 as dg-additional-options on x86. Also scan-tree-dump on i?86-*-*. * gcc.dg/tree-ssa/vector-8.c: Likewise. * gcc.dg/tree-ssa/vector-9.c: Likewise. * gcc.dg/tree-ssa/vector-10.c: Add -Wno-psabi to dg-additional-options. --- gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c | 3 ++- gcc/testsuite/gcc.dg/tree-ssa/vector-10.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/vector-8.c | 5 +++-- gcc/testsuite/gcc.dg/tree-ssa/vector-9.c | 5 +++-- 4 files changed, 9 insertions(+), 6 deletions(-) diff --git a/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c b/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c index 7a22772f2e6..6042378f165 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/satd-hadamard.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-O3 -fdump-tree-forwprop4-details" } */ +/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */ #include @@ -40,4 +41,4 @@ x264_pixel_satd_8x4_simplified (uint8_t *pix1, int i_pix1, uint8_t *pix2, int i_ return (((uint16_t)sum) + ((uint32_t)sum>>16)) >> 1; } -/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop4" { target { aarch64*-*-* x86_64-*-* } } } } */ +/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop4" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-10.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-10.c index d5caebdf174..bb1ed92dc90 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vector-10.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-10.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-additional-options "-O3 -fdump-tree-forwprop1-details" } */ +/* { dg-additional-options "-O3 -fdump-tree-forwprop1-details -Wno-psabi" } */ typedef int vec __attribute__((vector_size (4 * sizeof (int)))); diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c index 3a7b62b640d..ba9a0187c10 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-8.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-O3 -fdump-tree-forwprop1-details" } */ +/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */ typedef int vec __attribute__((vector_size (4 * sizeof (int)))); @@ -30,5 +31,5 @@ void f (vec *p_v_in_1, vec *p_v_in_2, vec *p_v_out_1, vec *p_v_out_2) *p_v_out_2 = v_out_2; } -/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended" "forwprop1" { target { aarch64*-*-* x86_64-*-* } } } } */ -/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" { target { aarch64*-*-* x86_64-*-* } } } } */ +/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended" "forwprop1" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */ +/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */ diff --git a/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c b/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c index ba34fb163d6..1aa2ef99c3c 100644 --- a/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c +++ b/gcc/testsuite/gcc.dg/tree-ssa/vector-9.c @@ -1,5 +1,6 @@ /* { dg-do compile } */ /* { dg-additional-options "-O3 -fdump-tree-forwprop1-details" } */ +/* { dg-additional-options "-msse2" { target i?86-*-* x86_64-*-* } } */ typedef int vec __attribute__((vector_size (4 * sizeof (int)))); @@ -30,5 +31,5 @@ void f (vec *p_v_in_1, vec *p_v_in_2, vec *p_v_out_1, vec *p_v_out_2) *p_v_out_2 = v_out_2; } -/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended" "forwprop1" { target { aarch64*-*-* x86_64-*-* } } } } */ -/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" { target { aarch64*-*-* x86_64-*-* } } } } */ +/* { dg-final { scan-tree-dump "Vec perm simplify sequences have been blended" "forwprop1" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */ +/* { dg-final { scan-tree-dump "VEC_PERM_EXPR.*{ 2, 3, 6, 7 }" "forwprop1" { target { aarch64*-*-* i?86-*-* x86_64-*-* } } } } */