mirror of
https://gcc.gnu.org/git/gcc.git
synced 2024-12-12 13:23:47 +08:00
re PR tree-optimization/63563 (ICE: in vectorizable_store, at tree-vect-stmts.c:5106 with -mavx2)
PR tree-optimization/63563 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Bail out if either dra or drb stmts are not normal loads/stores. * gcc.target/i386/pr63563.c: New test. From-SVN: r216507
This commit is contained in:
parent
21d30baba1
commit
61331c4897
@ -1,3 +1,9 @@
|
||||
2014-10-21 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR tree-optimization/63563
|
||||
* tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Bail out
|
||||
if either dra or drb stmts are not normal loads/stores.
|
||||
|
||||
2014-10-21 Ilya Tocar <ilya.tocar@intel.com>
|
||||
|
||||
* config/i386/i386.c (expand_vec_perm_1): Fix
|
||||
|
@ -1,3 +1,8 @@
|
||||
2014-10-21 Jakub Jelinek <jakub@redhat.com>
|
||||
|
||||
PR tree-optimization/63563
|
||||
* gcc.target/i386/pr63563.c: New test.
|
||||
|
||||
2014-10-20 Richard Biener <rguenther@suse.de>
|
||||
|
||||
* gcc.dg/tree-ssa/slsr-19.c: Make robust against operand order changes.
|
||||
|
17
gcc/testsuite/gcc.target/i386/pr63563.c
Normal file
17
gcc/testsuite/gcc.target/i386/pr63563.c
Normal file
@ -0,0 +1,17 @@
|
||||
/* PR tree-optimization/63563 */
|
||||
/* { dg-do compile } */
|
||||
/* { dg-options "-O3 -mavx2" } */
|
||||
|
||||
struct A { unsigned long a, b, c, d; } a[1024] = { { 0, 1, 2, 3 } }, b;
|
||||
|
||||
void
|
||||
foo (void)
|
||||
{
|
||||
int i;
|
||||
for (i = 0; i < 1024; i++)
|
||||
{
|
||||
a[i].a = a[i].b = a[i].c = b.c;
|
||||
if (a[i].d)
|
||||
a[i].d = b.d;
|
||||
}
|
||||
}
|
@ -2551,11 +2551,14 @@ vect_analyze_data_ref_accesses (loop_vec_info loop_vinfo, bb_vec_info bb_vinfo)
|
||||
over them. The we can just skip ahead to the next DR here. */
|
||||
|
||||
/* Check that the data-refs have same first location (except init)
|
||||
and they are both either store or load (not load and store). */
|
||||
and they are both either store or load (not load and store,
|
||||
not masked loads or stores). */
|
||||
if (DR_IS_READ (dra) != DR_IS_READ (drb)
|
||||
|| !operand_equal_p (DR_BASE_ADDRESS (dra),
|
||||
DR_BASE_ADDRESS (drb), 0)
|
||||
|| !dr_equal_offsets_p (dra, drb))
|
||||
|| !dr_equal_offsets_p (dra, drb)
|
||||
|| !gimple_assign_single_p (DR_STMT (dra))
|
||||
|| !gimple_assign_single_p (DR_STMT (drb)))
|
||||
break;
|
||||
|
||||
/* Check that the data-refs have the same constant size and step. */
|
||||
|
Loading…
Reference in New Issue
Block a user