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RISC-V: Fix testcase missing arch attribute

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The C + F extention implies the zcf extension on rv32. Add missing zcf
extension for the rv32 target.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/target-attr-16.c: Update expected assembly

Signed-off-by: Edwin Lu <ewlu@rivosinc.com>
This commit is contained in:
Edwin Lu 2024-07-16 17:43:45 -07:00
parent 44fcc1ca11
commit 5bb01e91d4
1 changed files with 1 additions and 1 deletions
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2
gcc/testsuite/gcc.target/riscv/target-attr-16.c
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@ -24,5 +24,5 @@ void bar (void)
{
}
/* { dg-final { scan-assembler-times ".option arch, rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zba1p0_zbb1p0" 4 { target { rv32 } } } } */
/* { dg-final { scan-assembler-times ".option arch, rv32i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zcf1p0_zba1p0_zbb1p0" 4 { target { rv32 } } } } */
/* { dg-final { scan-assembler-times ".option arch, rv64i2p1_m2p0_a2p1_f2p2_d2p2_c2p0_zicsr2p0_zifencei2p0_zaamo1p0_zalrsc1p0_zca1p0_zcd1p0_zba1p0_zbb1p0" 4 { target { rv64 } } } } */