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mips-protos.h (mips_address_insns): Add a boolean argument.
gcc/ * config/mips/mips-protos.h (mips_address_insns): Add a boolean argument. (mips_fetch_insns): Delete in favor of... (mips_load_store_insns): ...this new function. * config/mips/mips.c (mips_address_insns): Add a boolean argument to say whether multiword moves _might_ be split. (mips_fetch_insns): Delete in favor of... (mips_load_store_insns): ...this new function. (mips_rtx_costs): Update the call to mips_address_insns. (mips_address_cost): Likewise. * config/mips/mips.md (length): Use mips_load_store_insns instead of mips_fetch_insns. * config/mips/constraints.md (R): Use mips_address_insns rather than mips_fetch_insns. Assume that the move never needs to be split. From-SVN: r127338
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@ -1,3 +1,20 @@
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2007-08-10 Richard Sandiford <richard@codesourcery.com>
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* config/mips/mips-protos.h (mips_address_insns): Add a boolean
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argument.
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(mips_fetch_insns): Delete in favor of...
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(mips_load_store_insns): ...this new function.
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* config/mips/mips.c (mips_address_insns): Add a boolean argument
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to say whether multiword moves _might_ be split.
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(mips_fetch_insns): Delete in favor of...
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(mips_load_store_insns): ...this new function.
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(mips_rtx_costs): Update the call to mips_address_insns.
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(mips_address_cost): Likewise.
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* config/mips/mips.md (length): Use mips_load_store_insns instead
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of mips_fetch_insns.
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* config/mips/constraints.md (R): Use mips_address_insns rather
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than mips_fetch_insns. Assume that the move never needs to be split.
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2007-08-09 Sandra Loosemore <sandra@codesourcery.com>
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* config/mips/mips.opt (mhard-float, msoft-float): Make these
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@ -151,7 +151,7 @@
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(define_memory_constraint "R"
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"An address that can be used in a non-macro load or store."
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(and (match_code "mem")
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(match_test "mips_fetch_insns (op) == 1")))
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(match_test "mips_address_insns (XEXP (op, 0), mode, false) == 1")))
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(define_constraint "S"
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"@internal
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@ -168,9 +168,9 @@ extern bool mips_symbolic_constant_p (rtx, enum mips_symbol_context,
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enum mips_symbol_type *);
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extern int mips_regno_mode_ok_for_base_p (int, enum machine_mode, int);
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extern bool mips_stack_address_p (rtx, enum machine_mode);
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extern int mips_address_insns (rtx, enum machine_mode);
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extern int mips_address_insns (rtx, enum machine_mode, bool);
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extern int mips_const_insns (rtx);
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extern int mips_fetch_insns (rtx);
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extern int mips_load_store_insns (rtx, rtx);
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extern int mips_idiv_insns (void);
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extern int fp_register_operand (rtx, enum machine_mode);
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extern int lo_operand (rtx, enum machine_mode);
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@ -1945,22 +1945,26 @@ mips16_unextended_reference_p (enum machine_mode mode, rtx base, rtx offset)
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/* Return the number of instructions needed to load or store a value
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of mode MODE at X. Return 0 if X isn't valid for MODE.
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of mode MODE at X. Return 0 if X isn't valid for MODE. Assume that
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multiword moves may need to be split into word moves if MIGHT_SPLIT_P,
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otherwise assume that a single load or store is enough.
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For mips16 code, count extended instructions as two instructions. */
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int
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mips_address_insns (rtx x, enum machine_mode mode)
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mips_address_insns (rtx x, enum machine_mode mode, bool might_split_p)
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{
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struct mips_address_info addr;
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int factor;
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if (mode == BLKmode)
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/* BLKmode is used for single unaligned loads and stores. */
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factor = 1;
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else
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/* Each word of a multi-word value will be accessed individually. */
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/* BLKmode is used for single unaligned loads and stores and should
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not count as a multiword mode. (GET_MODE_SIZE (BLKmode) is pretty
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meaningless, so we have to single it out as a special case one way
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or the other.) */
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if (mode != BLKmode && might_split_p)
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factor = (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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else
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factor = 1;
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if (mips_classify_address (&addr, x, mode, false))
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switch (addr.type)
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@ -2059,14 +2063,30 @@ mips_const_insns (rtx x)
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}
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/* Return the number of instructions needed for memory reference X.
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Count extended mips16 instructions as two instructions. */
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/* Return the number of instructions needed to implement INSN,
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given that it loads from or stores to MEM. Count extended
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mips16 instructions as two instructions. */
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int
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mips_fetch_insns (rtx x)
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mips_load_store_insns (rtx mem, rtx insn)
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{
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gcc_assert (MEM_P (x));
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return mips_address_insns (XEXP (x, 0), GET_MODE (x));
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enum machine_mode mode;
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bool might_split_p;
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rtx set;
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gcc_assert (MEM_P (mem));
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mode = GET_MODE (mem);
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/* Try to prove that INSN does not need to be split. */
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might_split_p = true;
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if (GET_MODE_BITSIZE (mode) == 64)
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{
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set = single_set (insn);
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if (set && !mips_split_64bit_move_p (SET_DEST (set), SET_SRC (set)))
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might_split_p = false;
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}
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return mips_address_insns (XEXP (mem, 0), mode, might_split_p);
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}
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@ -2857,7 +2877,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total)
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/* If the address is legitimate, return the number of
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instructions it needs. */
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rtx addr = XEXP (x, 0);
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int n = mips_address_insns (addr, GET_MODE (x));
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int n = mips_address_insns (addr, GET_MODE (x), true);
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if (n > 0)
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{
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*total = COSTS_N_INSNS (n + 1);
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@ -3012,7 +3032,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int *total)
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static int
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mips_address_cost (rtx addr)
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{
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return mips_address_insns (addr, SImode);
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return mips_address_insns (addr, SImode, false);
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}
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/* Return one word of double-word value OP, taking into account the fixed
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@ -360,9 +360,9 @@
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(eq_attr "type" "const")
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(symbol_ref "mips_const_insns (operands[1]) * 4")
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(eq_attr "type" "load,fpload")
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(symbol_ref "mips_fetch_insns (operands[1]) * 4")
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(symbol_ref "mips_load_store_insns (operands[1], insn) * 4")
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(eq_attr "type" "store,fpstore")
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(symbol_ref "mips_fetch_insns (operands[0]) * 4")
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(symbol_ref "mips_load_store_insns (operands[0], insn) * 4")
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;; In the worst case, a call macro will take 8 instructions:
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;;
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