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[PR116587][LRA]: Fix last chance reload pseudo allocation
On i686 PR116587 test compilation resulted in LRA failure to find registers for a reload insn pseudo. The insn requires 6 regs for 4 reload insn pseudos where two of them require 2 regs each. But we have only 5 free regs as sp is a fixed reg, bp is fixed because of -fno-omit-frame-pointer, bx is assigned to pic_offset_table_pseudo because of -fPIC. LRA spills pic_offset_table_pseudo as the last chance approach to allocate registers to the reload pseudo. Although it makes 2 free registers for the unallocated reload pseudo requiring also 2 regs, the pseudo still can not be allocated as the 2 free regs are disjoint. The patch spills all pseudos conflicting with the unallocated reload pseudo including already allocated reload insn pseudos, then standard LRA code allocates spilled pseudos requiring more one register first and avoid situation of the disjoint regs for reload pseudos requiring more one reg. gcc/ChangeLog: PR target/116587 * lra-assigns.cc (find_all_spills_for): Consider all pseudos whose classes intersect given pseudo class. gcc/testsuite/ChangeLog: PR target/116587 * gcc.target/i386/pr116587.c: New test.
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@ -1362,14 +1362,7 @@ find_all_spills_for (int regno)
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{
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if (live_pseudos_reg_renumber[r2->regno] >= 0
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&& ! sparseset_bit_p (live_range_hard_reg_pseudos, r2->regno)
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&& rclass_intersect_p[regno_allocno_class_array[r2->regno]]
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&& ((int) r2->regno < lra_constraint_new_regno_start
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|| bitmap_bit_p (&lra_inheritance_pseudos, r2->regno)
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|| bitmap_bit_p (&lra_split_regs, r2->regno)
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|| bitmap_bit_p (&lra_optional_reload_pseudos, r2->regno)
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/* There is no sense to consider another reload
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pseudo if it has the same class. */
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|| regno_allocno_class_array[r2->regno] != rclass))
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&& rclass_intersect_p[regno_allocno_class_array[r2->regno]])
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sparseset_set_bit (live_range_hard_reg_pseudos, r2->regno);
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}
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}
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27
gcc/testsuite/gcc.target/i386/pr116587.c
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27
gcc/testsuite/gcc.target/i386/pr116587.c
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@ -0,0 +1,27 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -fPIC -mstackrealign -mavx512f -fharden-control-flow-redundancy -fno-omit-frame-pointer -mbmi -fkeep-gc-roots-live" } */
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typedef __UINT64_TYPE__ a;
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int b;
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struct c {
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a d;
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};
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extern char e[];
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int f;
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void g();
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char *h(struct c *i, a d) {
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while (b) {
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if ((i->d & d) == i->d) {
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if (f)
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g();
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g();
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d &= ~i->d;
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}
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++i;
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}
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if (d)
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g();
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if (f)
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return "";
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return e;
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}
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