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RISC-V: Fix sync.md and riscv.cc whitespace errors
This patch fixes whitespace errors introduced with https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616807.html 2023-04-26 Patrick O'Neill <patrick@rivosinc.com> gcc/ChangeLog: * config/riscv/riscv.cc: Fix whitespace. * config/riscv/sync.md: Fix whitespace. Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
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@ -7193,7 +7193,7 @@ riscv_subword_address (rtx mem, rtx *aligned_mem, rtx *shift, rtx *mask,
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emit_move_insn (*mask, gen_rtx_ASHIFT (SImode, *mask,
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gen_lowpart (QImode, *shift)));
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emit_move_insn (*not_mask, gen_rtx_NOT(SImode, *mask));
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emit_move_insn (*not_mask, gen_rtx_NOT (SImode, *mask));
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}
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/* Leftshift a subword within an SImode register. */
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@ -7206,7 +7206,7 @@ riscv_lshift_subword (machine_mode mode, rtx value, rtx shift,
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emit_move_insn (value_reg, simplify_gen_subreg (SImode, value,
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mode, 0));
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emit_move_insn(*shifted_value, gen_rtx_ASHIFT (SImode, value_reg,
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emit_move_insn (*shifted_value, gen_rtx_ASHIFT (SImode, value_reg,
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gen_lowpart (QImode, shift)));
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}
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@ -131,7 +131,7 @@
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operation. */
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/* Logic duplicated in gcc/libgcc/config/riscv/atomic.c for use when inlining
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is disabled */
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is disabled. */
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rtx old = gen_reg_rtx (SImode);
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rtx mem = operands[1];
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@ -196,7 +196,7 @@
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operation. */
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/* Logic duplicated in gcc/libgcc/config/riscv/atomic.c for use when inlining
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is disabled */
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is disabled. */
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rtx old = gen_reg_rtx (SImode);
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rtx mem = operands[1];
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@ -396,7 +396,7 @@
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operation. */
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/* Logic duplicated in gcc/libgcc/config/riscv/atomic.c for use when inlining
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is disabled */
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is disabled. */
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rtx old = gen_reg_rtx (SImode);
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rtx mem = operands[1];
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