From 239711f6afe3070a11c4f1d9266588e8db1217ee Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 17 Dec 2014 14:22:57 +0000 Subject: [PATCH] Add -malign-data={abi|compat|cachineline} Add -malign-data={abi|compat,cachineline} to control how GCC aligns variables. "compat" uses increased alignment value compatible with GCC 4.8 and earlier, "abi" uses alignment value as specified by the psABI, and "cacheline" uses increased alignment value to match the cache line size. "compat" is the default. gcc/ PR target/61296 * config/i386/i386-opts.h (ix86_align_data): New enum. * config/i386/i386.c (ix86_data_alignment): Return the ABI alignment value for -malign-data=abi, the cachine line size for -malign-data=cachineline and the older GCC compatible alignment value for for -malign-data=compat. * config/i386/i386.opt (malign-data=): New. * doc/invoke.texi: Document -malign-data=. gcc/testsuite/ PR target/61296 * gcc.target/i386/pr61296-2.c: New. * gcc.target/i386/pr61296-2.c: Likewise. * gcc.target/i386/pr61296-3.c: Likewise. * gcc.target/i386/pr61296-4.c: Likewise. * gcc.target/i386/pr61296-5.c: Likewise. * gcc.target/i386/pr61296-6.c: Likewise. * gcc.target/i386/pr61296-7.c: Likewise. Co-Authored-By: Jakub Jelinek Co-Authored-By: Uros Bizjak From-SVN: r218818 --- gcc/ChangeLog | 13 +++++++++++ gcc/config/i386/i386-opts.h | 6 +++++ gcc/config/i386/i386.c | 10 +++++++-- gcc/config/i386/i386.opt | 17 ++++++++++++++ gcc/doc/invoke.texi | 10 ++++++++- gcc/testsuite/ChangeLog | 11 +++++++++ gcc/testsuite/gcc.target/i386/pr61296-1.c | 27 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr61296-2.c | 27 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr61296-3.c | 27 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr61296-4.c | 27 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr61296-5.c | 27 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr61296-6.c | 27 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr61296-7.c | 27 +++++++++++++++++++++++ 13 files changed, 253 insertions(+), 3 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-6.c create mode 100644 gcc/testsuite/gcc.target/i386/pr61296-7.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7b3c4aa6f75..663669b1336 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2014-12-17 H.J. Lu + Jakub Jelinek + Uros Bizjak + + PR target/61296 + * config/i386/i386-opts.h (ix86_align_data): New enum. + * config/i386/i386.c (ix86_data_alignment): Return the ABI + alignment value for -malign-data=abi, the cachine line size + for -malign-data=cachineline and the older GCC compatible + alignment value for for -malign-data=compat. + * config/i386/i386.opt (malign-data=): New. + * doc/invoke.texi: Document -malign-data=. + 2014-12-17 Marek Polacek PR middle-end/63568 diff --git a/gcc/config/i386/i386-opts.h b/gcc/config/i386/i386-opts.h index 47a34dbf781..455df43712c 100644 --- a/gcc/config/i386/i386-opts.h +++ b/gcc/config/i386/i386-opts.h @@ -77,6 +77,12 @@ enum pmode { PMODE_DI /* Pmode == DImode. */ }; +enum ix86_align_data { + ix86_align_data_type_compat, + ix86_align_data_type_abi, + ix86_align_data_type_cacheline +}; + enum asm_dialect { ASM_ATT, ASM_INTEL diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 72c1219c4c0..17ef75117ff 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -27191,8 +27191,7 @@ ix86_data_alignment (tree type, int align, bool opt) those compilers, ensure we don't decrease alignment from what we used to assume. */ - int max_align_compat - = optimize_size ? BITS_PER_WORD : MIN (256, MAX_OFILE_ALIGNMENT); + int max_align_compat = MIN (256, MAX_OFILE_ALIGNMENT); /* A data structure, equal or greater than the size of a cache line (64 bytes in the Pentium 4 and other recent Intel processors, including @@ -27205,6 +27204,13 @@ ix86_data_alignment (tree type, int align, bool opt) if (max_align < BITS_PER_WORD) max_align = BITS_PER_WORD; + switch (ix86_align_data_type) + { + case ix86_align_data_type_abi: opt = false; break; + case ix86_align_data_type_compat: max_align = BITS_PER_WORD; break; + case ix86_align_data_type_cacheline: break; + } + if (opt && AGGREGATE_TYPE_P (type) && TYPE_SIZE (type) diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index b1c63198973..3d54bfa1945 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -221,6 +221,23 @@ malign-stringops Target RejectNegative Report InverseMask(NO_ALIGN_STRINGOPS, ALIGN_STRINGOPS) Save Align destination of the string operations +malign-data= +Target RejectNegative Joined Var(ix86_align_data_type) Enum(ix86_align_data) Init(ix86_align_data_type_compat) +Use the given data alignment + +Enum +Name(ix86_align_data) Type(enum ix86_align_data) +Known data alignment choices (for use with the -malign-data= option): + +EnumValue +Enum(ix86_align_data) String(compat) Value(ix86_align_data_type_compat) + +EnumValue +Enum(ix86_align_data) String(abi) Value(ix86_align_data_type_abi) + +EnumValue +Enum(ix86_align_data) String(cacheline) Value(ix86_align_data_type_cacheline) + march= Target RejectNegative Joined Var(ix86_arch_string) Generate code for given CPU diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 19422d78cd1..15068da33e4 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -701,7 +701,7 @@ Objective-C and Objective-C++ Dialects}. -m32 -m64 -mx32 -m16 -mlarge-data-threshold=@var{num} @gol -msse2avx -mfentry -mrecord-mcount -mnop-mcount -m8bit-idiv @gol -mavx256-split-unaligned-load -mavx256-split-unaligned-store @gol --mstack-protector-guard=@var{guard}} +-malign-data=@var{type} -mstack-protector-guard=@var{guard}} @emph{i386 and x86-64 Windows Options} @gccoptlist{-mconsole -mcygwin -mno-cygwin -mdll @gol @@ -15682,6 +15682,14 @@ as well as modifying the function calling convention for functions taking @code{long double}. Hence they are not binary-compatible with code compiled without that switch. +@item -malign-data=@var{type} +@opindex malign-data +Control how GCC aligns variables. Supported values for @var{type} are +@samp{compat} uses increased alignment value compatible uses GCC 4.8 +and earlier, @samp{abi} uses alignment value as specified by the +psABI, and @samp{cacheline} uses increased alignment value to match +the cache line size. @samp{compat} is the default. + @item -mlarge-data-threshold=@var{threshold} @opindex mlarge-data-threshold When @option{-mcmodel=medium} is specified, data objects larger than diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3b0447937c0..24c5143c64d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,14 @@ +2014-12-17 H.J. Lu + + PR target/61296 + * gcc.target/i386/pr61296-2.c: New. + * gcc.target/i386/pr61296-2.c: Likewise. + * gcc.target/i386/pr61296-3.c: Likewise. + * gcc.target/i386/pr61296-4.c: Likewise. + * gcc.target/i386/pr61296-5.c: Likewise. + * gcc.target/i386/pr61296-6.c: Likewise. + * gcc.target/i386/pr61296-7.c: Likewise. + 2014-12-17 Tejas Belagod PR testsuite/64328 diff --git a/gcc/testsuite/gcc.target/i386/pr61296-1.c b/gcc/testsuite/gcc.target/i386/pr61296-1.c new file mode 100644 index 00000000000..751dee022cf --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-1.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler ".align\[ \t]*32\[^:]*\[\n\r]x:" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr61296-2.c b/gcc/testsuite/gcc.target/i386/pr61296-2.c new file mode 100644 index 00000000000..59995559d76 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-2.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2 -malign-data=cacheline" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler ".align\[ \t]*64\[^:]*\[\n\r]x:" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr61296-3.c b/gcc/testsuite/gcc.target/i386/pr61296-3.c new file mode 100644 index 00000000000..d0152f78f58 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-3.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2 -malign-data=abi" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler-not ".align\[ \t]*\[0-9\]+\[^:]*\[\n\r]x:" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr61296-4.c b/gcc/testsuite/gcc.target/i386/pr61296-4.c new file mode 100644 index 00000000000..95e1ac6c634 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-4.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2 -malign-data=cacheline -malign-data=abi" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler-not ".align\[ \t]*\[0-9\]+\[^:]*\[\n\r]x:" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr61296-5.c b/gcc/testsuite/gcc.target/i386/pr61296-5.c new file mode 100644 index 00000000000..5caa77c223a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-5.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2 -malign-data=abi -malign-data=cacheline" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler ".align\[ \t]*64\[^:]*\[\n\r]x:" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr61296-6.c b/gcc/testsuite/gcc.target/i386/pr61296-6.c new file mode 100644 index 00000000000..8e0d535dc00 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-6.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2 -malign-data=cacheline -malign-data=compat" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler ".align\[ \t]*32\[^:]*\[\n\r]x:" } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr61296-7.c b/gcc/testsuite/gcc.target/i386/pr61296-7.c new file mode 100644 index 00000000000..6a67c9032e8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr61296-7.c @@ -0,0 +1,27 @@ +/* PR target/61296 */ +/* { dg-do compile { target { *-*-linux* } } } */ +/* { dg-options "-O2 -malign-data=compat -malign-data=abi" } */ + +struct foo +{ + char i1[8]; + char i2[8]; + char i3[8]; + char i4[8]; + char i5[8]; + char i6[8]; + char i7[8]; + char i8[8]; + char i9[8]; + char i10[8]; + char i11[8]; + char i12[8]; + char i13[8]; + char i14[8]; + char i15[8]; + char i16[8]; +}; + +struct foo x = { 1 }; + +/* { dg-final { scan-assembler-not ".align\[ \t]*\[0-9\]+\[^:]*\[\n\r]x:" } } */