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target.h (struct gcc_target.sched: dfa_pre_advance_cycle, [...]): New scheduler hooks.
* target.h (struct gcc_target.sched: dfa_pre_advance_cycle, dfa_post_advance_cycle): New scheduler hooks. * target-def.h (TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE, TARGET_SCHED_DFA_POST_ADVANCE_CYCLE): New macros to initialize new hooks. (TARGET_SCHED): Use them. * doc/tm.texi (TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE, TARGET_SCHED_DFA_POST_ADVANCE_CYCLE): Document new hooks. * haifa-sched.c (advance_one_cycle): Invoke new hooks. * genautomata.c (insn_has_dfa_reservation_p): New DFA interface function to facilitate debugging. (INSN_HAS_DFA_RESERVATION_P_FUNC_NAME): New macro. (output_insn_has_dfa_reservation_p): New static function to output insn_has_dfa_reservation_p (). (write_automata): Use it. * genattr.c (main): Output declaration for insn_has_dfa_reservation_p (). From-SVN: r127707
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@ -1,3 +1,24 @@
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2007-08-22 Maxim Kuvyrkov <maxim@codesourcery.com>
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* target.h (struct gcc_target.sched: dfa_pre_advance_cycle,
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dfa_post_advance_cycle): New scheduler hooks.
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* target-def.h (TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE,
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TARGET_SCHED_DFA_POST_ADVANCE_CYCLE): New macros to initialize
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new hooks.
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(TARGET_SCHED): Use them.
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* doc/tm.texi (TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE,
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TARGET_SCHED_DFA_POST_ADVANCE_CYCLE): Document new hooks.
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* haifa-sched.c (advance_one_cycle): Invoke new hooks.
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* genautomata.c (insn_has_dfa_reservation_p): New DFA interface
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function to facilitate debugging.
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(INSN_HAS_DFA_RESERVATION_P_FUNC_NAME): New macro.
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(output_insn_has_dfa_reservation_p): New static function to output
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insn_has_dfa_reservation_p ().
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(write_automata): Use it.
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* genattr.c (main): Output declaration for
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insn_has_dfa_reservation_p ().
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2007-08-22 Christian Bruel <christian.bruel@st.com>
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Richard Guenther <rguenther@suse.de>
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@ -6180,6 +6180,20 @@ The hook is analogous to @samp{TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN} but
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used to initialize data used by the previous hook.
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@end deftypefn
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@deftypefn {Target Hook} void TARGET_SCHED_DFA_PRE_CYCLE_ADVANCE (void)
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The hook to notify target that the current simulated cycle is about to finish.
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The hook is analogous to @samp{TARGET_SCHED_DFA_PRE_CYCLE_INSN} but used
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to change the state in more complicated situations - e.g. when advancing
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state on a single insn is not enough.
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@end deftypefn
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@deftypefn {Target Hook} void TARGET_SCHED_DFA_POST_CYCLE_ADVANCE (void)
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The hook to notify target that new simulated cycle has just started.
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The hook is analogous to @samp{TARGET_SCHED_DFA_POST_CYCLE_INSN} but used
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to change the state in more complicated situations - e.g. when advancing
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state on a single insn is not enough.
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@end deftypefn
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@deftypefn {Target Hook} int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD (void)
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This hook controls better choosing an insn from the ready insn queue
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for the @acronym{DFA}-based insn scheduler. Usually the scheduler
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@ -244,6 +244,9 @@ main (int argc, char **argv)
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printf (" DFA state. */\n");
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printf ("extern int cpu_unit_reservation_p (state_t, int);\n");
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printf ("#endif\n\n");
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printf ("/* The following function returns true if insn\n");
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printf (" has a dfa reservation. */\n");
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printf ("extern bool insn_has_dfa_reservation_p (rtx);\n\n");
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printf ("/* Clean insn code cache. It should be called if there\n");
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printf (" is a chance that condition value in a\n");
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printf (" define_insn_reservation will be changed after\n");
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@ -6859,6 +6859,8 @@ output_reserved_units_table_name (FILE *f, automaton_t automaton)
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#define CPU_UNIT_RESERVATION_P_FUNC_NAME "cpu_unit_reservation_p"
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#define INSN_HAS_DFA_RESERVATION_P_FUNC_NAME "insn_has_dfa_reservation_p"
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#define DFA_CLEAN_INSN_CACHE_FUNC_NAME "dfa_clean_insn_cache"
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#define DFA_CLEAR_SINGLE_INSN_CACHE_FUNC_NAME "dfa_clear_single_insn_cache"
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@ -8346,6 +8348,42 @@ output_cpu_unit_reservation_p (void)
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fprintf (output_file, " return 0;\n}\n\n");
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}
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/* The following function outputs a function to check if insn
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has a dfa reservation. */
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static void
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output_insn_has_dfa_reservation_p (void)
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{
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fprintf (output_file,
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"bool\n%s (rtx %s ATTRIBUTE_UNUSED)\n{\n",
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INSN_HAS_DFA_RESERVATION_P_FUNC_NAME,
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INSN_PARAMETER_NAME);
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if (DECL_INSN_RESERV (advance_cycle_insn_decl)->insn_num == 0)
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{
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fprintf (output_file, " return false;\n}\n\n");
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return;
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}
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fprintf (output_file, " int %s;\n\n", INTERNAL_INSN_CODE_NAME);
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fprintf (output_file, " if (%s == 0)\n %s = %s;\n",
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INSN_PARAMETER_NAME,
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INTERNAL_INSN_CODE_NAME, ADVANCE_CYCLE_VALUE_NAME);
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fprintf (output_file, " else\n\
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{\n\
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%s = %s (%s);\n\
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if (%s > %s)\n\
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%s = %s;\n\
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}\n\n",
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INTERNAL_INSN_CODE_NAME, DFA_INSN_CODE_FUNC_NAME,
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INSN_PARAMETER_NAME,
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INTERNAL_INSN_CODE_NAME, ADVANCE_CYCLE_VALUE_NAME,
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INTERNAL_INSN_CODE_NAME, ADVANCE_CYCLE_VALUE_NAME);
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fprintf (output_file, " return %s != %s;\n}\n\n",
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INTERNAL_INSN_CODE_NAME, ADVANCE_CYCLE_VALUE_NAME);
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}
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/* The function outputs PHR interface functions `dfa_clean_insn_cache'
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and 'dfa_clear_single_insn_cache'. */
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static void
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@ -9138,6 +9176,7 @@ write_automata (void)
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fprintf (output_file, "\n#if %s\n\n", CPU_UNITS_QUERY_MACRO_NAME);
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output_get_cpu_unit_code_func ();
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output_cpu_unit_reservation_p ();
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output_insn_has_dfa_reservation_p ();
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fprintf (output_file, "\n#endif /* #if %s */\n\n",
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CPU_UNITS_QUERY_MACRO_NAME);
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output_dfa_clean_insn_cache_func ();
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@ -1142,6 +1142,9 @@ adjust_priority (rtx prev)
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HAIFA_INLINE static void
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advance_one_cycle (void)
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{
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if (targetm.sched.dfa_pre_advance_cycle)
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targetm.sched.dfa_pre_advance_cycle ();
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if (targetm.sched.dfa_pre_cycle_insn)
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state_transition (curr_state,
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targetm.sched.dfa_pre_cycle_insn ());
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@ -1151,6 +1154,9 @@ advance_one_cycle (void)
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if (targetm.sched.dfa_post_cycle_insn)
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state_transition (curr_state,
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targetm.sched.dfa_post_cycle_insn ());
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if (targetm.sched.dfa_post_advance_cycle)
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targetm.sched.dfa_post_advance_cycle ();
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}
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/* Clock at which the previous instruction was issued. */
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@ -310,6 +310,8 @@
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#define TARGET_SCHED_DFA_PRE_CYCLE_INSN 0
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#define TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN 0
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#define TARGET_SCHED_DFA_POST_CYCLE_INSN 0
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#define TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE 0
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#define TARGET_SCHED_DFA_POST_ADVANCE_CYCLE 0
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD 0
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#define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD 0
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#define TARGET_SCHED_DFA_NEW_CYCLE 0
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@ -337,7 +339,9 @@
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TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN, \
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TARGET_SCHED_DFA_PRE_CYCLE_INSN, \
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TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN, \
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TARGET_SCHED_DFA_POST_CYCLE_INSN, \
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TARGET_SCHED_DFA_POST_CYCLE_INSN, \
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TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE, \
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TARGET_SCHED_DFA_POST_ADVANCE_CYCLE, \
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TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD, \
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TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD, \
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TARGET_SCHED_DFA_NEW_CYCLE, \
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@ -303,6 +303,13 @@ struct gcc_target
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void (* init_dfa_post_cycle_insn) (void);
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rtx (* dfa_post_cycle_insn) (void);
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/* The values of the following two members are pointers to
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functions used to simplify the automaton descriptions.
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dfa_pre_advance_cycle and dfa_post_advance_cycle are getting called
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immediatelly before and after cycle is advanced. */
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void (* dfa_pre_advance_cycle) (void);
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void (* dfa_post_advance_cycle) (void);
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/* The following member value is a pointer to a function returning value
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which defines how many insns in queue `ready' will we try for
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multi-pass scheduling. If the member value is nonzero and the
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