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i386.c (classify_argument): Use CEIL where applicable.
* config/i386/i386.c (classify_argument): Use CEIL where applicable. (ix86_function_arg_advance): Ditto. (ix86_function_arg): Ditto. (ix86_gimplify_va_arg): Ditto. (ix86_class_max_nregs): Ditto. (inline_memory_move_cost): Ditto. (ix86_set_reg_reg_cost): Ditto. * config/i386/i386.h (HARD_REGNO_NREGS): Ditto. From-SVN: r228776
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Uros Bizjak
Uros Bizjak
parent
e5c2c8d7af
commit
1a6e82b8c0
@ -1,9 +1,20 @@
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2015-10-13 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.c (classify_argument): Use CEIL where applicable.
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(ix86_function_arg_advance): Ditto.
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(ix86_function_arg): Ditto.
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(ix86_gimplify_va_arg): Ditto.
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(ix86_class_max_nregs): Ditto.
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(inline_memory_move_cost): Ditto.
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(ix86_set_reg_reg_cost): Ditto.
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* config/i386/i386.h (HARD_REGNO_NREGS): Ditto.
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2015-10-13 Alexandre Oliva <aoliva@redhat.com>
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PR middle-end/67912
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* expmed.c (store_bit_field_1): Adjust mode of BLKmode inputs.
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2015-10-12 Uros Bizjak <ubizjak@gmail.com>
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2015-10-13 Uros Bizjak <ubizjak@gmail.com>
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* config/sparc/sparc.h (SPARC_STACK_ALIGN): Implement using
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ROUND_UP macro and UNITS_PER_WORD * 2.
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@ -7925,8 +7925,7 @@ classify_argument (machine_mode mode, const_tree type,
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{
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HOST_WIDE_INT bytes =
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(mode == BLKmode) ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode);
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int words
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= (bytes + (bit_offset % 64) / 8 + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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int words = CEIL (bytes + (bit_offset % 64) / 8, UNITS_PER_WORD);
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/* Variable sized entities are always passed/returned in memory. */
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if (bytes < 0)
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@ -8791,7 +8790,7 @@ ix86_function_arg_advance (cumulative_args_t cum_v, machine_mode mode,
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bytes = int_size_in_bytes (type);
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else
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bytes = GET_MODE_SIZE (mode);
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words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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words = CEIL (bytes, UNITS_PER_WORD);
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if (type)
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mode = type_natural_mode (type, NULL, false);
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@ -9124,7 +9123,7 @@ ix86_function_arg (cumulative_args_t cum_v, machine_mode omode,
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bytes = int_size_in_bytes (type);
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else
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bytes = GET_MODE_SIZE (mode);
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words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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words = CEIL (bytes, UNITS_PER_WORD);
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/* To simplify the code below, represent vector types with a vector mode
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even if MMX/SSE are not active. */
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@ -10271,7 +10270,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p,
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if (indirect_p)
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type = build_pointer_type (type);
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size = int_size_in_bytes (type);
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rsize = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
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rsize = CEIL (size, UNITS_PER_WORD);
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nat_mode = type_natural_mode (type, NULL, false);
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switch (nat_mode)
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@ -42971,7 +42970,7 @@ ix86_class_max_nregs (reg_class_t rclass, machine_mode mode)
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else if (mode == XCmode)
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return (TARGET_64BIT ? 4 : 6);
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else
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return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD);
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return CEIL (GET_MODE_SIZE (mode), UNITS_PER_WORD);
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}
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else
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{
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@ -43130,8 +43129,7 @@ inline_memory_move_cost (machine_mode mode, enum reg_class regclass,
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cost = ix86_cost->int_load[2];
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else
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cost = ix86_cost->int_store[2];
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return (cost * (((int) GET_MODE_SIZE (mode)
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+ UNITS_PER_WORD - 1) / UNITS_PER_WORD));
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return cost * CEIL ((int) GET_MODE_SIZE (mode), UNITS_PER_WORD);
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}
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}
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@ -43417,7 +43415,7 @@ ix86_set_reg_reg_cost (machine_mode mode)
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/* Return the cost of moving between two registers of mode MODE,
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assuming that the move will be in pieces of at most UNITS bytes. */
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return COSTS_N_INSNS ((GET_MODE_SIZE (mode) + units - 1) / units);
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return COSTS_N_INSNS (CEIL (GET_MODE_SIZE (mode), units));
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}
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/* Compute a (partial) cost for rtx X. Return true if the complete
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@ -840,7 +840,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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#endif
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#else
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#define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
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x86_field_alignment (FIELD, COMPUTED)
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x86_field_alignment ((FIELD), (COMPUTED))
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#endif
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/* If defined, a C expression to compute the alignment given to a
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@ -928,7 +928,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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If this macro is not defined, then (ALIGN) will be used. */
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#define MINIMUM_ALIGNMENT(EXP, MODE, ALIGN) \
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ix86_minimum_alignment (EXP, MODE, ALIGN)
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ix86_minimum_alignment ((EXP), (MODE), (ALIGN))
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/* Set this nonzero if move instructions will actually fail to work
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@ -1084,9 +1084,9 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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? (COMPLEX_MODE_P (MODE) ? 2 : 1) \
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: ((MODE) == XFmode \
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? (TARGET_64BIT ? 2 : 3) \
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: (MODE) == XCmode \
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: ((MODE) == XCmode \
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? (TARGET_64BIT ? 4 : 6) \
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: ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
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: CEIL (GET_MODE_SIZE (MODE), UNITS_PER_WORD))))
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#define HARD_REGNO_NREGS_HAS_PADDING(REGNO, MODE) \
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((TARGET_128BIT_LONG_DOUBLE && !TARGET_64BIT) \
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@ -1188,7 +1188,8 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
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If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
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for any hard reg, then this must be 0 for correct output. */
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#define MODES_TIEABLE_P(MODE1, MODE2) ix86_modes_tieable_p (MODE1, MODE2)
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#define MODES_TIEABLE_P(MODE1, MODE2) \
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ix86_modes_tieable_p ((MODE1), (MODE2))
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/* It is possible to write patterns to move flags; but until someone
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does it, */
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@ -1462,7 +1463,7 @@ enum reg_class
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reg number REGNO. This could be a conditional expression
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or could index an array. */
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#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
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#define REGNO_REG_CLASS(REGNO) (regclass_map[(REGNO)])
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/* When this hook returns true for MODE, the compiler allows
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registers explicitly used in the rtl to be used as spill registers
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@ -1602,7 +1603,7 @@ enum reg_class
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and -8 for 64bit targets, we need to make sure all stack pointer adjustments
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are in multiple of 4 for 32bit targets and 8 for 64bit targets. */
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#define PUSH_ROUNDING(BYTES) ROUND_UP (BYTES, UNITS_PER_WORD)
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#define PUSH_ROUNDING(BYTES) ROUND_UP ((BYTES), UNITS_PER_WORD)
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/* If defined, the maximum amount of space required for outgoing arguments
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will be computed and placed into the variable `crtl->outgoing_args_size'.
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@ -1717,7 +1718,8 @@ typedef struct ix86_args {
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/* Output assembler code to FILE to increment profiler label # LABELNO
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for profiling a function entry. */
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#define FUNCTION_PROFILER(FILE, LABELNO) x86_function_profiler (FILE, LABELNO)
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#define FUNCTION_PROFILER(FILE, LABELNO) \
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x86_function_profiler ((FILE), (LABELNO))
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#define MCOUNT_NAME "_mcount"
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@ -2146,7 +2148,7 @@ extern int const x86_64_ms_sysv_extra_clobbered_registers[12];
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((COUNT) == 0 \
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? gen_rtx_MEM (Pmode, plus_constant (Pmode, arg_pointer_rtx, \
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-UNITS_PER_WORD)) \
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: gen_rtx_MEM (Pmode, plus_constant (Pmode, FRAME, UNITS_PER_WORD)))
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: gen_rtx_MEM (Pmode, plus_constant (Pmode, (FRAME), UNITS_PER_WORD)))
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/* PC is dbx register 8; let's use that column for RA. */
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#define DWARF_FRAME_RETURN_COLUMN (TARGET_64BIT ? 16 : 8)
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@ -2242,7 +2244,7 @@ do { \
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#undef ASM_OUTPUT_FUNCTION_LABEL
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#define ASM_OUTPUT_FUNCTION_LABEL(FILE, NAME, DECL) \
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ix86_asm_output_function_label (FILE, NAME, DECL)
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ix86_asm_output_function_label ((FILE), (NAME), (DECL))
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/* Under some conditions we need jump tables in the text section,
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because the assembler cannot handle label differences between
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@ -2402,9 +2404,9 @@ enum avx_u128_state
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Don't rename evex to non-evex sse registers. */
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#define HARD_REGNO_RENAME_OK(SRC, TARGET) (!STACK_REGNO_P (SRC) && \
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(EXT_REX_SSE_REGNO_P (SRC) == \
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EXT_REX_SSE_REGNO_P (TARGET)))
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#define HARD_REGNO_RENAME_OK(SRC, TARGET) \
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(!STACK_REGNO_P (SRC) \
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&& EXT_REX_SSE_REGNO_P (SRC) == EXT_REX_SSE_REGNO_P (TARGET))
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#define FASTCALL_PREFIX '@'
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