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re PR target/14406 (rs6000 abstf2 is broken)
PR target/14406 * config/rs6000/rs6000.md (abstf2, abstf2+1): Delete define_insn. (abstf2, abstf2_internal): New define_expand. From-SVN: r78896
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@ -1,3 +1,9 @@
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2004-03-04 Alan Modra <amodra@bigpond.net.au>
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PR target/14406
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* config/rs6000/rs6000.md (abstf2, abstf2+1): Delete define_insn.
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(abstf2, abstf2_internal): New define_expand.
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2004-03-04 Eric Botcazou <ebotcazou@libertysurf.fr>
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PR optimization/14235
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@ -8375,35 +8375,40 @@
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[(set_attr "type" "fp")
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(set_attr "length" "8")])
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(define_insn "abstf2"
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(define_expand "abstf2"
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[(set (match_operand:TF 0 "gpc_reg_operand" "=f")
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(abs:TF (match_operand:TF 1 "gpc_reg_operand" "f")))]
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"(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
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&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
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"*
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"
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{
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if (REGNO (operands[0]) == REGNO (operands[1]) + 1)
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return \"fabs %L0,%L1\;fabs %0,%1\";
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else
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return \"fabs %0,%1\;fabs %L0,%L1\";
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}"
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[(set_attr "type" "fp")
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(set_attr "length" "8")])
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rtx label = gen_label_rtx ();
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emit_insn (gen_abstf2_internal (operands[0], operands[1], label));
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emit_label (label);
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DONE;
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}")
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(define_insn ""
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(define_expand "abstf2_internal"
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[(set (match_operand:TF 0 "gpc_reg_operand" "=f")
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(neg:TF (abs:TF (match_operand:TF 1 "gpc_reg_operand" "f"))))]
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(match_operand:TF 1 "gpc_reg_operand" "f"))
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(set (match_dup 3) (match_dup 5))
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(set (match_dup 5) (abs:DF (match_dup 5)))
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(set (match_dup 4) (compare:CCFP (match_dup 3) (match_dup 5)))
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(set (pc) (if_then_else (eq (match_dup 4) (const_int 0))
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(label_ref (match_operand 2 "" ""))
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(pc)))
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(set (match_dup 6) (neg:DF (match_dup 6)))]
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"(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN)
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&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
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"*
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"
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{
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if (REGNO (operands[0]) == REGNO (operands[1]) + 1)
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return \"fnabs %L0,%L1\;fnabs %0,%1\";
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else
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return \"fnabs %0,%1\;fnabs %L0,%L1\";
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}"
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[(set_attr "type" "fp")
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(set_attr "length" "8")])
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const int hi_word = FLOAT_WORDS_BIG_ENDIAN ? 0 : GET_MODE_SIZE (DFmode);
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const int lo_word = FLOAT_WORDS_BIG_ENDIAN ? GET_MODE_SIZE (DFmode) : 0;
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operands[3] = gen_reg_rtx (DFmode);
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operands[4] = gen_reg_rtx (CCFPmode);
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operands[5] = simplify_gen_subreg (DFmode, operands[0], TFmode, hi_word);
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operands[6] = simplify_gen_subreg (DFmode, operands[0], TFmode, lo_word);
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}")
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;; Next come the multi-word integer load and store and the load and store
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;; multiple insns.
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