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mips.c (TARGET_SCHED_INIT): Define.
2007-08-10 Sandra Loosemore <sandra@codesourcery.com> David Ung <davidu@mips.com> gcc/ * config/mips/mips.c (TARGET_SCHED_INIT): Define. (TARGET_SCHED_REORDER2): Define. (mips_maybe_swap_ready): New. (mips_last_74k_agen_insn): New. (mips_74k_agen_init): New. (mips_74k_agen_reorder): New function to group loads and stores in the ready queue. (mips_sched_init): New. (mips_sched_reorder): Don't do initialization here. Call mips_74k_agen_reorder. (mips_variable_issue): Call mips_74k_agen_init. Co-Authored-By: David Ung <davidu@mips.com> From-SVN: r127341
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@ -1,3 +1,18 @@
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2007-08-10 Sandra Loosemore <sandra@codesourcery.com>
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David Ung <davidu@mips.com>
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* config/mips/mips.c (TARGET_SCHED_INIT): Define.
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(TARGET_SCHED_REORDER2): Define.
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(mips_maybe_swap_ready): New.
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(mips_last_74k_agen_insn): New.
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(mips_74k_agen_init): New.
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(mips_74k_agen_reorder): New function to group loads and stores
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in the ready queue.
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(mips_sched_init): New.
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(mips_sched_reorder): Don't do initialization here. Call
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mips_74k_agen_reorder.
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(mips_variable_issue): Call mips_74k_agen_init.
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2007-08-10 Aldy Hernandez <aldyh@redhat.com>
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* tree-flow-inline.h (get_filename): Remove.
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@ -390,6 +390,7 @@ static bool vr4130_true_reg_dependence_p (rtx);
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static bool vr4130_swap_insns_p (rtx, rtx);
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static void vr4130_reorder (rtx *, int);
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static void mips_promote_ready (rtx *, int, int);
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static void mips_sched_init (FILE *, int, int);
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static int mips_sched_reorder (FILE *, int, rtx *, int *, int);
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static int mips_variable_issue (FILE *, int, rtx, int);
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static int mips_adjust_cost (rtx, rtx, rtx, int);
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@ -1220,8 +1221,12 @@ static const unsigned char mips16e_save_restore_regs[] = {
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#undef TARGET_ASM_FUNCTION_RODATA_SECTION
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#define TARGET_ASM_FUNCTION_RODATA_SECTION mips_function_rodata_section
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#undef TARGET_SCHED_INIT
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#define TARGET_SCHED_INIT mips_sched_init
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#undef TARGET_SCHED_REORDER
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#define TARGET_SCHED_REORDER mips_sched_reorder
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#undef TARGET_SCHED_REORDER2
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#define TARGET_SCHED_REORDER2 mips_sched_reorder
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#undef TARGET_SCHED_VARIABLE_ISSUE
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#define TARGET_SCHED_VARIABLE_ISSUE mips_variable_issue
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#undef TARGET_SCHED_ADJUST_COST
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@ -11000,26 +11005,125 @@ mips_promote_ready (rtx *ready, int lower, int higher)
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ready[i] = new_head;
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}
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/* Implement TARGET_SCHED_REORDER. */
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/* If the priority of the instruction at POS2 in the ready queue READY
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is within LIMIT units of that of the instruction at POS1, swap the
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instructions if POS2 is not already less than POS1. */
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static void
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mips_maybe_swap_ready (rtx *ready, int pos1, int pos2, int limit)
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{
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if (pos1 < pos2
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&& INSN_PRIORITY (ready[pos1]) + limit >= INSN_PRIORITY (ready[pos2]))
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{
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rtx temp;
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temp = ready[pos1];
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ready[pos1] = ready[pos2];
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ready[pos2] = temp;
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}
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}
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/* Record whether last 74k AGEN instruction was a load or store. */
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static enum attr_type mips_last_74k_agen_insn = TYPE_UNKNOWN;
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/* Initialize mips_last_74k_agen_insn from INSN. A null argument
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resets to TYPE_UNKNOWN state. */
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static void
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mips_74k_agen_init (rtx insn)
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{
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if (!insn || !NONJUMP_INSN_P (insn))
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mips_last_74k_agen_insn = TYPE_UNKNOWN;
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else if (USEFUL_INSN_P (insn))
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{
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enum attr_type type = get_attr_type (insn);
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if (type == TYPE_LOAD || type == TYPE_STORE)
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mips_last_74k_agen_insn = type;
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}
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}
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/* A TUNE_74K helper function. The 74K AGEN pipeline likes multiple
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loads to be grouped together, and multiple stores to be grouped
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together. Swap things around in the ready queue to make this happen. */
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static void
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mips_74k_agen_reorder (rtx *ready, int nready)
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{
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int i;
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int store_pos, load_pos;
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store_pos = -1;
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load_pos = -1;
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for (i = nready - 1; i >= 0; i--)
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{
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rtx insn = ready[i];
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if (USEFUL_INSN_P (insn))
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switch (get_attr_type (insn))
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{
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case TYPE_STORE:
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if (store_pos == -1)
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store_pos = i;
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break;
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case TYPE_LOAD:
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if (load_pos == -1)
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load_pos = i;
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break;
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default:
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break;
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}
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}
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if (load_pos == -1 || store_pos == -1)
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return;
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switch (mips_last_74k_agen_insn)
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{
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case TYPE_UNKNOWN:
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/* Prefer to schedule loads since they have a higher latency. */
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case TYPE_LOAD:
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/* Swap loads to the front of the queue. */
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mips_maybe_swap_ready (ready, load_pos, store_pos, 4);
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break;
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case TYPE_STORE:
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/* Swap stores to the front of the queue. */
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mips_maybe_swap_ready (ready, store_pos, load_pos, 4);
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break;
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default:
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break;
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}
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}
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/* Implement TARGET_SCHED_INIT. */
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static void
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mips_sched_init (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
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int max_ready ATTRIBUTE_UNUSED)
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{
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mips_macc_chains_last_hilo = 0;
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vr4130_last_insn = 0;
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mips_74k_agen_init (NULL_RTX);
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}
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/* Implement TARGET_SCHED_REORDER and TARG_SCHED_REORDER2. */
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static int
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mips_sched_reorder (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
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rtx *ready, int *nreadyp, int cycle)
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{
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if (!reload_completed && TUNE_MACC_CHAINS)
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{
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if (cycle == 0)
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mips_macc_chains_last_hilo = 0;
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if (*nreadyp > 0)
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mips_macc_chains_reorder (ready, *nreadyp);
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}
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if (reload_completed && TUNE_MIPS4130 && !TARGET_VR4130_ALIGN)
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{
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if (cycle == 0)
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vr4130_last_insn = 0;
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if (*nreadyp > 1)
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vr4130_reorder (ready, *nreadyp);
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}
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if (!reload_completed
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&& TUNE_MACC_CHAINS
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&& *nreadyp > 0)
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mips_macc_chains_reorder (ready, *nreadyp);
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if (reload_completed
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&& TUNE_MIPS4130
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&& !TARGET_VR4130_ALIGN
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&& *nreadyp > 1)
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vr4130_reorder (ready, *nreadyp);
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if (TUNE_74K)
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mips_74k_agen_reorder (ready, *nreadyp);
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return mips_issue_rate ();
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}
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@ -11029,6 +11133,8 @@ static int
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mips_variable_issue (FILE *file ATTRIBUTE_UNUSED, int verbose ATTRIBUTE_UNUSED,
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rtx insn, int more)
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{
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if (TUNE_74K)
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mips_74k_agen_init (insn);
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switch (GET_CODE (PATTERN (insn)))
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{
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case USE:
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