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RISC-V: Add VLS to mask vec_extract [PR114668].

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This adds the missing VLS modes to the mask extract expanders.

gcc/ChangeLog:

	PR target/114668

	* config/riscv/autovec.md: Add VLS.

gcc/testsuite/ChangeLog:

	* gcc.target/riscv/rvv/autovec/pr114668.c: New test.
This commit is contained in:
Robin Dapp 2024-04-15 12:44:56 +02:00
parent 9d573f71e8
commit 02cc8f3e68
2 changed files with 37 additions and 2 deletions
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4
gcc/config/riscv/autovec.md
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@ -1427,7 +1427,7 @@
(define_expand "vec_extract<mode>qi"
[(set (match_operand:QI 0 "register_operand")
(vec_select:QI
(match_operand:VB 1 "register_operand")
(match_operand:VB_VLS 1 "register_operand")
(parallel
[(match_operand 2 "nonmemory_operand")])))]
"TARGET_VECTOR"
@ -1453,7 +1453,7 @@
(define_expand "vec_extract<mode>bi"
[(set (match_operand:QI 0 "register_operand")
(vec_select:QI
(match_operand:VB 1 "register_operand")
(match_operand:VB_VLS 1 "register_operand")
(parallel
[(match_operand 2 "nonmemory_operand")])))]
"TARGET_VECTOR"

35
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr114668.c Normal file
View File

@ -0,0 +1,35 @@
/* { dg-do run } */
/* { dg-require-effective-target riscv_v } */
/* { dg-options { -O3 -fno-vect-cost-model -march=rv64gcv -mabi=lp64d } } */
char a;
int b;
short e[14];
char f[4][12544];
_Bool c[4][5];
__attribute__ ((noipa))
void foo (int a)
{
if (a != 1)
__builtin_abort ();
}
int main ()
{
for (int i = 0; i < 4; ++i)
for (int l = 0; l < 15; ++l)
for (int m = 0; m < 15; ++m)
f[i][l * m] = 3;
for (int j = 0; j < 4; j += 1)
for (int k = 3; k < 13; k += 3)
for (_Bool l = 0; l < 1; l = 1)
for (int m = 0; m < 4; m += 1)
{
a = 0;
b -= e[k];
c[j][m] = f[j][6];
}
for (long i = 2; i < 4; ++i)
foo (c[3][3]);
}