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c.opt: Add -flax-vector-conversions.
gcc/ * c.opt: Add -flax-vector-conversions. * c-typeck.c (convert_for_assignment): Pass flag to vector_types_convertible_p to allow emission of note. (digest_init): Likewise. (comptypes_internal): Use vector_types_convertible_p. * c-opts.c: Handle -flax-vector-conversions. * c-common.c (flag_lax_vector_conversions): New. (vector_types_convertible_p): Unless -flax-vector conversions has been passed, disallow conversions between vectors with differing numbers of subparts and/or element types. If such a conversion is disallowed, possibly emit a note on the first occasion only to inform the user of -flax-vector-conversions. The new last argument specifies this. * c-common.h (flag_lax_vector_conversions): New. (vector_types_convertible_p): Add extra argument. * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use char_type_node for V*QI type vectors. * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Update to satisfy new typechecking rules. * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge. * doc/invoke.texi (C Dialect Options): Document -flax-vector-conversions. gcc/cp/ * call.c (standard_conversion): Pass flag to vector_types_convertible_p to disallow emission of note. * typeck.c (convert_for_assignment): Pass flag to vector_types_convertible_p to allow emission of note. (ptr_reasonably_similar): Pass flag to vector_types_convertible_p to disallow emission of note. gcc/testsuite/ * gcc.target/i386/20020531-1.c: Use "char" not "unsigned char" in __v8qi typedef. * gcc.target/powerpc/altivec-vec-merge.c (foo): Add casts. * gcc.dg/simd-1.c: Update dg-error directives to reflect new compiler behaviour. * gcc.dg/simd-5.c: Likewise. * gcc.dg/simd-6.c: Likewise. * g++.dg/conversion/simd1.C: Likewise. * g++.dg/conversion/simd3.C: Likewise. * g++.dg/ext/attribute-test-2.C (data): Add "vs" member. (main): Use it. From-SVN: r120572
This commit is contained in:
Mark Shinwell
Mark Shinwell
parent
46e3b90f7e
commit
00c8e9f613
@ -1,3 +1,28 @@
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2007-01-08 Mark Shinwell <shinwell@codesourcery.com>
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* c.opt: Add -flax-vector-conversions.
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* c-typeck.c (convert_for_assignment): Pass flag to
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vector_types_convertible_p to allow emission of note.
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(digest_init): Likewise.
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* c-opts.c: Handle -flax-vector-conversions.
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* c-common.c (flag_lax_vector_conversions): New.
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(vector_types_convertible_p): Unless -flax-vector conversions
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has been passed, disallow conversions between vectors with
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differing numbers of subparts and/or element types. If such
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a conversion is disallowed, possibly emit a note on the first
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occasion only to inform the user of -flax-vector-conversions.
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The new last argument specifies this.
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* c-common.h (flag_lax_vector_conversions): New.
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(vector_types_convertible_p): Add extra argument.
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* config/i386/i386.c (ix86_init_mmx_sse_builtins): Use
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char_type_node for V*QI type vectors.
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* config/rs6000/rs6000-c.c (altivec_overloaded_builtins):
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Update to satisfy new typechecking rules.
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* config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both
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C and C++ variants.
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* doc/invoke.texi (C Dialect Options): Document
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-flax-vector-conversions.
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2007-01-08 Mark Shinwell <shinwell@codesourcery.com>
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PR tree-optimization/29877
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@ -254,6 +254,10 @@ int flag_short_double;
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int flag_short_wchar;
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/* Nonzero means allow implicit conversions between vectors with
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differing numbers of subparts and/or differing element types. */
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int flag_lax_vector_conversions;
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/* Nonzero means allow Microsoft extensions without warnings or errors. */
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int flag_ms_extensions;
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@ -1078,19 +1082,40 @@ check_main_parameter_types (tree decl)
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pedwarn ("%q+D takes only zero or two arguments", decl);
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}
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/* Nonzero if vector types T1 and T2 can be converted to each other
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without an explicit cast. */
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int
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vector_types_convertible_p (tree t1, tree t2)
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/* True if vector types T1 and T2 can be converted to each other
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without an explicit cast. If EMIT_LAX_NOTE is true, and T1 and T2
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can only be converted with -flax-vector-conversions yet that is not
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in effect, emit a note telling the user about that option if such
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a note has not previously been emitted. */
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bool
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vector_types_convertible_p (tree t1, tree t2, bool emit_lax_note)
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{
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return targetm.vector_opaque_p (t1)
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|| targetm.vector_opaque_p (t2)
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|| (tree_int_cst_equal (TYPE_SIZE (t1), TYPE_SIZE (t2))
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&& (TREE_CODE (TREE_TYPE (t1)) != REAL_TYPE ||
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TYPE_PRECISION (t1) == TYPE_PRECISION (t2))
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&& INTEGRAL_TYPE_P (TREE_TYPE (t1))
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== INTEGRAL_TYPE_P (TREE_TYPE (t2)));
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static bool emitted_lax_note = false;
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bool convertible_lax =
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targetm.vector_opaque_p (t1)
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|| targetm.vector_opaque_p (t2)
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|| (tree_int_cst_equal (TYPE_SIZE (t1), TYPE_SIZE (t2))
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&& (TREE_CODE (TREE_TYPE (t1)) != REAL_TYPE ||
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TYPE_PRECISION (t1) == TYPE_PRECISION (t2))
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&& INTEGRAL_TYPE_P (TREE_TYPE (t1))
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== INTEGRAL_TYPE_P (TREE_TYPE (t2)));
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if (!convertible_lax || flag_lax_vector_conversions)
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return convertible_lax;
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if (TYPE_VECTOR_SUBPARTS (t1) == TYPE_VECTOR_SUBPARTS (t2)
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&& comptypes (TREE_TYPE (t1), TREE_TYPE (t2)))
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return true;
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if (emit_lax_note && !emitted_lax_note)
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{
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emitted_lax_note = true;
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inform ("use -flax-vector-conversions to permit "
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"conversions between vectors with differing "
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"element types or numbers of subparts");
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}
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return false;
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}
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/* Warns if the conversion of EXPR to TYPE may alter a value.
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@ -392,6 +392,10 @@ extern int flag_short_double;
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extern int flag_short_wchar;
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/* Nonzero means allow implicit conversions between vectors with
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differing numbers of subparts and/or differing element types. */
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extern int flag_lax_vector_conversions;
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/* Nonzero means allow Microsoft extensions without warnings or errors. */
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extern int flag_ms_extensions;
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@ -801,7 +805,7 @@ extern tree finish_label_address_expr (tree);
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extern tree lookup_label (tree);
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extern tree lookup_name (tree);
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extern int vector_types_convertible_p (tree t1, tree t2);
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extern bool vector_types_convertible_p (tree t1, tree t2, bool emit_lax_note);
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extern rtx c_expand_expr (tree, rtx, enum machine_mode, int, rtx *);
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@ -705,6 +705,10 @@ c_common_handle_option (size_t scode, const char *arg, int value)
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flag_implicit_templates = value;
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break;
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case OPT_flax_vector_conversions:
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flag_lax_vector_conversions = value;
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break;
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case OPT_fms_extensions:
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flag_ms_extensions = value;
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break;
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@ -3873,7 +3873,7 @@ convert_for_assignment (tree type, tree rhs, enum impl_conv errtype,
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}
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/* Some types can interconvert without explicit casts. */
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else if (codel == VECTOR_TYPE && coder == VECTOR_TYPE
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&& vector_types_convertible_p (type, TREE_TYPE (rhs)))
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&& vector_types_convertible_p (type, TREE_TYPE (rhs), true))
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return convert (type, rhs);
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/* Arithmetic types all interconvert, and enum is treated like int. */
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else if ((codel == INTEGER_TYPE || codel == REAL_TYPE
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@ -4604,7 +4604,7 @@ digest_init (tree type, tree init, bool strict_string, int require_constant)
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below and handle as a constructor. */
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if (code == VECTOR_TYPE
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&& TREE_CODE (TREE_TYPE (inside_init)) == VECTOR_TYPE
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&& vector_types_convertible_p (TREE_TYPE (inside_init), type)
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&& vector_types_convertible_p (TREE_TYPE (inside_init), type, true)
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&& TREE_CONSTANT (inside_init))
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{
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if (TREE_CODE (inside_init) == VECTOR_CST
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@ -583,6 +583,10 @@ Inject friend functions into enclosing namespace
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flabels-ok
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C++ ObjC++
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flax-vector-conversions
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C ObjC C++ ObjC++
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Allow implicit conversions between vectors with differing numbers of subparts and/or differing element types.
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fms-extensions
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C ObjC C++ ObjC++
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Don't warn about uses of Microsoft extensions
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@ -15998,7 +15998,7 @@ ix86_init_mmx_sse_builtins (void)
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const struct builtin_description * d;
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size_t i;
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tree V16QI_type_node = build_vector_type_for_mode (intQI_type_node, V16QImode);
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tree V16QI_type_node = build_vector_type_for_mode (char_type_node, V16QImode);
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tree V2SI_type_node = build_vector_type_for_mode (intSI_type_node, V2SImode);
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tree V2SF_type_node = build_vector_type_for_mode (float_type_node, V2SFmode);
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tree V2DI_type_node
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@ -16007,7 +16007,7 @@ ix86_init_mmx_sse_builtins (void)
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tree V4SF_type_node = build_vector_type_for_mode (float_type_node, V4SFmode);
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tree V4SI_type_node = build_vector_type_for_mode (intSI_type_node, V4SImode);
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tree V4HI_type_node = build_vector_type_for_mode (intHI_type_node, V4HImode);
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tree V8QI_type_node = build_vector_type_for_mode (intQI_type_node, V8QImode);
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tree V8QI_type_node = build_vector_type_for_mode (char_type_node, V8QImode);
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tree V8HI_type_node = build_vector_type_for_mode (intHI_type_node, V8HImode);
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tree pchar_type_node = build_pointer_type (char_type_node);
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@ -332,7 +332,7 @@ NAME (T a1, U a2) \
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__altivec_binary_pred(vec_cmplt,
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__builtin_vec_cmpgt (a2, a1))
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__altivec_binary_pred(vec_cmple,
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__builtin_altivec_cmpge (a2, a1))
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__builtin_vec_cmpge (a2, a1))
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__altivec_scalar_pred(vec_all_in,
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__builtin_altivec_vcmpbfp_p (__CR6_EQ, a1, a2))
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@ -402,7 +402,7 @@ __altivec_scalar_pred(vec_any_nle,
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#undef __altivec_binary_pred
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#else
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#define vec_cmplt(a1, a2) __builtin_vec_cmpgt ((a2), (a1))
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#define vec_cmple(a1, a2) __builtin_altivec_vcmpgefp ((a2), (a1))
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#define vec_cmple(a1, a2) __builtin_vec_cmpge ((a2), (a1))
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#define vec_all_in(a1, a2) __builtin_altivec_vcmpbfp_p (__CR6_EQ, (a1), (a2))
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#define vec_any_out(a1, a2) __builtin_altivec_vcmpbfp_p (__CR6_EQ_REV, (a1), (a2))
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@ -224,17 +224,17 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKH, ALTIVEC_BUILTIN_VUPKHPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHSH, ALTIVEC_BUILTIN_VUPKHSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHPX, ALTIVEC_BUILTIN_VUPKHPX,
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@ -242,17 +242,17 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKHSB, ALTIVEC_BUILTIN_VUPKHSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_pixel_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_UNPACKL, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
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RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLPX, ALTIVEC_BUILTIN_VUPKLPX,
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@ -260,11 +260,11 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLSH, ALTIVEC_BUILTIN_VUPKLSH,
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RS6000_BTI_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V8HI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_V16QI, 0, 0 },
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{ ALTIVEC_BUILTIN_VEC_VUPKLSB, ALTIVEC_BUILTIN_VUPKLSB,
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RS6000_BTI_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V16QI, 0, 0 },
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/* Binary AltiVec builtins. */
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{ ALTIVEC_BUILTIN_VEC_ADD, ALTIVEC_BUILTIN_VADDUBM,
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@ -578,31 +578,23 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
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{ ALTIVEC_BUILTIN_VEC_CMPEQ, ALTIVEC_BUILTIN_VCMPEQFP,
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQFP, ALTIVEC_BUILTIN_VCMPEQFP,
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RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUW, ALTIVEC_BUILTIN_VCMPEQUW,
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RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUH, ALTIVEC_BUILTIN_VCMPEQUH,
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RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
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RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
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RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
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{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPEQUB, ALTIVEC_BUILTIN_VCMPEQUB,
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
|
||||
{ ALTIVEC_BUILTIN_VEC_CMPGE, ALTIVEC_BUILTIN_VCMPGEFP,
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTUB,
|
||||
@ -620,29 +612,29 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
|
||||
{ ALTIVEC_BUILTIN_VEC_CMPGT, ALTIVEC_BUILTIN_VCMPGTFP,
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTFP, ALTIVEC_BUILTIN_VCMPGTFP,
|
||||
RS6000_BTI_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
|
||||
RS6000_BTI_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSW, ALTIVEC_BUILTIN_VCMPGTSW,
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
|
||||
RS6000_BTI_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUW, ALTIVEC_BUILTIN_VCMPGTUW,
|
||||
RS6000_BTI_bool_V4SI, RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
|
||||
RS6000_BTI_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSH, ALTIVEC_BUILTIN_VCMPGTSH,
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
|
||||
RS6000_BTI_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUH, ALTIVEC_BUILTIN_VCMPGTUH,
|
||||
RS6000_BTI_bool_V8HI, RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
|
||||
RS6000_BTI_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTSB, ALTIVEC_BUILTIN_VCMPGTSB,
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
|
||||
RS6000_BTI_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_VCMPGTUB, ALTIVEC_BUILTIN_VCMPGTUB,
|
||||
RS6000_BTI_bool_V16QI, RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0 },
|
||||
{ ALTIVEC_BUILTIN_VEC_CMPLE, ALTIVEC_BUILTIN_VCMPGEFP,
|
||||
|
||||
@ -1,3 +1,12 @@
|
||||
2007-01-08 Mark Shinwell <shinwell@codesourcery.com>
|
||||
|
||||
* call.c (standard_conversion): Pass flag to
|
||||
vector_types_convertible_p to disallow emission of note.
|
||||
* typeck.c (convert_for_assignment): Pass flag to
|
||||
vector_types_convertible_p to allow emission of note.
|
||||
(ptr_reasonably_similar): Pass flag to vector_types_convertible_p
|
||||
to disallow emission of note.
|
||||
|
||||
2007-01-07 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
|
||||
|
||||
PR c++/28986
|
||||
|
||||
@ -842,7 +842,7 @@ standard_conversion (tree to, tree from, tree expr, bool c_cast_p,
|
||||
conv->rank = cr_promotion;
|
||||
}
|
||||
else if (fcode == VECTOR_TYPE && tcode == VECTOR_TYPE
|
||||
&& vector_types_convertible_p (from, to))
|
||||
&& vector_types_convertible_p (from, to, false))
|
||||
return build_conv (ck_std, to, conv);
|
||||
else if (!(flags & LOOKUP_CONSTRUCTOR_CALLABLE)
|
||||
&& IS_AGGR_TYPE (to) && IS_AGGR_TYPE (from)
|
||||
|
||||
@ -6296,7 +6296,7 @@ convert_for_assignment (tree type, tree rhs,
|
||||
coder = TREE_CODE (rhstype);
|
||||
|
||||
if (TREE_CODE (type) == VECTOR_TYPE && coder == VECTOR_TYPE
|
||||
&& vector_types_convertible_p (type, rhstype))
|
||||
&& vector_types_convertible_p (type, rhstype, true))
|
||||
return convert (type, rhs);
|
||||
|
||||
if (rhs == error_mark_node || rhstype == error_mark_node)
|
||||
@ -6863,7 +6863,7 @@ ptr_reasonably_similar (tree to, tree from)
|
||||
continue;
|
||||
|
||||
if (TREE_CODE (to) == VECTOR_TYPE
|
||||
&& vector_types_convertible_p (to, from))
|
||||
&& vector_types_convertible_p (to, from, false))
|
||||
return 1;
|
||||
|
||||
if (TREE_CODE (to) == INTEGER_TYPE
|
||||
|
||||
@ -169,7 +169,7 @@ in the following sections.
|
||||
-fno-asm -fno-builtin -fno-builtin-@var{function} @gol
|
||||
-fhosted -ffreestanding -fopenmp -fms-extensions @gol
|
||||
-trigraphs -no-integrated-cpp -traditional -traditional-cpp @gol
|
||||
-fallow-single-precision -fcond-mismatch @gol
|
||||
-fallow-single-precision -fcond-mismatch -flax-vector-conversions @gol
|
||||
-fsigned-bitfields -fsigned-char @gol
|
||||
-funsigned-bitfields -funsigned-char}
|
||||
|
||||
@ -1381,6 +1381,12 @@ Allow conditional expressions with mismatched types in the second and
|
||||
third arguments. The value of such an expression is void. This option
|
||||
is not supported for C++.
|
||||
|
||||
@item -flax-vector-conversions
|
||||
@opindex flax-vector-conversions
|
||||
Allow implicit conversions between vectors with differing numbers of
|
||||
elements and/or incompatible element types. This option should not be
|
||||
used for new code.
|
||||
|
||||
@item -funsigned-char
|
||||
@opindex funsigned-char
|
||||
Let the type @code{char} be unsigned, like @code{unsigned char}.
|
||||
|
||||
@ -1,3 +1,17 @@
|
||||
2007-01-08 Mark Shinwell <shinwell@codesourcery.com>
|
||||
|
||||
* gcc.target/i386/20020531-1.c: Use "char" not "unsigned char"
|
||||
in __v8qi typedef.
|
||||
* gcc.target/powerpc/altivec-vec-merge.c (foo): Add casts.
|
||||
* gcc.dg/simd-1.c: Update dg-error directives to reflect new
|
||||
compiler behaviour.
|
||||
* gcc.dg/simd-5.c: Likewise.
|
||||
* gcc.dg/simd-6.c: Likewise.
|
||||
* g++.dg/conversion/simd1.C: Likewise.
|
||||
* g++.dg/conversion/simd3.C: Likewise.
|
||||
* g++.dg/ext/attribute-test-2.C (data): Add "vs" member.
|
||||
(main): Use it.
|
||||
|
||||
2007-01-08 Mark Shinwell <shinwell@codesourcery.com>
|
||||
|
||||
PR tree-optimization/29877
|
||||
|
||||
@ -5,9 +5,9 @@
|
||||
|
||||
#define vector __attribute__((vector_size(16)))
|
||||
|
||||
vector signed int vld (int a1, const vector signed int *a2) { return *a2; } /* { dg-error "near match" } */
|
||||
vector signed int vld (int a1, const vector signed int *a2) { return *a2; } /* { dg-error "vld" } */
|
||||
/* { dg-warning "vector returned by ref" "" { target { powerpc*-*-linux* && ilp32 } } 8 } */
|
||||
vector signed short vld (int a1, const vector signed short *a2) { return *a2; } /* { dg-error "near match" } */
|
||||
vector signed short vld (int a1, const vector signed short *a2) { return *a2; } /* { dg-error "vld" } */
|
||||
|
||||
extern int i;
|
||||
extern vector signed short vss;
|
||||
@ -17,7 +17,7 @@ extern const vector signed short *cvssp;
|
||||
|
||||
void foo ()
|
||||
{
|
||||
vss = vld(i, vscp); /* { dg-error "no match" } */
|
||||
vss = vld(i, vscp); /* { dg-error "no matching function for call" } */
|
||||
vss = vld(i, vssp);
|
||||
vss = vld(i, cvssp);
|
||||
}
|
||||
|
||||
@ -10,6 +10,6 @@ unsigned int __attribute__((vector_size(16))) e;
|
||||
void foo()
|
||||
{
|
||||
b + d; /* { dg-error "invalid operands to binary" } */
|
||||
d += e;
|
||||
d += e; /* { dg-error "use -flax-vector-conversions to permit conversions between vectors with differing element types or numbers of subparts.*cannot convert 'unsigned int __vector__' to 'int __vector__' in assignment" } */
|
||||
d2 += d;
|
||||
}
|
||||
|
||||
@ -15,8 +15,8 @@ public:
|
||||
return (__attribute__((vector_size(16))) short) vec;
|
||||
}
|
||||
|
||||
operator __attribute__((vector_size(16))) int (void) {
|
||||
return (__attribute__((vector_size(16))) int) vec1;
|
||||
operator __attribute__((vector_size(16))) unsigned int (void) {
|
||||
return (__attribute__((vector_size(16))) unsigned int) vec1;
|
||||
}
|
||||
|
||||
vector_holder () {
|
||||
@ -30,6 +30,7 @@ public:
|
||||
union u {
|
||||
char f[16];
|
||||
vector unsigned int v;
|
||||
vector short vs;
|
||||
} data;
|
||||
|
||||
|
||||
@ -37,10 +38,10 @@ vector_holder vh;
|
||||
|
||||
int main()
|
||||
{
|
||||
data.v = (__attribute__((vector_size(16))) short) vh;
|
||||
data.vs = (__attribute__((vector_size(16))) short) vh;
|
||||
if (data.f[0] != 'a' || data.f[15] != 'd')
|
||||
abort();
|
||||
data.v = (__attribute__((vector_size(16))) int) vh;
|
||||
data.v = (__attribute__((vector_size(16))) unsigned int) vh;
|
||||
if (data.f[0] != 'm' || data.f[15] != 'p')
|
||||
abort();
|
||||
|
||||
|
||||
@ -32,7 +32,7 @@ hanneke ()
|
||||
e = (typeof (e)) a;
|
||||
|
||||
/* Different signed SIMD assignment. */
|
||||
f = a;
|
||||
f = a; /* { dg-error "use -flax-vector-conversions to permit conversions between vectors with differing element types or numbers of subparts.*35: error: incompatible types in assignment" } */
|
||||
|
||||
/* Casted different signed SIMD assignment. */
|
||||
f = (uv4si) a;
|
||||
|
||||
@ -4,4 +4,4 @@
|
||||
/* Ensure that we don't need a typedef to initialize a vector type. */
|
||||
#define vector __attribute__ ((vector_size (8)))
|
||||
vector char x = (vector char) {1,2,3,4,5,6,7,8}; /* { dg-bogus "initializer" } */
|
||||
vector char y = (vector short) {1,2,3,4}; /* { dg-error "initializer" } */
|
||||
vector char y = (vector short) {1,2,3,4}; /* { dg-error "use -flax-vector-conversions to permit conversions between vectors with differing element types or numbers of subparts.*incompatible types in initialization" } */
|
||||
|
||||
@ -4,4 +4,4 @@
|
||||
/* Ensure that we don't need a typedef to initialize a vector type. */
|
||||
#define vector __attribute__ ((vector_size (8)))
|
||||
vector char x = (vector char) {1,2,3,4,5,6,7,8}; /* { dg-bogus "initializer" } */
|
||||
vector char y = (vector short) {1,2,3,4}; /* { dg-error "initializer" } */
|
||||
vector char y = (vector short) {1,2,3,4}; /* { dg-error "use -flax-vector-conversions to permit conversions between vectors with differing element types or numbers of subparts.*incompatible types in initialization" } */
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
/* { dg-do compile { target i?86-*-* x86_64-*-* } } */
|
||||
/* { dg-options "-O2 -mmmx" } */
|
||||
|
||||
typedef unsigned char __v8qi __attribute__ ((vector_size (8)));
|
||||
typedef char __v8qi __attribute__ ((vector_size (8)));
|
||||
extern void abort (void);
|
||||
extern void exit (int);
|
||||
|
||||
|
||||
@ -96,7 +96,7 @@ void foo(char *bS, char *bS_edge, int field_MBAFF, int top){
|
||||
v6 = (vector signed short) vec_cmpeq ((vector signed char) v2, (vector signed char) v3);
|
||||
}
|
||||
else {
|
||||
v4 = v5 = v6 = vec_nor (v_zero, v_zero);
|
||||
v4 = v5 = v6 = (vector signed short) vec_nor (v_zero, v_zero);
|
||||
}
|
||||
|
||||
tmp1 = (vector signed short) vec_sl ((vector unsigned char) idx0, v_c1);
|
||||
@ -335,7 +335,7 @@ void foo(char *bS, char *bS_edge, int field_MBAFF, int top){
|
||||
v10 = (vector signed short) vec_cmpeq ((vector signed char) v10, (vector signed char) v11);
|
||||
}
|
||||
else {
|
||||
v8 = v9 = v10 = vec_nor (v_zero, v_zero);
|
||||
v8 = v9 = v10 = (vector signed short) vec_nor (v_zero, v_zero);
|
||||
}
|
||||
|
||||
tmp1 = (vector signed short) vec_sl ((vector unsigned char) idx0, v_c1);
|
||||
|
||||
Loading…
Reference in New Issue
Block a user