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a20cb38659
AMD Jaguar ( https://en.wikipedia.org/wiki/Jaguar_%28microarchitecture%29 ) is suddenly a popular architecture since it is used in the PS4 and the XBox One. Many embedded systems are also likely to use it in the next years. This patch adds support for GCC architecture-specific optimisations and tuning for these CPUs. These optimizations are available with GCC 4.8+. Signed-off-by: Adrien Beraud <adrien.beraud@savoirfairelinux.com> Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
251 lines
6.9 KiB
Plaintext
251 lines
6.9 KiB
Plaintext
# i386/x86_64 cpu features
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config BR2_X86_CPU_HAS_MMX
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bool
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config BR2_X86_CPU_HAS_SSE
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bool
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config BR2_X86_CPU_HAS_SSE2
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bool
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config BR2_X86_CPU_HAS_SSE3
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bool
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config BR2_X86_CPU_HAS_SSSE3
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bool
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config BR2_X86_CPU_HAS_SSE4
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bool
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config BR2_X86_CPU_HAS_SSE42
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bool
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choice
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prompt "Target Architecture Variant"
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depends on BR2_i386 || BR2_x86_64
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default BR2_x86_i586 if BR2_i386
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default BR2_x86_generic if BR2_x86_64
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help
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Specific CPU variant to use
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config BR2_x86_generic
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bool "generic"
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config BR2_x86_i386
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bool "i386"
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depends on !BR2_x86_64
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config BR2_x86_i486
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bool "i486"
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depends on !BR2_x86_64
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config BR2_x86_i586
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bool "i586"
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depends on !BR2_x86_64
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config BR2_x86_i686
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bool "i686"
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depends on !BR2_x86_64
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config BR2_x86_pentiumpro
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bool "pentium pro"
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depends on !BR2_x86_64
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config BR2_x86_pentium_mmx
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bool "pentium MMX"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_pentium_m
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bool "pentium mobile"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_pentium2
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bool "pentium2"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_pentium3
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bool "pentium3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_pentium4
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bool "pentium4"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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depends on !BR2_x86_64
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config BR2_x86_prescott
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bool "prescott"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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depends on !BR2_x86_64
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config BR2_x86_nocona
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bool "nocona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_core2
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bool "core2"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_atom
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bool "atom"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_k6
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bool "k6"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_k6_2
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bool "k6-2"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_athlon
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bool "athlon"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_athlon_4
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bool "athlon-4"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_opteron
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bool "opteron"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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config BR2_x86_opteron_sse3
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bool "opteron w/ SSE3"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_barcelona
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bool "barcelona"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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config BR2_x86_jaguar
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bool "jaguar"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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select BR2_X86_CPU_HAS_SSE2
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select BR2_X86_CPU_HAS_SSE3
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select BR2_X86_CPU_HAS_SSSE3
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config BR2_x86_geode
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bool "geode"
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# Don't include MMX support because there several variant of geode
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# processor, some with MMX support, some without.
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# See: http://en.wikipedia.org/wiki/Geode_%28processor%29
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depends on !BR2_x86_64
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config BR2_x86_c3
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bool "Via/Cyrix C3 (Samuel/Ezra cores)"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_c32
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bool "Via C3-2 (Nehemiah cores)"
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select BR2_X86_CPU_HAS_MMX
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select BR2_X86_CPU_HAS_SSE
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depends on !BR2_x86_64
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config BR2_x86_winchip_c6
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bool "IDT Winchip C6"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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config BR2_x86_winchip2
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bool "IDT Winchip 2"
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select BR2_X86_CPU_HAS_MMX
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depends on !BR2_x86_64
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endchoice
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config BR2_ARCH
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default "i386" if BR2_x86_i386
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default "i486" if BR2_x86_i486
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default "i586" if BR2_x86_i586
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default "i586" if BR2_x86_pentium_mmx
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default "i586" if BR2_x86_geode
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default "i586" if BR2_x86_c3
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default "i686" if BR2_x86_c32
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default "i586" if BR2_x86_winchip_c6
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default "i586" if BR2_x86_winchip2
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default "i686" if BR2_x86_i686
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default "i686" if BR2_x86_pentium2
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default "i686" if BR2_x86_pentium3
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default "i686" if BR2_x86_pentium4
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default "i686" if BR2_x86_pentium_m
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default "i686" if BR2_x86_pentiumpro
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default "i686" if BR2_x86_prescott
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default "i686" if BR2_x86_nocona && BR2_i386
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default "i686" if BR2_x86_core2 && BR2_i386
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default "i686" if BR2_x86_atom && BR2_i386
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default "i686" if BR2_x86_opteron && BR2_i386
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default "i686" if BR2_x86_opteron_sse3 && BR2_i386
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default "i686" if BR2_x86_barcelona && BR2_i386
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default "i686" if BR2_x86_jaguar && BR2_i386
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default "i686" if BR2_x86_k6
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default "i686" if BR2_x86_k6_2
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default "i686" if BR2_x86_athlon
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default "i686" if BR2_x86_athlon_4
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default "x86_64" if BR2_x86_64
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default "i386" if BR2_x86_generic
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config BR2_ENDIAN
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default "LITTLE"
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config BR2_GCC_TARGET_TUNE
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default "i386" if BR2_x86_i386
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default "i486" if BR2_x86_i486
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default "i586" if BR2_x86_i586
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default "pentium-mmx" if BR2_x86_pentium_mmx
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default "i686" if BR2_x86_i686
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default "pentiumpro" if BR2_x86_pentiumpro
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default "pentium-m" if BR2_x86_pentium_m
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default "pentium2" if BR2_x86_pentium2
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default "pentium3" if BR2_x86_pentium3
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default "pentium4" if BR2_x86_pentium4
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default "prescott" if BR2_x86_prescott
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default "nocona" if BR2_x86_nocona
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default "core2" if BR2_x86_core2
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default "atom" if BR2_x86_atom
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default "k8" if BR2_x86_opteron
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default "k8-sse3" if BR2_x86_opteron_sse3
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default "barcelona" if BR2_x86_barcelona
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default "btver2" if BR2_x86_jaguar
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default "k6" if BR2_x86_k6
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default "k6-2" if BR2_x86_k6_2
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default "athlon" if BR2_x86_athlon
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default "athlon-4" if BR2_x86_athlon_4
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default "winchip-c6" if BR2_x86_winchip_c6
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default "winchip2" if BR2_x86_winchip2
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default "c3" if BR2_x86_c3
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default "c3-2" if BR2_x86_c32
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default "geode" if BR2_x86_geode
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default "generic" if BR2_x86_generic
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config BR2_GCC_TARGET_ARCH
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default "i386" if BR2_x86_i386
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default "i486" if BR2_x86_i486
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default "i586" if BR2_x86_i586
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default "pentium-mmx" if BR2_x86_pentium_mmx
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default "i686" if BR2_x86_i686
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default "pentiumpro" if BR2_x86_pentiumpro
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default "pentium-m" if BR2_x86_pentium_m
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default "pentium2" if BR2_x86_pentium2
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default "pentium3" if BR2_x86_pentium3
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default "pentium4" if BR2_x86_pentium4
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default "prescott" if BR2_x86_prescott
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default "nocona" if BR2_x86_nocona
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default "core2" if BR2_x86_core2
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default "atom" if BR2_x86_atom
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default "k8" if BR2_x86_opteron
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default "k8-sse3" if BR2_x86_opteron_sse3
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default "barcelona" if BR2_x86_barcelona
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default "btver2" if BR2_x86_jaguar
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default "k6" if BR2_x86_k6
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default "k6-2" if BR2_x86_k6_2
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default "athlon" if BR2_x86_athlon
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default "athlon-4" if BR2_x86_athlon_4
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default "winchip-c6" if BR2_x86_winchip_c6
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default "winchip2" if BR2_x86_winchip2
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default "c3" if BR2_x86_c3
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default "c3-2" if BR2_x86_c32
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default "geode" if BR2_x86_geode
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