mirror of
https://git.busybox.net/buildroot.git
synced 2024-11-25 14:33:29 +08:00
37aa01f2cf
Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar> Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk>
841 lines
22 KiB
Plaintext
841 lines
22 KiB
Plaintext
config BR2_ARCH_IS_64
|
|
bool
|
|
|
|
choice
|
|
prompt "Target Architecture"
|
|
default BR2_i386
|
|
help
|
|
Select the target architecture family to build for.
|
|
|
|
config BR2_arm
|
|
bool "ARM (little endian)"
|
|
help
|
|
ARM is a 32-bit reduced instruction set computer (RISC) instruction
|
|
set architecture (ISA) developed by ARM Holdings. Little endian.
|
|
http://www.arm.com/
|
|
http://en.wikipedia.org/wiki/ARM
|
|
|
|
config BR2_armeb
|
|
bool "ARM (big endian)"
|
|
help
|
|
ARM is a 32-bit reduced instruction set computer (RISC) instruction
|
|
set architecture (ISA) developed by ARM Holdings. Big endian.
|
|
http://www.arm.com/
|
|
http://en.wikipedia.org/wiki/ARM
|
|
|
|
config BR2_avr32
|
|
bool "AVR32"
|
|
select BR2_SOFT_FLOAT
|
|
help
|
|
The AVR32 is a 32-bit RISC microprocessor architecture designed by
|
|
Atmel.
|
|
http://www.atmel.com/
|
|
http://en.wikipedia.org/wiki/Avr32
|
|
|
|
config BR2_bfin
|
|
bool "Blackfin"
|
|
help
|
|
The Blackfin is a family of 16 or 32-bit microprocessors developed,
|
|
manufactured and marketed by Analog Devices.
|
|
http://www.analog.com/
|
|
http://en.wikipedia.org/wiki/Blackfin
|
|
|
|
config BR2_i386
|
|
bool "i386"
|
|
help
|
|
Intel i386 architecture compatible microprocessor
|
|
http://en.wikipedia.org/wiki/I386
|
|
|
|
config BR2_m68k
|
|
bool "m68k"
|
|
depends on BROKEN # ice in uclibc / inet_ntoa_r
|
|
help
|
|
Motorola 68000 family microprocessor
|
|
http://en.wikipedia.org/wiki/M68k
|
|
|
|
config BR2_microblazeel
|
|
bool "Microblaze AXI (little endian)"
|
|
help
|
|
Soft processor core designed for Xilinx FPGAs from Xilinx. AXI bus
|
|
based architecture (little endian)
|
|
http://www.xilinx.com
|
|
http://en.wikipedia.org/wiki/Microblaze
|
|
|
|
config BR2_microblazebe
|
|
bool "Microblaze non-AXI (big endian)"
|
|
help
|
|
Soft processor core designed for Xilinx FPGAs from Xilinx. PLB bus
|
|
based architecture (non-AXI, big endian)
|
|
http://www.xilinx.com
|
|
http://en.wikipedia.org/wiki/Microblaze
|
|
|
|
config BR2_mips
|
|
bool "MIPS (big endian)"
|
|
help
|
|
MIPS is a RISC microprocessor from MIPS Technologies. Big endian.
|
|
http://www.mips.com/
|
|
http://en.wikipedia.org/wiki/MIPS_Technologies
|
|
|
|
config BR2_mipsel
|
|
bool "MIPS (little endian)"
|
|
help
|
|
MIPS is a RISC microprocessor from MIPS Technologies. Little endian.
|
|
http://www.mips.com/
|
|
http://en.wikipedia.org/wiki/MIPS_Technologies
|
|
|
|
config BR2_powerpc
|
|
bool "PowerPC"
|
|
help
|
|
PowerPC is a RISC architecture created by Apple-IBM-Motorola alliance.
|
|
http://www.power.org/
|
|
http://en.wikipedia.org/wiki/Powerpc
|
|
|
|
config BR2_sh
|
|
bool "SuperH"
|
|
help
|
|
SuperH (or SH) is a 32-bit reduced instruction set computer (RISC)
|
|
instruction set architecture (ISA) developed by Hitachi.
|
|
http://www.hitachi.com/
|
|
http://en.wikipedia.org/wiki/SuperH
|
|
|
|
config BR2_sh64
|
|
bool "SuperH64"
|
|
help
|
|
SuperH64 (or SH) is a 64-bit reduced instruction set computer (RISC)
|
|
instruction set architecture (ISA) developed by Hitachi.
|
|
http://www.hitachi.com/
|
|
http://en.wikipedia.org/wiki/SuperH
|
|
|
|
config BR2_sparc
|
|
bool "SPARC"
|
|
help
|
|
SPARC (from Scalable Processor Architecture) is a RISC instruction
|
|
set architecture (ISA) developed by Sun Microsystems.
|
|
http://www.oracle.com/sun
|
|
http://en.wikipedia.org/wiki/Sparc
|
|
|
|
config BR2_x86_64
|
|
bool "x86_64"
|
|
select BR2_ARCH_IS_64
|
|
help
|
|
x86-64 is an extension of the x86 instruction set (Intel i386
|
|
architecture compatible microprocessor).
|
|
http://en.wikipedia.org/wiki/X86_64
|
|
|
|
config BR2_xtensa
|
|
bool "Xtensa"
|
|
depends on BR2_DEPRECATED
|
|
help
|
|
Xtensa is a Tensilica processor IP architecture.
|
|
http://en.wikipedia.org/wiki/Xtensa
|
|
http://www.tensilica.com/
|
|
endchoice
|
|
|
|
config BR2_microblaze
|
|
bool
|
|
default y if BR2_microblazeel || BR2_microblazebe
|
|
|
|
#
|
|
# Keep the variants separate, there's no need to clutter everything else.
|
|
# sh is fairly "special" in this regard, as virtually everyone else has
|
|
# things kept down to a _sensible_ number of target variants. No such
|
|
# luck for sh..
|
|
#
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_arm || BR2_armeb
|
|
default BR2_generic_arm
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
config BR2_generic_arm
|
|
bool "generic_arm"
|
|
config BR2_arm7tdmi
|
|
bool "arm7tdmi"
|
|
config BR2_arm610
|
|
bool "arm610"
|
|
config BR2_arm710
|
|
bool "arm710"
|
|
config BR2_arm720t
|
|
bool "arm720t"
|
|
config BR2_arm920t
|
|
bool "arm920t"
|
|
config BR2_arm922t
|
|
bool "arm922t"
|
|
config BR2_arm926t
|
|
bool "arm926t"
|
|
config BR2_arm10t
|
|
bool "arm10t"
|
|
config BR2_arm1136jf_s
|
|
bool "arm1136jf_s"
|
|
config BR2_arm1176jz_s
|
|
bool "arm1176jz-s"
|
|
config BR2_arm1176jzf_s
|
|
bool "arm1176jzf-s"
|
|
config BR2_cortex_a8
|
|
bool "cortex-A8"
|
|
config BR2_cortex_a9
|
|
bool "cortex-A9"
|
|
config BR2_sa110
|
|
bool "sa110"
|
|
config BR2_sa1100
|
|
bool "sa1100"
|
|
config BR2_xscale
|
|
bool "xscale"
|
|
config BR2_iwmmxt
|
|
bool "iwmmxt"
|
|
endchoice
|
|
|
|
config BR2_ARM_TYPE
|
|
string
|
|
default GENERIC_ARM if BR2_generic_arm
|
|
default ARM610 if BR2_arm610
|
|
default ARM710 if BR2_arm710
|
|
default ARM7TDMI if BR2_arm7tdmi
|
|
default ARM720T if BR2_arm720t
|
|
default ARM920T if BR2_arm920t
|
|
default ARM922T if BR2_arm922t
|
|
default ARM926T if BR2_arm926t
|
|
default ARM10T if BR2_arm10t
|
|
default ARM1136JF_S if BR2_arm1136jf_s
|
|
default ARM1176JZ_S if BR2_arm1176jz_s
|
|
default ARM1176JZF_S if BR2_arm1176jzf_s
|
|
default ARM_SA110 if BR2_sa110
|
|
default ARM_SA1100 if BR2_sa1100
|
|
default ARM_XSCALE if BR2_xscale
|
|
default ARM_IWMMXT if BR2_iwmmxt
|
|
default ARM_CORTEXA8 if BR2_cortex_a8
|
|
default ARM_CORTEXA9 if BR2_cortex_a9
|
|
|
|
choice
|
|
prompt "Target ABI"
|
|
depends on BR2_arm || BR2_armeb
|
|
default BR2_ARM_EABI
|
|
help
|
|
Application Binary Interface to use
|
|
|
|
Note:
|
|
Using OABI is discouraged.
|
|
|
|
config BR2_ARM_EABI
|
|
bool "EABI"
|
|
config BR2_ARM_OABI
|
|
bool "OABI"
|
|
depends on !BR2_GCC_VERSION_4_7_X
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Target ABI"
|
|
depends on BR2_bfin
|
|
default BR2_BFIN_FDPIC
|
|
config BR2_BFIN_FDPIC
|
|
bool "FDPIC"
|
|
config BR2_BFIN_FLAT
|
|
bool "FLAT"
|
|
select BR2_PREFER_STATIC_LIB
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_mips || BR2_mipsel
|
|
default BR2_mips_3 if BR2_mips
|
|
default BR2_mips_1 if BR2_mipsel
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
64bit cabable: 3, 4, 64, 64r2
|
|
non-64bit capable: 1, 2, 32, 32r2
|
|
|
|
config BR2_mips_1
|
|
bool "mips I (generic)"
|
|
config BR2_mips_2
|
|
bool "mips II"
|
|
config BR2_mips_3
|
|
bool "mips III"
|
|
config BR2_mips_4
|
|
bool "mips IV"
|
|
config BR2_mips_32
|
|
bool "mips 32"
|
|
config BR2_mips_32r2
|
|
bool "mips 32r2"
|
|
config BR2_mips_64
|
|
bool "mips 64"
|
|
config BR2_mips_64r2
|
|
bool "mips 64r2"
|
|
config BR2_mips_16
|
|
bool "mips 16"
|
|
endchoice
|
|
|
|
|
|
choice
|
|
prompt "Target ABI"
|
|
depends on BR2_mips || BR2_mipsel
|
|
default BR2_MIPS_OABI32 if BR_mips_32 || BR_mips_32r2
|
|
default BR2_MIPS_ABI32 if BR_mips_64 || BR_mips_64r2
|
|
help
|
|
Application Binary Interface to use
|
|
|
|
config BR2_MIPS_OABI32
|
|
bool "o32"
|
|
config BR2_MIPS_ABI32
|
|
bool "n32"
|
|
depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
|
|
config BR2_MIPS_EABI
|
|
bool "eabi"
|
|
depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
|
|
config BR2_MIPS_ABI64
|
|
bool "n64"
|
|
depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
|
|
config BR2_MIPS_OABI64
|
|
bool "o64"
|
|
depends on BR2_mips_3 || BR2_mips_4 || BR2_mips_64 || BR2_mips_64r2 || BR2_mips_16
|
|
config BR2_MIPS_ABI_none
|
|
bool "unspecified"
|
|
depends on BR2_mips_16
|
|
help
|
|
Unspecified ABI leaves ABI selection blank.
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_sh
|
|
default BR2_sh4
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
config BR2_sh2
|
|
bool "sh2 (SH2 big endian)"
|
|
config BR2_sh2a
|
|
bool "sh2a (SH2A big endian)"
|
|
config BR2_sh3
|
|
bool "sh3 (SH3 little endian)"
|
|
config BR2_sh3eb
|
|
bool "sh3eb (SH3 big endian)"
|
|
config BR2_sh4
|
|
bool "sh4 (SH4 little endian)"
|
|
config BR2_sh4eb
|
|
bool "sh4eb (SH4 big endian)"
|
|
config BR2_sh4a
|
|
bool "sh4a (SH4A little endian)"
|
|
config BR2_sh4aeb
|
|
bool "sh4aeb (SH4A big endian)"
|
|
endchoice
|
|
|
|
#
|
|
# gcc builds libstdc++ differently depending on the
|
|
# host tuplet given to it, so let people choose
|
|
#
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_i386
|
|
default BR2_x86_i586
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
config BR2_x86_i386
|
|
bool "i386"
|
|
config BR2_x86_i486
|
|
bool "i486"
|
|
config BR2_x86_i586
|
|
bool "i586"
|
|
config BR2_x86_i686
|
|
bool "i686"
|
|
config BR2_x86_pentiumpro
|
|
bool "pentium pro"
|
|
config BR2_x86_pentium_mmx
|
|
bool "pentium MMX"
|
|
config BR2_x86_pentium_m
|
|
bool "pentium mobile"
|
|
config BR2_x86_pentium2
|
|
bool "pentium2"
|
|
config BR2_x86_pentium3
|
|
bool "pentium3"
|
|
config BR2_x86_pentium4
|
|
bool "pentium4"
|
|
config BR2_x86_prescott
|
|
bool "prescott"
|
|
config BR2_x86_nocona
|
|
bool "nocona"
|
|
config BR2_x86_core2
|
|
bool "core2"
|
|
config BR2_x86_atom
|
|
bool "atom"
|
|
config BR2_x86_k6
|
|
bool "k6"
|
|
config BR2_x86_k6_2
|
|
bool "k6-2"
|
|
config BR2_x86_athlon
|
|
bool "athlon"
|
|
config BR2_x86_athlon_4
|
|
bool "athlon-4"
|
|
config BR2_x86_opteron
|
|
bool "opteron"
|
|
config BR2_x86_opteron_sse3
|
|
bool "opteron w/ SSE3"
|
|
config BR2_x86_barcelona
|
|
bool "barcelona"
|
|
config BR2_x86_geode
|
|
bool "geode"
|
|
config BR2_x86_c3
|
|
bool "Via/Cyrix C3 (Samuel/Ezra cores)"
|
|
config BR2_x86_c32
|
|
bool "Via C3-2 (Nehemiah cores)"
|
|
config BR2_x86_winchip_c6
|
|
bool "IDT Winchip C6"
|
|
config BR2_x86_winchip2
|
|
bool "IDT Winchip 2"
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_x86_64
|
|
default BR2_x86_64_generic
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
config BR2_x86_64_generic
|
|
bool "generic"
|
|
config BR2_x86_64_barcelona
|
|
bool "barcelona"
|
|
config BR2_x86_64_opteron_sse3
|
|
bool "opteron w/ sse3"
|
|
config BR2_x86_64_opteron
|
|
bool "opteron"
|
|
config BR2_x86_64_nocona
|
|
bool "nocona"
|
|
config BR2_x86_64_core2
|
|
bool "core2"
|
|
config BR2_x86_64_atom
|
|
bool "atom"
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_sparc
|
|
default BR2_sparc_v7
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
config BR2_sparc_v7
|
|
bool "v7"
|
|
config BR2_sparc_cypress
|
|
bool "cypress"
|
|
config BR2_sparc_v8
|
|
bool "v8"
|
|
config BR2_sparc_sparchfleon
|
|
bool "hfleon"
|
|
config BR2_sparc_sparchfleonv8
|
|
bool "hfleonv8"
|
|
config BR2_sparc_sparcsfleon
|
|
bool "sfleon"
|
|
config BR2_sparc_sparcsfleonv8
|
|
bool "sfleonv8"
|
|
config BR2_sparc_supersparc
|
|
bool "supersparc"
|
|
config BR2_sparc_sparclite
|
|
bool "sparclite"
|
|
config BR2_sparc_f930
|
|
bool "f930"
|
|
config BR2_sparc_f934
|
|
bool "f934"
|
|
config BR2_sparc_hypersparc
|
|
bool "hypersparc"
|
|
config BR2_sparc_sparclite86x
|
|
bool "sparclite86x"
|
|
config BR2_sparc_sparclet
|
|
bool "sparclet"
|
|
config BR2_sparc_tsc701
|
|
bool "tsc701"
|
|
endchoice
|
|
|
|
config BR2_SPARC_TYPE
|
|
string
|
|
default V7 if BR2_sparc_v7 || BR2_sparc_cypress || BR2_sparc_sparclite || BR2_sparc_f930 || BR2_sparc_f934 || BR2_sparc_sparclite86x || BR2_sparc_sparclet || BR2_sparc_tsc701 || BR2_sparc_sparchfleon || BR2_sparc_sparcsfleon
|
|
default V8 if BR2_sparc_v8 || BR2_sparc_supersparc || BR2_sparc_hypersparc || BR2_sparc_sparchfleonv8 || BR2_sparc_sparcsfleonv8
|
|
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_xtensa
|
|
default BR2_xtensa_dc232b
|
|
help
|
|
Specific CPU variant to use
|
|
|
|
config BR2_xtensa_custom
|
|
bool "Custom Xtensa processor configuration"
|
|
config BR2_xtensa_dc232a
|
|
bool "dc232a - Diamond 232L Standard Core Rev.A (LE)"
|
|
config BR2_xtensa_dc232b
|
|
bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"
|
|
#config BR2_xtensa_s5000
|
|
# bool "s5000 - Stretch S5000"
|
|
endchoice
|
|
|
|
config BR2_xtensa_custom_name
|
|
string "Custom Xtensa processor configuration name"
|
|
depends on BR2_xtensa_custom
|
|
default ""
|
|
help
|
|
Name given to a custom Xtensa processor configuration.
|
|
This is used to select the correct overlay.
|
|
|
|
config BR2_xtensa_core_name
|
|
string
|
|
default BR2_xtensa_custom_name if BR2_xtensa_custom
|
|
default "dc232a" if BR2_xtensa_dc232a
|
|
default "dc232b" if BR2_xtensa_dc232b
|
|
# default "s5000" if BR2_xtensa_s5000
|
|
|
|
choice
|
|
prompt "Target Architecture Variant"
|
|
depends on BR2_powerpc
|
|
default BR2_generic_powerpc
|
|
help
|
|
Specific CPU variant to use
|
|
config BR2_generic_powerpc
|
|
bool "generic"
|
|
config BR2_powerpc_401
|
|
bool "401"
|
|
config BR2_powerpc_403
|
|
bool "403"
|
|
config BR2_powerpc_405
|
|
bool "405"
|
|
config BR2_powerpc_405fp
|
|
bool "405 with FPU"
|
|
config BR2_powerpc_440
|
|
bool "440"
|
|
config BR2_powerpc_440fp
|
|
bool "440 with FPU"
|
|
config BR2_powerpc_505
|
|
bool "505"
|
|
config BR2_powerpc_601
|
|
bool "601"
|
|
config BR2_powerpc_602
|
|
bool "602"
|
|
config BR2_powerpc_603
|
|
bool "603"
|
|
config BR2_powerpc_603e
|
|
bool "603e"
|
|
config BR2_powerpc_604
|
|
bool "604"
|
|
config BR2_powerpc_604e
|
|
bool "604e"
|
|
config BR2_powerpc_620
|
|
bool "620"
|
|
config BR2_powerpc_630
|
|
bool "630"
|
|
config BR2_powerpc_740
|
|
bool "740"
|
|
config BR2_powerpc_7400
|
|
bool "7400"
|
|
config BR2_powerpc_7450
|
|
bool "7450"
|
|
config BR2_powerpc_750
|
|
bool "750"
|
|
config BR2_powerpc_801
|
|
bool "801"
|
|
config BR2_powerpc_821
|
|
bool "821"
|
|
config BR2_powerpc_823
|
|
bool "823"
|
|
config BR2_powerpc_860
|
|
bool "860"
|
|
config BR2_powerpc_970
|
|
bool "970"
|
|
config BR2_powerpc_8540
|
|
bool "8540 / e500v1"
|
|
config BR2_powerpc_8548
|
|
bool "8548 / e500v2"
|
|
config BR2_powerpc_e300c2
|
|
bool "e300c2"
|
|
config BR2_powerpc_e300c3
|
|
bool "e300c3"
|
|
config BR2_powerpc_e500mc
|
|
bool "e500mc"
|
|
endchoice
|
|
|
|
choice
|
|
prompt "Target ABI"
|
|
depends on BR2_powerpc
|
|
default BR2_powerpc_SPE if BR2_powerpc_8540 || BR2_powerpc_8548
|
|
default BR2_powerpc_CLASSIC
|
|
help
|
|
Application Binary Interface to use
|
|
|
|
config BR2_powerpc_CLASSIC
|
|
bool "Classic"
|
|
depends on !(BR2_powerpc_8540 || BR2_powerpc_8548)
|
|
config BR2_powerpc_SPE
|
|
bool "SPE"
|
|
depends on BR2_powerpc_8540 || BR2_powerpc_8548
|
|
endchoice
|
|
|
|
config BR2_ARCH
|
|
string
|
|
default "arm" if BR2_arm
|
|
default "armeb" if BR2_armeb
|
|
default "avr32" if BR2_avr32
|
|
default "bfin" if BR2_bfin
|
|
default "i386" if BR2_x86_i386
|
|
default "i486" if BR2_x86_i486
|
|
default "i586" if BR2_x86_i586
|
|
default "i586" if BR2_x86_pentium_mmx
|
|
default "i586" if BR2_x86_geode
|
|
default "i586" if BR2_x86_c3
|
|
default "i686" if BR2_x86_c32
|
|
default "i586" if BR2_x86_winchip_c6
|
|
default "i586" if BR2_x86_winchip2
|
|
default "i686" if BR2_x86_i686
|
|
default "i686" if BR2_x86_pentium2
|
|
default "i686" if BR2_x86_pentium3
|
|
default "i686" if BR2_x86_pentium4
|
|
default "i686" if BR2_x86_pentium_m
|
|
default "i686" if BR2_x86_pentiumpro
|
|
default "i686" if BR2_x86_prescott
|
|
default "i686" if BR2_x86_nocona
|
|
default "i686" if BR2_x86_core2
|
|
default "i686" if BR2_x86_atom
|
|
default "i686" if BR2_x86_opteron
|
|
default "i686" if BR2_x86_opteron_sse3
|
|
default "i686" if BR2_x86_barcelona
|
|
default "i686" if BR2_x86_k6
|
|
default "i686" if BR2_x86_k6_2
|
|
default "i686" if BR2_x86_athlon
|
|
default "i686" if BR2_x86_athlon_4
|
|
default "m68k" if BR2_m68k
|
|
default "microblaze" if BR2_microblaze
|
|
default "mips" if BR2_mips
|
|
default "mipsel" if BR2_mipsel
|
|
default "powerpc" if BR2_powerpc
|
|
default "sh2" if BR2_sh2
|
|
default "sh2a" if BR2_sh2a
|
|
default "sh3" if BR2_sh3
|
|
default "sh3eb" if BR2_sh3eb
|
|
default "sh4" if BR2_sh4
|
|
default "sh4eb" if BR2_sh4eb
|
|
default "sh4a" if BR2_sh4a
|
|
default "sh4aeb" if BR2_sh4aeb
|
|
default "sh64" if BR2_sh64
|
|
default "sparc" if BR2_sparc
|
|
default "x86_64" if BR2_x86_64
|
|
default "x86_64" if BR2_x86_64_generic
|
|
default "x86_64" if BR2_x86_64_nocona
|
|
default "x86_64" if BR2_x86_64_core2
|
|
default "x86_64" if BR2_x86_64_atom
|
|
default "x86_64" if BR2_x86_64_opteron
|
|
default "x86_64" if BR2_x86_64_opteron_sse3
|
|
default "x86_64" if BR2_x86_64_barcelona
|
|
default "xtensa" if BR2_xtensa
|
|
|
|
|
|
config BR2_ENDIAN
|
|
string
|
|
default "LITTLE" if BR2_arm || BR2_bfin || BR2_i386 || BR2_mipsel || \
|
|
BR2_sh3 || BR2_sh4 || BR2_sh4a || BR2_x86_64 || BR2_sh64 || \
|
|
BR2_microblazeel
|
|
default "BIG" if BR2_armeb || BR2_avr32 || BR2_m68k || BR2_mips || \
|
|
BR2_powerpc || BR2_sh2 || BR2_sh2a || \
|
|
BR2_sh3eb || BR2_sh4eb || BR2_sh4aeb || BR2_sparc || \
|
|
BR2_microblazebe
|
|
|
|
config BR2_GCC_TARGET_TUNE
|
|
string
|
|
default i386 if BR2_x86_i386
|
|
default i486 if BR2_x86_i486
|
|
default i586 if BR2_x86_i586
|
|
default pentium-mmx if BR2_x86_pentium_mmx
|
|
default i686 if BR2_x86_i686
|
|
default pentiumpro if BR2_x86_pentiumpro
|
|
default pentium-m if BR2_x86_pentium_m
|
|
default pentium2 if BR2_x86_pentium2
|
|
default pentium3 if BR2_x86_pentium3
|
|
default pentium4 if BR2_x86_pentium4
|
|
default prescott if BR2_x86_prescott
|
|
default nocona if BR2_x86_nocona
|
|
default core2 if BR2_x86_core2
|
|
default atom if BR2_x86_atom
|
|
default k8 if BR2_x86_opteron
|
|
default k8-sse3 if BR2_x86_opteron_sse3
|
|
default barcelona if BR2_x86_barcelona
|
|
default k6 if BR2_x86_k6
|
|
default k6-2 if BR2_x86_k6_2
|
|
default athlon if BR2_x86_athlon
|
|
default athlon-4 if BR2_x86_athlon_4
|
|
default winchip-c6 if BR2_x86_winchip_c6
|
|
default winchip2 if BR2_x86_winchip2
|
|
default c3 if BR2_x86_c3
|
|
default c3-2 if BR2_x86_c32
|
|
default geode if BR2_x86_geode
|
|
default generic if BR2_x86_64_generic
|
|
default nocona if BR2_x86_64_nocona
|
|
default core2 if BR2_x86_64_core2
|
|
default atom if BR2_x86_64_atom
|
|
default k8 if BR2_x86_64_opteron
|
|
default k8-sse3 if BR2_x86_64_opteron_sse3
|
|
default barcelona if BR2_x86_64_barcelona
|
|
default arm600 if BR2_arm600
|
|
default arm610 if BR2_arm610
|
|
default arm620 if BR2_arm620
|
|
default arm7tdmi if BR2_arm7tdmi
|
|
default arm7tdmi if BR2_arm720t
|
|
default arm7tdmi if BR2_arm740t
|
|
default arm920 if BR2_arm920
|
|
default arm920t if BR2_arm920t
|
|
default arm922t if BR2_arm922t
|
|
default arm926ej-s if BR2_arm926t
|
|
default arm1136j-s if BR2_arm1136j_s
|
|
default arm1136jf-s if BR2_arm1136jf_s
|
|
default arm1176jz-s if BR2_arm1176jz_s
|
|
default arm1176jzf-s if BR2_arm1176jzf_s
|
|
default cortex-a8 if BR2_cortex_a8
|
|
default cortex-a9 if BR2_cortex_a9
|
|
default strongarm110 if BR2_sa110
|
|
default strongarm1100 if BR2_sa1100
|
|
default xscale if BR2_xscale
|
|
default iwmmxt if BR2_iwmmxt
|
|
default 68000 if BR2_m68k_68000
|
|
default 68010 if BR2_m68k_68010
|
|
default 68020 if BR2_m68k_68020
|
|
default 68030 if BR2_m68k_68030
|
|
default 68040 if BR2_m68k_68040
|
|
default 68060 if BR2_m68k_68060
|
|
default mips1 if BR2_mips_1
|
|
default mips2 if BR2_mips_2
|
|
default mips3 if BR2_mips_3
|
|
default mips4 if BR2_mips_4
|
|
default mips32 if BR2_mips_32
|
|
default mips32r2 if BR2_mips_32r2
|
|
default mips64 if BR2_mips_64
|
|
default mips64r2 if BR2_mips_64r2
|
|
default mips16 if BR2_mips_16
|
|
default 401 if BR2_powerpc_401
|
|
default 403 if BR2_powerpc_403
|
|
default 405 if BR2_powerpc_405
|
|
default 405fp if BR2_powerpc_405fp
|
|
default 440 if BR2_powerpc_440
|
|
default 440fp if BR2_powerpc_440fp
|
|
default 505 if BR2_powerpc_505
|
|
default 601 if BR2_powerpc_601
|
|
default 602 if BR2_powerpc_602
|
|
default 603 if BR2_powerpc_603
|
|
default 603e if BR2_powerpc_603e
|
|
default 604 if BR2_powerpc_604
|
|
default 604e if BR2_powerpc_604e
|
|
default 620 if BR2_powerpc_620
|
|
default 630 if BR2_powerpc_630
|
|
default 740 if BR2_powerpc_740
|
|
default 7400 if BR2_powerpc_7400
|
|
default 7450 if BR2_powerpc_7450
|
|
default 750 if BR2_powerpc_750
|
|
default 801 if BR2_powerpc_801
|
|
default 821 if BR2_powerpc_821
|
|
default 823 if BR2_powerpc_823
|
|
default 860 if BR2_powerpc_860
|
|
default 970 if BR2_powerpc_970
|
|
default 8540 if BR2_powerpc_8540
|
|
default 8548 if BR2_powerpc_8548
|
|
default e300c2 if BR2_powerpc_e300c2
|
|
default e300c3 if BR2_powerpc_e300c3
|
|
default e500mc if BR2_powerpc_e500mc
|
|
default v7 if BR2_sparc_v7
|
|
default cypress if BR2_sparc_cypress
|
|
default v8 if BR2_sparc_v8
|
|
default supersparc if BR2_sparc_supersparc
|
|
default hypersparc if BR2_sparc_hypersparc
|
|
default sparclite if BR2_sparc_sparclite
|
|
default f930 if BR2_sparc_f930
|
|
default f934 if BR2_sparc_f934
|
|
default sparclite86x if BR2_sparc_sparclite86x
|
|
default sparclet if BR2_sparc_sparclet
|
|
default tsc701 if BR2_sparc_tsc701
|
|
default v9 if BR2_sparc_v9
|
|
default v9 if BR2_sparc_v9a
|
|
default v9 if BR2_sparc_v9b
|
|
default ultrasparc if BR2_sparc_ultrasparc
|
|
default ultrasparc3 if BR2_sparc_ultrasparc3
|
|
default niagara if BR2_sparc_niagara
|
|
|
|
config BR2_GCC_TARGET_ARCH
|
|
string
|
|
default i386 if BR2_x86_i386
|
|
default i486 if BR2_x86_i486
|
|
default i586 if BR2_x86_i586
|
|
default pentium-mmx if BR2_x86_pentium_mmx
|
|
default i686 if BR2_x86_i686
|
|
default pentiumpro if BR2_x86_pentiumpro
|
|
default pentium-m if BR2_x86_pentium_m
|
|
default pentium2 if BR2_x86_pentium2
|
|
default pentium3 if BR2_x86_pentium3
|
|
default pentium4 if BR2_x86_pentium4
|
|
default prescott if BR2_x86_prescott
|
|
default nocona if BR2_x86_nocona
|
|
default core2 if BR2_x86_core2
|
|
default atom if BR2_x86_atom
|
|
default k8 if BR2_x86_opteron
|
|
default k8-sse3 if BR2_x86_opteron_sse3
|
|
default barcelona if BR2_x86_barcelona
|
|
default k6 if BR2_x86_k6
|
|
default k6-2 if BR2_x86_k6_2
|
|
default athlon if BR2_x86_athlon
|
|
default athlon-4 if BR2_x86_athlon_4
|
|
default winchip-c6 if BR2_x86_winchip_c6
|
|
default winchip2 if BR2_x86_winchip2
|
|
default nocona if BR2_x86_64_nocona
|
|
default core2 if BR2_x86_64_core2
|
|
default atom if BR2_x86_64_atom
|
|
default k8 if BR2_x86_64_opteron
|
|
default k8-sse3 if BR2_x86_64_opteron_sse3
|
|
default barcelona if BR2_x86_64_barcelona
|
|
default c3 if BR2_x86_c3
|
|
default c3-2 if BR2_x86_c32
|
|
default geode if BR2_x86_geode
|
|
default armv4t if BR2_arm7tdmi
|
|
default armv3 if BR2_arm610
|
|
default armv3 if BR2_arm710
|
|
default armv4t if BR2_arm720t
|
|
default armv4t if BR2_arm920t
|
|
default armv4t if BR2_arm922t
|
|
default armv5te if BR2_arm926t
|
|
default armv5t if BR2_arm10t
|
|
default armv6j if BR2_arm1136jf_s
|
|
default armv6zk if BR2_arm1176jz_s
|
|
default armv6zk if BR2_arm1176jzf_s
|
|
default armv7-a if BR2_cortex_a8
|
|
default armv7-a if BR2_cortex_a9
|
|
default armv4 if BR2_sa110
|
|
default armv4 if BR2_sa1100
|
|
default armv5te if BR2_xscale
|
|
default iwmmxt if BR2_iwmmxt
|
|
default 68000 if BR2_m68k_68000
|
|
default 68010 if BR2_m68k_68010
|
|
default 68020 if BR2_m68k_68020
|
|
default 68030 if BR2_m68k_68030
|
|
default 68040 if BR2_m68k_68040
|
|
default 68060 if BR2_m68k_68060
|
|
|
|
config BR2_GCC_TARGET_ABI
|
|
string
|
|
default apcs-gnu if BR2_ARM_OABI
|
|
default atpcs if BR2_arm_dunno
|
|
default aapcs if BR2_arm_dunno
|
|
default aapcs-linux if BR2_ARM_EABI
|
|
default 32 if BR2_MIPS_OABI32
|
|
default n32 if BR2_MIPS_ABI32
|
|
default eabi if BR2_MIPS_EABI
|
|
default o64 if BR2_MIPS_OABI64
|
|
default 64 if BR2_MIPS_ABI64
|
|
default mmixware if BR2_mmix && BR2_MMIX_ABI_native
|
|
default gnu if BR2_mmix && !BR2_MMIX_ABI_native
|
|
default altivec if BR2_powerpc && BR2_PPC_ABI_altivec
|
|
default no-altivec if BR2_powerpc && BR2_PPC_ABI_no-altivec
|
|
default spe if BR2_powerpc && BR2_PPC_ABI_spe
|
|
default no-spe if BR2_powerpc && BR2_PPC_ABI_no-spe
|
|
default ibmlongdouble if BR2_powerpc && BR2_PPC_ABI_ibmlongdouble
|
|
default ieeelongdouble if BR2_powerpc && BR2_PPC_ABI_ieeelongdouble
|
|
|
|
config BR2_GCC_TARGET_CPU
|
|
string
|
|
default sparchfleon if BR2_sparc_sparchfleon
|
|
default sparchfleonv8 if BR2_sparc_sparchfleonv8
|
|
default sparcsfleon if BR2_sparc_sparcsfleon
|
|
default sparcsfleonv8 if BR2_sparc_sparcsfleonv8
|