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56a315f18f
The armv8.2a generation is a cumulative extension to armv8.1a.
Since gcc correctly enables the appropriate extensions based on the core
name, we don't really need to introduce a separate config for armv8.2a,
and we can piggyback on armv8a.
In theory, gcc supports those cores in arm mode. However, configuring
gcc thusly generates a non-working gcc that constantly whines:
cc1: warning: switch -mcpu=cortex-a55 conflicts with -march=armv8.2-a switch
It is to be noted that the -march flag is internal to gcc. It is not
something that Buildroot did set when configuring gcc; Buildroot only
ever sets --with-cpu (not --with-arch).
Additionally, uClibc fails to build entirely (unsure if this is caused
by the above, or if it is a separate issue, though), with:
#### Your compiler does not support TLS and you are trying to build uClibc-ng
#### with NPTL support. Upgrade your binutils and gcc to versions which
#### support TLS for your architecture. Do not contact uClibc-ng maintainers
#### about this problem.
Glibc and musl have not been tested in arm mode, so maybe we could have
a toolchain that eventually works (or at least, pretends to be working),
but we decided it was not worth the effort.
Thus, we restrict those cores to AArch64 mode only.
Signed-off-by: "Yann E. MORIN" <yann.morin.1998@free.fr>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
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| .. | ||
| arch.mk | ||
| arch.mk.riscv | ||
| arch.mk.xtensa | ||
| Config.in | ||
| Config.in.arc | ||
| Config.in.arm | ||
| Config.in.csky | ||
| Config.in.m68k | ||
| Config.in.microblaze | ||
| Config.in.mips | ||
| Config.in.nios2 | ||
| Config.in.or1k | ||
| Config.in.powerpc | ||
| Config.in.riscv | ||
| Config.in.sh | ||
| Config.in.sparc | ||
| Config.in.x86 | ||
| Config.in.xtensa | ||