buildroot/board/in-circuit/icnova-a20-adb4006
Ludwig Kormann 122af7e193 configs/icnova-a20-adb4006: add uboot patch for reliable bootclk
Up until now cpu clock gets initialized at 384 MHz, which is
the highest supported cpu clock.

Recent A20 batches show an increased percentage of modules
reacting very sensitive to operating conditions outside the
specifications.

The cpu dies very shortly after PLLs, core frequency or cpu
voltage are missconfigured. E.g.:
- uboot SPL selects 384 MHz as cpu clock which requires a cpu
  voltage of at least 1.1 V.
- Linux CPU Frequency scaling with most sun7i dts will reduce
  cpu voltage down to 1.0 V.
- When intiating a reboot or reset from linux the cpu voltage
  may keep the 1.0 V configuration and the cpu dies during SPL
  initialization.

Therefore reduce cpu clock at uboot SPL initialization down
to 144 MHz from 384 MHz.

Use patch until KConfig option in uboot becomes available.

Signed-off-by: Ludwig Kormann <ludwig.kormann@ict42.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
2024-10-26 21:00:02 +02:00
..
patches configs/icnova-a20-adb4006: add uboot patch for reliable bootclk 2024-10-26 21:00:02 +02:00
boot.cmd configs/icnova-a20-adb4006: new defconfig 2023-08-08 21:41:46 +02:00
genimage.cfg configs/icnova-a20-adb4006: new defconfig 2023-08-08 21:41:46 +02:00
linux.fragment configs/icnova-a20-adb4006: new defconfig 2023-08-08 21:41:46 +02:00