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arch/mips: add (Marvell) Octeon II processor

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The compiler recognizes a specific 'march' value for Octeon II processors,
so create a 'Target Architecture Variant' entry for it in the target menu.

Signed-off-by: Thomas De Schampheleire <thomas.de_schampheleire@nokia.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
This commit is contained in:
Thomas De Schampheleire 2019-01-30 21:12:23 +01:00 committed by Thomas Petazzoni
parent c49d446767
commit b21e159b5d
1 changed files with 8 additions and 0 deletions
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8
arch/Config.in.mips
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@ -122,6 +122,13 @@ config BR2_mips_i6400
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R6
select BR2_ARCH_NEEDS_GCC_AT_LEAST_6
config BR2_mips_octeon2
bool "Octeon II"
depends on BR2_ARCH_IS_64
select BR2_MIPS_CPU_MIPS64R2
help
Marvell (formerly Cavium Networks) Octeon II CN60XX
processors.
config BR2_mips_p6600
bool "P6600"
depends on BR2_ARCH_IS_64
@ -241,6 +248,7 @@ config BR2_GCC_TARGET_ARCH
default "mips64r5" if BR2_mips_64r5
default "mips64r6" if BR2_mips_64r6
default "i6400" if BR2_mips_i6400
default "octeon2" if BR2_mips_octeon2
default "p6600" if BR2_mips_p6600
config BR2_MIPS_OABI32