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package/riscv-isa-sim: bump to git version 00dfa28cd7

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riscv-isa-sim (Spike) has not received any tag or release in the past
years. As of the time of this commit, the latest release is still
v1.1.0 (2021-12-17), see [1].

This commit bumps to the latest commit 00dfa28cd7. For the commit log,
see [2]. This bump includes many RISC-V spec and extension updates.

Also, when host gcc >= 13, riscv-isa-sim compilation fails with
output:

    In file included from ./fesvr/syscall.h:6,
                     from ./fesvr/syscall.cc:3:
    ./fesvr/device.h:15:30: error: 'uint64_t' was not declared in this scope
       15 |   typedef std::function<void(uint64_t)> callback_t;
          |                              ^~~~~~~~

This bump includes commits for fix those issues. For example, see [3].

Fixes: [4] and few others.

[1] https://github.com/riscv-software-src/riscv-isa-sim/releases/tag/v1.1.0
[2] 00dfa28cd7
[3] 0a7bb5403d
[4] http://autobuild.buildroot.org/results/c30/c300f1c84033aec1d265b682e4c1da5362d25f8b/

Signed-off-by: Julien Olivain <ju.o@free.fr>
Signed-off-by: Arnout Vandecappelle <arnout@mind.be>
This commit is contained in:
Julien Olivain 2024-06-02 16:43:43 +02:00 committed by Arnout Vandecappelle
parent 6701a91e69
commit 853b7661bf
2 changed files with 3 additions and 3 deletions
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2
package/riscv-isa-sim/riscv-isa-sim.hash
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@ -1,3 +1,3 @@
# Locally computed
sha256 9b29c220fed1e867e3bea4b5c565f2629237d525a4d9fe1668699c4406003a1f riscv-isa-sim-1.1.0.tar.gz
sha256 fb4420fbc8fe88799e5cd3195920afab99a18bc919e6c675a5e55c7c90079cb4 riscv-isa-sim-00dfa28cd71326a9b553052bf0160cb76f0e7e07.tar.gz
sha256 c65e436d18972c9c4bd192494fe4870bd2e158179474975b80a3559f27631632 LICENSE

4
package/riscv-isa-sim/riscv-isa-sim.mk
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@ -4,8 +4,8 @@
#
################################################################################
RISCV_ISA_SIM_VERSION = 1.1.0
RISCV_ISA_SIM_SITE = $(call github,riscv-software-src,riscv-isa-sim,v$(RISCV_ISA_SIM_VERSION))
RISCV_ISA_SIM_VERSION = 00dfa28cd71326a9b553052bf0160cb76f0e7e07
RISCV_ISA_SIM_SITE = $(call github,riscv-software-src,riscv-isa-sim,$(RISCV_ISA_SIM_VERSION))
RISCV_ISA_SIM_LICENSE = BSD-3-Clause
RISCV_ISA_SIM_LICENSE_FILES = LICENSE
HOST_RISCV_ISA_SIM_DEPENDENCIES = host-boost host-dtc