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https://sourceware.org/git/binutils-gdb.git
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fd67aa1129
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
252 lines
6.1 KiB
Plaintext
252 lines
6.1 KiB
Plaintext
@c Copyright (C) 2001-2024 Free Software Foundation, Inc.
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@c This is part of the GAS manual.
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@c For copying conditions, see the file as.texinfo.
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@c man end
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@ifset GENERIC
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@page
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@node PPC-Dependent
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@chapter PowerPC Dependent Features
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@end ifset
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@ifclear GENERIC
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@node Machine Dependencies
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@chapter PowerPC Dependent Features
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@end ifclear
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@cindex PowerPC support
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@menu
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* PowerPC-Opts:: Options
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* PowerPC-Pseudo:: PowerPC Assembler Directives
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* PowerPC-Syntax:: PowerPC Syntax
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@end menu
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@node PowerPC-Opts
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@section Options
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@cindex options for PowerPC
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@cindex PowerPC options
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@cindex architectures, PowerPC
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@cindex PowerPC architectures
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The PowerPC chip family includes several successive levels, using the same
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core instruction set, but including a few additional instructions at
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each level. There are exceptions to this however. For details on what
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instructions each variant supports, please see the chip's architecture
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reference manual.
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The following table lists all available PowerPC options.
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@c man begin OPTIONS
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@table @gcctabopt
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@item -a32
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Generate ELF32 or XCOFF32.
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@item -a64
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Generate ELF64 or XCOFF64.
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@item -K PIC
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Set EF_PPC_RELOCATABLE_LIB in ELF flags.
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@item -mpwrx | -mpwr2
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Generate code for POWER/2 (RIOS2).
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@item -mpwr
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Generate code for POWER (RIOS1)
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@item -m601
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Generate code for PowerPC 601.
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@item -mppc, -mppc32, -m603, -m604
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Generate code for PowerPC 603/604.
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@item -m403, -m405
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Generate code for PowerPC 403/405.
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@item -m440
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Generate code for PowerPC 440. BookE and some 405 instructions.
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@item -m464
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Generate code for PowerPC 464.
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@item -m476
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Generate code for PowerPC 476.
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@item -m7400, -m7410, -m7450, -m7455
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Generate code for PowerPC 7400/7410/7450/7455.
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@item -m750cl, -mgekko, -mbroadway
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Generate code for PowerPC 750CL/Gekko/Broadway.
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@item -m821, -m850, -m860
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Generate code for PowerPC 821/850/860.
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@item -mppc64, -m620
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Generate code for PowerPC 620/625/630.
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@item -me200z2, -me200z4
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Generate code for e200 variants, e200z2 with LSP, e200z4 with SPE.
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@item -me300
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Generate code for PowerPC e300 family.
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@item -me500, -me500x2
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Generate code for Motorola e500 core complex.
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@item -me500mc
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Generate code for Freescale e500mc core complex.
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@item -me500mc64
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Generate code for Freescale e500mc64 core complex.
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@item -me5500
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Generate code for Freescale e5500 core complex.
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@item -me6500
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Generate code for Freescale e6500 core complex.
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@item -mlsp
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Enable LSP instructions. (Disables SPE and SPE2.)
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@item -mspe
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Generate code for Motorola SPE instructions. (Disables LSP.)
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@item -mspe2
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Generate code for Freescale SPE2 instructions. (Disables LSP.)
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@item -mtitan
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Generate code for AppliedMicro Titan core complex.
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@item -mppc64bridge
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Generate code for PowerPC 64, including bridge insns.
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@item -mbooke
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Generate code for 32-bit BookE.
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@item -ma2
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Generate code for A2 architecture.
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@item -maltivec
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Generate code for processors with AltiVec instructions.
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@item -mvle
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Generate code for Freescale PowerPC VLE instructions.
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@item -mvsx
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Generate code for processors with Vector-Scalar (VSX) instructions.
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@item -mhtm
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Generate code for processors with Hardware Transactional Memory instructions.
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@item -mpower4, -mpwr4
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Generate code for Power4 architecture.
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@item -mpower5, -mpwr5, -mpwr5x
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Generate code for Power5 architecture.
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@item -mpower6, -mpwr6
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Generate code for Power6 architecture.
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@item -mpower7, -mpwr7
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Generate code for Power7 architecture.
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@item -mpower8, -mpwr8
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Generate code for Power8 architecture.
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@item -mpower9, -mpwr9
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Generate code for Power9 architecture.
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@item -mpower10, -mpwr10
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Generate code for Power10 architecture.
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@item -mfuture
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Generate code for 'future' architecture.
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@item -mcell
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@item -mcell
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Generate code for Cell Broadband Engine architecture.
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@item -mcom
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Generate code Power/PowerPC common instructions.
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@item -many
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Generate code for any architecture (PWR/PWRX/PPC).
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@item -mregnames
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Allow symbolic names for registers.
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@item -mno-regnames
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Do not allow symbolic names for registers.
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@item -mrelocatable
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Support for GCC's -mrelocatable option.
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@item -mrelocatable-lib
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Support for GCC's -mrelocatable-lib option.
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@item -memb
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Set PPC_EMB bit in ELF flags.
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@item -mlittle, -mlittle-endian, -le
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Generate code for a little endian machine.
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@item -mbig, -mbig-endian, -be
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Generate code for a big endian machine.
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@item -msolaris
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Generate code for Solaris.
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@item -mno-solaris
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Do not generate code for Solaris.
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@item -nops=@var{count}
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If an alignment directive inserts more than @var{count} nops, put a
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branch at the beginning to skip execution of the nops.
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@end table
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@c man end
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@node PowerPC-Pseudo
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@section PowerPC Assembler Directives
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@cindex directives for PowerPC
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@cindex PowerPC directives
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A number of assembler directives are available for PowerPC. The
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following table is far from complete.
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@table @code
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@item .machine "string"
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This directive allows you to change the machine for which code is
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generated. @code{"string"} may be any of the -m cpu selection options
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(without the -m) enclosed in double quotes, @code{"push"}, or
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@code{"pop"}. @code{.machine "push"} saves the currently selected
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cpu, which may be restored with @code{.machine "pop"}.
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@end table
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@node PowerPC-Syntax
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@section PowerPC Syntax
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@menu
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* PowerPC-Chars:: Special Characters
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@end menu
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@node PowerPC-Chars
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@subsection Special Characters
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@cindex line comment character, PowerPC
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@cindex PowerPC line comment character
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The presence of a @samp{#} on a line indicates the start of a comment
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that extends to the end of the current line.
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If a @samp{#} appears as the first character of a line then the whole
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line is treated as a comment, but in this case the line could also be
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a logical line number directive (@pxref{Comments}) or a preprocessor
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control command (@pxref{Preprocessing}).
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If the assembler has been configured for the ppc-*-solaris* target
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then the @samp{!} character also acts as a line comment character.
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This can be disabled via the @option{-mno-solaris} command-line
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option.
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@cindex line separator, PowerPC
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@cindex statement separator, PowerPC
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@cindex PowerPC line separator
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The @samp{;} character can be used to separate statements on the same
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line.
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