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https://sourceware.org/git/binutils-gdb.git
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3b1af95c73
* d10v-tdep.c, config/d10v/tm-d10v.h: Changes to allow stack backtraces and inferior function calls.
534 lines
12 KiB
C
534 lines
12 KiB
C
/* Target-dependent code for MItsubishi D10V, for GDB.
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Copyright (C) 1996 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* Contributed by Martin Hunt, hunt@cygnus.com */
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#include "defs.h"
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#include "frame.h"
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#include "obstack.h"
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#include "symtab.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "gdb_string.h"
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#include "value.h"
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#include "inferior.h"
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#include "dis-asm.h"
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#include "symfile.h"
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#include "objfiles.h"
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void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi, struct frame_saved_regs *fsr));
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/* Discard from the stack the innermost frame,
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restoring all saved registers. */
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void
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d10v_pop_frame ()
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{
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struct frame_info *frame = get_current_frame ();
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CORE_ADDR fp;
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int regnum;
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struct frame_saved_regs fsr;
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char raw_buffer[8];
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fp = FRAME_FP (frame);
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/* fill out fsr with the address of where each */
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/* register was stored in the frame */
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get_frame_saved_regs (frame, &fsr);
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/* now update the current registers with the old values */
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for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
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{
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if (fsr.regs[regnum])
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{
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read_memory (fsr.regs[regnum], raw_buffer, 8);
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write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
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}
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}
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for (regnum = 0; regnum < SP_REGNUM; regnum++)
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{
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if (fsr.regs[regnum])
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{
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write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2));
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}
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}
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if (fsr.regs[PSW_REGNUM])
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{
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write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2));
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}
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write_register (PC_REGNUM, read_register(13));
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write_register (SP_REGNUM, fp + frame->size);
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target_store_registers (-1);
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flush_cached_frames ();
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}
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static int
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check_prologue (op)
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unsigned short op;
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{
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/* st rn, @-sp */
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if ((op & 0x7E1F) == 0x6C1F)
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return 1;
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/* st2w rn, @-sp */
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if ((op & 0x7E3F) == 0x6E1F)
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return 1;
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/* subi sp, n */
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if ((op & 0x7FE1) == 0x01E1)
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return 1;
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/* mv r11, sp */
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if (op == 0x417E)
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return 1;
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/* nop */
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if (op == 0x5E00)
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return 1;
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/* st rn, @sp */
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if ((op & 0x7E1F) == 0x681E)
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return 1;
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/* st2w rn, @sp */
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if ((op & 0x7E3F) == 0x3A1E)
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return 1;
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return 0;
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}
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CORE_ADDR
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d10v_skip_prologue (pc)
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CORE_ADDR pc;
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{
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unsigned long op;
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unsigned short op1, op2;
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if (target_read_memory (pc, (char *)&op, 4))
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return pc; /* Can't access it -- assume no prologue. */
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while (1)
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{
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op = (unsigned long)read_memory_integer (pc, 4);
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if ((op & 0xC0000000) == 0xC0000000)
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{
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/* long instruction */
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if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
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((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
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((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
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break;
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}
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else
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{
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/* short instructions */
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op1 = (op & 0x3FFF8000) >> 15;
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op2 = op & 0x7FFF;
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if (!check_prologue(op1) || !check_prologue(op2))
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break;
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}
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pc += 4;
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}
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return pc;
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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*/
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CORE_ADDR
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d10v_frame_chain (frame)
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struct frame_info *frame;
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{
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struct frame_saved_regs fsr;
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if (inside_entry_file (frame->pc))
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return 0;
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d10v_frame_find_saved_regs (frame, &fsr);
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if (!fsr.regs[FP_REGNUM])
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{
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return (CORE_ADDR)fsr.regs[SP_REGNUM];
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}
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return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2);
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}
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static int next_addr;
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static int
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prologue_find_regs (op, fsr, addr)
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unsigned short op;
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struct frame_saved_regs *fsr;
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CORE_ADDR addr;
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{
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int n;
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/* st rn, @-sp */
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if ((op & 0x7E1F) == 0x6C1F)
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{
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n = (op & 0x1E0) >> 5;
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next_addr -= 2;
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fsr->regs[n] = next_addr;
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return 1;
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}
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/* st2w rn, @-sp */
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else if ((op & 0x7E3F) == 0x6E1F)
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{
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n = (op & 0x1E0) >> 5;
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next_addr -= 4;
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fsr->regs[n] = next_addr;
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fsr->regs[n+1] = next_addr+2;
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return 1;
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}
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/* subi sp, n */
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if ((op & 0x7FE1) == 0x01E1)
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{
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n = (op & 0x1E) >> 1;
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if (n == 0)
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n = 16;
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next_addr -= n;
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return 1;
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}
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/* mv r11, sp */
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if (op == 0x417E)
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return 1;
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/* nop */
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if (op == 0x5E00)
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return 1;
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/* st rn, @sp */
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if ((op & 0x7E1F) == 0x681E)
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{
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n = (op & 0x1E0) >> 5;
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fsr->regs[n] = next_addr;
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return 1;
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}
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/* st2w rn, @sp */
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if ((op & 0x7E3F) == 0x3A1E)
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{
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n = (op & 0x1E0) >> 5;
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fsr->regs[n] = next_addr;
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fsr->regs[n+1] = next_addr+2;
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return 1;
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}
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return 0;
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}
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/* Put here the code to store, into a struct frame_saved_regs, the
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addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special: the address we
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return for it IS the sp for the next frame. */
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void
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d10v_frame_find_saved_regs (fi, fsr)
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struct frame_info *fi;
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struct frame_saved_regs *fsr;
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{
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CORE_ADDR fp, pc;
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unsigned long op;
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unsigned short op1, op2;
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int i;
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fp = fi->frame;
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memset (fsr, 0, sizeof (*fsr));
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next_addr = 0;
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pc = get_pc_function_start (fi->pc);
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while (1)
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{
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op = (unsigned long)read_memory_integer (pc, 4);
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if ((op & 0xC0000000) == 0xC0000000)
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{
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/* long instruction */
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if ((op & 0x3FFF0000) == 0x01FF0000)
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{
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/* add3 sp,sp,n */
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short n = op & 0xFFFF;
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next_addr += n;
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}
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else if ((op & 0x3F0F0000) == 0x340F0000)
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{
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/* st rn, @(offset,sp) */
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short offset = op & 0xFFFF;
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short n = (op >> 20) & 0xF;
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fsr->regs[n] = next_addr + offset;
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}
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else if ((op & 0x3F1F0000) == 0x350F0000)
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{
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/* st2w rn, @(offset,sp) */
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short offset = op & 0xFFFF;
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short n = (op >> 20) & 0xF;
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fsr->regs[n] = next_addr + offset;
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fsr->regs[n+1] = next_addr + offset + 2;
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}
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else
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break;
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}
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else
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{
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/* short instructions */
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op1 = (op & 0x3FFF8000) >> 15;
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op2 = op & 0x7FFF;
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if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
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break;
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}
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pc += 4;
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}
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fi->size = -next_addr;
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for (i=0; i<NUM_REGS-1; i++)
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if (fsr->regs[i])
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{
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fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
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}
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if (fsr->regs[13])
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fi->return_pc = (read_memory_unsigned_integer(fsr->regs[13],2)-1) << 2;
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else
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fi->return_pc = (read_register(13) - 1) << 2;
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/* th SP is not normally (ever?) saved, but check anyway */
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if (!fsr->regs[SP_REGNUM])
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{
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/* if the FP was saved, that means the current FP is valid, */
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/* otherwise, it isn't being used, so we use the SP instead */
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if (fsr->regs[FP_REGNUM])
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fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
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else
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fsr->regs[SP_REGNUM] = read_register(SP_REGNUM) + fi->size;
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}
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}
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void
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d10v_init_extra_frame_info (fromleaf, fi)
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int fromleaf;
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struct frame_info *fi;
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{
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struct frame_saved_regs dummy;
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if (fi->next && (fi->pc == 0))
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fi->pc = fi->next->return_pc;
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d10v_frame_find_saved_regs (fi, &dummy);
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if (!dummy.regs[FP_REGNUM])
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{
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fi->frame = dummy.regs[SP_REGNUM] - fi->size;
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d10v_frame_find_saved_regs (fi, &dummy);
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}
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}
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static void
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show_regs (args, from_tty)
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char *args;
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int from_tty;
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{
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long long num1, num2;
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printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
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read_register (PC_REGNUM), read_register (PC_REGNUM) << 2,
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read_register (PSW_REGNUM),
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read_register (24),
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read_register (25),
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read_register (23));
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printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n",
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read_register (0),
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read_register (1),
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read_register (2),
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read_register (3),
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read_register (4),
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read_register (5),
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read_register (6),
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read_register (7));
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printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
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read_register (8),
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read_register (9),
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read_register (10),
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read_register (11),
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read_register (12),
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read_register (13),
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read_register (14),
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read_register (15));
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read_register_gen (A0_REGNUM, (char *)&num1);
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read_register_gen (A0_REGNUM+1, (char *)&num2);
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printf_filtered ("A0-A1 %010llx %010llx\n",num1, num2);
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}
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void
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_initialize_d10v_tdep ()
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{
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tm_print_insn = print_insn_d10v;
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add_com ("regs", class_vars, show_regs, "Print all registers");
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}
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CORE_ADDR
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d10v_read_register_pid (regno, pid)
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int regno, pid;
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{
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int save_pid;
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CORE_ADDR retval;
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if (pid == inferior_pid)
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return (read_register(regno)) << 2;
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save_pid = inferior_pid;
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inferior_pid = pid;
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retval = read_register (regno);
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inferior_pid = save_pid;
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return (retval << 2);
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}
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void
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d10v_write_register_pid (regno, val, pid)
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int regno;
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LONGEST val;
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int pid;
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{
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int save_pid;
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val >>= 2;
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if (pid == inferior_pid)
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{
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write_register (regno, val);
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return;
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}
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save_pid = inferior_pid;
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inferior_pid = pid;
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write_register (regno, val);
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inferior_pid = save_pid;
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}
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void
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d10v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p)
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char *dummyname;
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CORE_ADDR start_sp;
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CORE_ADDR fun;
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int nargs;
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value_ptr *args;
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struct type *type;
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int gcc_p;
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{
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int regnum, i;
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CORE_ADDR sp;
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char buffer[MAX_REGISTER_RAW_SIZE];
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sp = start_sp;
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for (regnum = 0; regnum < NUM_REGS-1; regnum++)
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{
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store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum));
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write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum));
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sp -= REGISTER_RAW_SIZE(regnum);
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}
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write_register (SP_REGNUM, (LONGEST)sp);
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/* now we need to load PC with the return address */
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write_register (PC_REGNUM, (LONGEST)d10v_call_dummy_address()>>2);
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write_register (LR_REGNUM, (LONGEST)d10v_call_dummy_address()>>2);
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target_store_registers (-1);
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flush_cached_frames ();
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}
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CORE_ADDR
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d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
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int nargs;
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value_ptr *args;
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CORE_ADDR sp;
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int struct_return;
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CORE_ADDR struct_addr;
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{
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int i, len, regnum=2;
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char *contents;
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for (i = 0; i < nargs; i++)
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{
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value_ptr arg = args[i];
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struct type *arg_type = check_typedef (VALUE_TYPE (arg));
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switch (TYPE_CODE (arg_type))
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{
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case TYPE_CODE_INT:
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case TYPE_CODE_BOOL:
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case TYPE_CODE_CHAR:
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case TYPE_CODE_RANGE:
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case TYPE_CODE_ENUM:
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break;
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default:
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break;
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}
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len = TYPE_LENGTH (arg_type);
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contents = VALUE_CONTENTS(arg);
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switch (len)
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{
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case 1:
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write_register (regnum++, (LONGEST)(*contents));
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break;
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case 2:
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write_register (regnum++, (LONGEST)(*(short *)contents));
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break;
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case 4:
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{
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LONGEST val = *(long *)contents;
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write_register (regnum++, val >> 16 );
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write_register (regnum++, val & 0xFFFF );
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}
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break;
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default:
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}
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}
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}
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CORE_ADDR
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d10v_call_dummy_address ()
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{
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CORE_ADDR entry, retval;
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struct minimal_symbol *sym;
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entry = entry_point_address ();
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if (entry != 0)
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{
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return entry;
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}
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sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile);
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if (!sym || MSYMBOL_TYPE (sym) != mst_text)
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retval = 0;
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else
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retval = SYMBOL_VALUE_ADDRESS (sym);
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return retval;
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}
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/* Given a return value in `regbuf' with a type `valtype',
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extract and copy its value into `valbuf'. */
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void
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d10v_extract_return_value (valtype, regbuf, valbuf)
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struct type *valtype;
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char regbuf[REGISTER_BYTES];
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char *valbuf;
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{
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memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype));
|
|
}
|