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Update copyright year range in copyright header of all GDB files.
364 lines
9.7 KiB
C
364 lines
9.7 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988-2021 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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/* We define this to get types like register_t. */
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#define _KERNTYPES
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <sys/sysctl.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "arm-netbsd-tdep.h"
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#include "aarch32-tdep.h"
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#include "inf-ptrace.h"
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#include "netbsd-nat.h"
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class arm_netbsd_nat_target final : public nbsd_nat_target
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{
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public:
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/* Add our register access methods. */
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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const struct target_desc *read_description () override;
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};
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static arm_netbsd_nat_target the_arm_netbsd_nat_target;
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static void
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arm_supply_vfpregset (struct regcache *regcache, struct fpreg *fpregset)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
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if (tdep->vfp_register_count == 0)
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return;
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struct vfpreg &vfp = fpregset->fpr_vfp;
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for (int regno = 0; regno <= tdep->vfp_register_count; regno++)
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regcache->raw_supply (regno + ARM_D0_REGNUM, (char *) &vfp.vfp_regs[regno]);
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regcache->raw_supply (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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int lwp = regcache->ptid ().lwp ();
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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arm_nbsd_supply_gregset (nullptr, regcache, regno, &inferior_registers,
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sizeof (inferior_registers));
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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struct vfpreg &vfp = inferior_fp_registers.fpr_vfp;
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
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if (regno == ARM_FPSCR_REGNUM && tdep->vfp_register_count != 0)
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regcache->raw_supply (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr);
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else if (regno >= ARM_D0_REGNUM
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&& regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
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{
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regcache->raw_supply (regno,
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(char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]);
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}
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else
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warning (_("Invalid register number."));
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_vfpregset (regcache, &inferior_fp_registers);
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}
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void
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arm_netbsd_nat_target::fetch_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_register (regcache, -1);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct reg inferior_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret;
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache->raw_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache->raw_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache->raw_collect (ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache->raw_collect (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache->raw_collect (ARM_PS_REGNUM, (char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache->raw_collect (regno, (char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct reg inferior_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache->raw_collect (regno, (char *) &inferior_registers.r[regno]);
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regcache->raw_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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regcache->raw_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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regcache->raw_collect (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &pc_val);
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regcache->raw_collect (ARM_PS_REGNUM, (char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, lwp);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int lwp = regcache->ptid ().lwp ();
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int ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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struct vfpreg &vfp = inferior_fp_registers.fpr_vfp;
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point registers"));
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return;
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}
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struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
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if (regno == ARM_FPSCR_REGNUM && tdep->vfp_register_count != 0)
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regcache->raw_collect (ARM_FPSCR_REGNUM, (char *) &vfp.vfp_fpscr);
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else if (regno >= ARM_D0_REGNUM
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&& regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
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{
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regcache->raw_collect (regno,
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(char *) &vfp.vfp_regs[regno - ARM_D0_REGNUM]);
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}
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else
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warning (_("Invalid register number."));
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ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, lwp);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_fp_regs (const struct regcache *regcache)
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{
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struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
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int lwp = regcache->ptid ().lwp ();
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if (tdep->vfp_register_count == 0)
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return;
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struct fpreg fpregs;
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for (int regno = 0; regno <= tdep->vfp_register_count; regno++)
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regcache->raw_collect
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(regno + ARM_D0_REGNUM, (char *) &fpregs.fpr_vfp.vfp_regs[regno]);
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regcache->raw_collect (ARM_FPSCR_REGNUM,
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(char *) &fpregs.fpr_vfp.vfp_fpscr);
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int ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &fpregs, lwp);
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if (ret < 0)
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warning (_("unable to store floating-point registers"));
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}
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void
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arm_netbsd_nat_target::store_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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store_register (regcache, regno);
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else
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store_fp_register (regcache, regno);
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}
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else
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{
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store_regs (regcache);
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store_fp_regs (regcache);
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}
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}
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const struct target_desc *
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arm_netbsd_nat_target::read_description ()
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{
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int flag;
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size_t len = sizeof (flag);
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if (sysctlbyname("machdep.fpu_present", &flag, &len, NULL, 0) != 0
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|| !flag)
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return arm_read_description (ARM_FP_TYPE_NONE);
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len = sizeof(flag);
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if (sysctlbyname("machdep.neon_present", &flag, &len, NULL, 0) == 0 && flag)
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return aarch32_read_description ();
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return arm_read_description (ARM_FP_TYPE_VFPV3);
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}
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void _initialize_arm_netbsd_nat ();
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void
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_initialize_arm_netbsd_nat ()
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{
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add_inf_child_target (&the_arm_netbsd_nat_target);
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}
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