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8382113fdb
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces the Matrix Multiply (Int8, F32, F64) extensions
to the aarch64 backend.
The following instructions are added: {s/u}mmla, usmmla, {us/su}dot,
fmmla, ld1rob, ld1roh, d1row, ld1rod, uzip{1/2}, trn{1/2}.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.
(parse_operands): Add new operand.
* testsuite/gas/aarch64/i8mm.s: New test.
* testsuite/gas/aarch64/i8mm.d: New test.
* testsuite/gas/aarch64/f32mm.s: New test.
* testsuite/gas/aarch64/f32mm.d: New test.
* testsuite/gas/aarch64/f64mm.s: New test.
* testsuite/gas/aarch64/f64mm.d: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.s: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.d: New test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_I8MM): New.
(AARCH64_FEATURE_F32MM): New.
(AARCH64_FEATURE_F64MM): New.
(AARCH64_OPND_SVE_ADDR_RI_S4x32): New.
(enum aarch64_insn_class): Add new instruction class "aarch64_misc" for
instructions that do not require special handling.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* aarch64-tbl.h (aarch64_feature_i8mm_sve, aarch64_feature_f32mm_sve,
aarch64_feature_f64mm_sve, aarch64_feature_i8mm, aarch64_feature_f32mm,
aarch64_feature_f64mm): New feature sets.
(INT8MATMUL_INSN, F64MATMUL_SVE_INSN, F64MATMUL_INSN,
F32MATMUL_SVE_INSN, F32MATMUL_INSN): New macros to define matrix multiply
instructions.
(I8MM_SVE, F32MM_SVE, F64MM_SVE, I8MM, F32MM, F64MM): New feature set
macros.
(QL_MMLA64, OP_SVE_SBB): New qualifiers.
(OP_SVE_QQQ): New qualifier.
(INT8MATMUL_SVE_INSNC, F64MATMUL_SVE_INSNC,
F32MATMUL_SVE_INSNC): New feature set for bfloat16 instructions to support
the movprfx constraint.
(aarch64_opcode_table): Support for SVE_ADDR_RI_S4x32.
(aarch64_opcode_table): Define new instructions smmla,
ummla, usmmla, usdot, sudot, fmmla, ld1rob, ld1roh, ld1row, ld1rod
uzip{1/2}, trn{1/2}.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_SVE_ADDR_RI_S4x32.
(aarch64_print_operand): Handle AARCH64_OPND_SVE_ADDR_RI_S4x32.
* aarch64-dis-2.c (aarch64_opcode_lookup_1, aarch64_find_next_opcode):
Account for new instructions.
* opcodes/aarch64-asm-2.c (aarch64_insert_operand): Support the new
S4x32 operand.
* aarch64-opc-2.c (aarch64_operands): Support the new S4x32 operand.
Regression tested on arm-none-eabi.
Is it ok for trunk?
Regards,
Mihail
866 lines
22 KiB
C
866 lines
22 KiB
C
/* This file is automatically generated by aarch64-gen. Do not edit! */
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/* Copyright (C) 2012-2019 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "aarch64-asm.h"
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const aarch64_opcode *
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aarch64_find_real_opcode (const aarch64_opcode *opcode)
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{
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/* Use the index as the key to locate the real opcode. */
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int key = opcode - aarch64_opcode_table;
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int value;
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switch (key)
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{
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case 3: /* ngc */
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case 2: /* sbc */
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value = 2; /* --> sbc. */
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break;
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case 5: /* ngcs */
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case 4: /* sbcs */
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value = 4; /* --> sbcs. */
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break;
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case 8: /* cmn */
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case 7: /* adds */
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value = 7; /* --> adds. */
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break;
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case 11: /* cmp */
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case 10: /* subs */
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value = 10; /* --> subs. */
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break;
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case 13: /* mov */
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case 12: /* add */
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value = 12; /* --> add. */
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break;
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case 15: /* cmn */
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case 14: /* adds */
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value = 14; /* --> adds. */
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break;
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case 18: /* cmp */
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case 17: /* subs */
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value = 17; /* --> subs. */
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break;
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case 23: /* cmn */
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case 22: /* adds */
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value = 22; /* --> adds. */
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break;
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case 25: /* neg */
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case 24: /* sub */
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value = 24; /* --> sub. */
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break;
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case 27: /* cmp */
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case 28: /* negs */
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case 26: /* subs */
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value = 26; /* --> subs. */
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break;
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case 153: /* mov */
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case 152: /* umov */
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value = 152; /* --> umov. */
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break;
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case 155: /* mov */
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case 154: /* ins */
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value = 154; /* --> ins. */
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break;
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case 157: /* mov */
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case 156: /* ins */
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value = 156; /* --> ins. */
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break;
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case 243: /* mvn */
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case 242: /* not */
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value = 242; /* --> not. */
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break;
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case 318: /* mov */
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case 317: /* orr */
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value = 317; /* --> orr. */
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break;
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case 389: /* sxtl */
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case 388: /* sshll */
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value = 388; /* --> sshll. */
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break;
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case 391: /* sxtl2 */
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case 390: /* sshll2 */
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value = 390; /* --> sshll2. */
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break;
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case 413: /* uxtl */
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case 412: /* ushll */
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value = 412; /* --> ushll. */
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break;
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case 415: /* uxtl2 */
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case 414: /* ushll2 */
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value = 414; /* --> ushll2. */
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break;
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case 536: /* mov */
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case 535: /* dup */
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value = 535; /* --> dup. */
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break;
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case 623: /* sxtw */
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case 622: /* sxth */
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case 621: /* sxtb */
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case 624: /* asr */
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case 620: /* sbfx */
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case 619: /* sbfiz */
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case 618: /* sbfm */
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value = 618; /* --> sbfm. */
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break;
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case 627: /* bfc */
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case 628: /* bfxil */
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case 626: /* bfi */
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case 625: /* bfm */
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value = 625; /* --> bfm. */
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break;
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case 633: /* uxth */
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case 632: /* uxtb */
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case 635: /* lsr */
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case 634: /* lsl */
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case 631: /* ubfx */
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case 630: /* ubfiz */
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case 629: /* ubfm */
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value = 629; /* --> ubfm. */
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break;
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case 665: /* cset */
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case 664: /* cinc */
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case 663: /* csinc */
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value = 663; /* --> csinc. */
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break;
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case 668: /* csetm */
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case 667: /* cinv */
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case 666: /* csinv */
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value = 666; /* --> csinv. */
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break;
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case 670: /* cneg */
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case 669: /* csneg */
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value = 669; /* --> csneg. */
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break;
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case 688: /* rev */
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case 689: /* rev64 */
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value = 688; /* --> rev. */
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break;
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case 714: /* lsl */
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case 713: /* lslv */
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value = 713; /* --> lslv. */
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break;
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case 716: /* lsr */
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case 715: /* lsrv */
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value = 715; /* --> lsrv. */
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break;
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case 718: /* asr */
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case 717: /* asrv */
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value = 717; /* --> asrv. */
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break;
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case 720: /* ror */
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case 719: /* rorv */
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value = 719; /* --> rorv. */
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break;
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case 723: /* cmpp */
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case 722: /* subps */
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value = 722; /* --> subps. */
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break;
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case 736: /* mul */
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case 735: /* madd */
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value = 735; /* --> madd. */
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break;
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case 738: /* mneg */
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case 737: /* msub */
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value = 737; /* --> msub. */
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break;
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case 740: /* smull */
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case 739: /* smaddl */
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value = 739; /* --> smaddl. */
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break;
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case 742: /* smnegl */
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case 741: /* smsubl */
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value = 741; /* --> smsubl. */
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break;
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case 745: /* umull */
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case 744: /* umaddl */
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value = 744; /* --> umaddl. */
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break;
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case 747: /* umnegl */
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case 746: /* umsubl */
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value = 746; /* --> umsubl. */
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break;
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case 758: /* ror */
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case 757: /* extr */
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value = 757; /* --> extr. */
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break;
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case 991: /* bic */
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case 990: /* and */
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value = 990; /* --> and. */
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break;
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case 993: /* mov */
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case 992: /* orr */
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value = 992; /* --> orr. */
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break;
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case 996: /* tst */
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case 995: /* ands */
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value = 995; /* --> ands. */
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break;
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case 1001: /* uxtw */
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case 1000: /* mov */
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case 999: /* orr */
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value = 999; /* --> orr. */
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break;
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case 1003: /* mvn */
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case 1002: /* orn */
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value = 1002; /* --> orn. */
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break;
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case 1007: /* tst */
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case 1006: /* ands */
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value = 1006; /* --> ands. */
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break;
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case 1133: /* staddb */
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case 1037: /* ldaddb */
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value = 1037; /* --> ldaddb. */
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break;
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case 1134: /* staddh */
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case 1038: /* ldaddh */
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value = 1038; /* --> ldaddh. */
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break;
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case 1135: /* stadd */
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case 1039: /* ldadd */
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value = 1039; /* --> ldadd. */
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break;
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case 1136: /* staddlb */
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case 1041: /* ldaddlb */
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value = 1041; /* --> ldaddlb. */
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break;
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case 1137: /* staddlh */
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case 1044: /* ldaddlh */
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value = 1044; /* --> ldaddlh. */
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break;
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case 1138: /* staddl */
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case 1047: /* ldaddl */
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value = 1047; /* --> ldaddl. */
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break;
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case 1139: /* stclrb */
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case 1049: /* ldclrb */
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value = 1049; /* --> ldclrb. */
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break;
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case 1140: /* stclrh */
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case 1050: /* ldclrh */
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value = 1050; /* --> ldclrh. */
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break;
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case 1141: /* stclr */
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case 1051: /* ldclr */
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value = 1051; /* --> ldclr. */
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break;
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case 1142: /* stclrlb */
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case 1053: /* ldclrlb */
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value = 1053; /* --> ldclrlb. */
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break;
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case 1143: /* stclrlh */
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case 1056: /* ldclrlh */
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value = 1056; /* --> ldclrlh. */
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break;
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case 1144: /* stclrl */
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case 1059: /* ldclrl */
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value = 1059; /* --> ldclrl. */
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break;
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case 1145: /* steorb */
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case 1061: /* ldeorb */
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value = 1061; /* --> ldeorb. */
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break;
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case 1146: /* steorh */
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case 1062: /* ldeorh */
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value = 1062; /* --> ldeorh. */
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break;
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case 1147: /* steor */
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case 1063: /* ldeor */
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value = 1063; /* --> ldeor. */
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break;
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case 1148: /* steorlb */
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case 1065: /* ldeorlb */
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value = 1065; /* --> ldeorlb. */
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break;
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case 1149: /* steorlh */
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case 1068: /* ldeorlh */
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value = 1068; /* --> ldeorlh. */
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break;
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case 1150: /* steorl */
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case 1071: /* ldeorl */
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value = 1071; /* --> ldeorl. */
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break;
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case 1151: /* stsetb */
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case 1073: /* ldsetb */
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value = 1073; /* --> ldsetb. */
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break;
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case 1152: /* stseth */
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case 1074: /* ldseth */
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value = 1074; /* --> ldseth. */
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break;
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case 1153: /* stset */
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case 1075: /* ldset */
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value = 1075; /* --> ldset. */
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break;
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case 1154: /* stsetlb */
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case 1077: /* ldsetlb */
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value = 1077; /* --> ldsetlb. */
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break;
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case 1155: /* stsetlh */
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case 1080: /* ldsetlh */
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value = 1080; /* --> ldsetlh. */
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break;
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case 1156: /* stsetl */
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case 1083: /* ldsetl */
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value = 1083; /* --> ldsetl. */
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break;
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case 1157: /* stsmaxb */
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case 1085: /* ldsmaxb */
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value = 1085; /* --> ldsmaxb. */
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break;
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case 1158: /* stsmaxh */
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case 1086: /* ldsmaxh */
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value = 1086; /* --> ldsmaxh. */
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break;
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case 1159: /* stsmax */
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case 1087: /* ldsmax */
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value = 1087; /* --> ldsmax. */
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break;
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case 1160: /* stsmaxlb */
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case 1089: /* ldsmaxlb */
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value = 1089; /* --> ldsmaxlb. */
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break;
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case 1161: /* stsmaxlh */
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case 1092: /* ldsmaxlh */
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value = 1092; /* --> ldsmaxlh. */
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break;
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case 1162: /* stsmaxl */
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case 1095: /* ldsmaxl */
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value = 1095; /* --> ldsmaxl. */
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break;
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case 1163: /* stsminb */
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case 1097: /* ldsminb */
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value = 1097; /* --> ldsminb. */
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break;
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case 1164: /* stsminh */
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case 1098: /* ldsminh */
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value = 1098; /* --> ldsminh. */
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break;
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case 1165: /* stsmin */
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case 1099: /* ldsmin */
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value = 1099; /* --> ldsmin. */
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break;
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case 1166: /* stsminlb */
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case 1101: /* ldsminlb */
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value = 1101; /* --> ldsminlb. */
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break;
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case 1167: /* stsminlh */
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case 1104: /* ldsminlh */
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value = 1104; /* --> ldsminlh. */
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break;
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case 1168: /* stsminl */
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case 1107: /* ldsminl */
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value = 1107; /* --> ldsminl. */
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break;
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case 1169: /* stumaxb */
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case 1109: /* ldumaxb */
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value = 1109; /* --> ldumaxb. */
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break;
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case 1170: /* stumaxh */
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case 1110: /* ldumaxh */
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value = 1110; /* --> ldumaxh. */
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break;
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case 1171: /* stumax */
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case 1111: /* ldumax */
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value = 1111; /* --> ldumax. */
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break;
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case 1172: /* stumaxlb */
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case 1113: /* ldumaxlb */
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value = 1113; /* --> ldumaxlb. */
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break;
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case 1173: /* stumaxlh */
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case 1116: /* ldumaxlh */
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value = 1116; /* --> ldumaxlh. */
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break;
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case 1174: /* stumaxl */
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case 1119: /* ldumaxl */
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value = 1119; /* --> ldumaxl. */
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break;
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case 1175: /* stuminb */
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case 1121: /* lduminb */
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value = 1121; /* --> lduminb. */
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break;
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case 1176: /* stuminh */
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case 1122: /* lduminh */
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value = 1122; /* --> lduminh. */
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break;
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case 1177: /* stumin */
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case 1123: /* ldumin */
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value = 1123; /* --> ldumin. */
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break;
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case 1178: /* stuminlb */
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case 1125: /* lduminlb */
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value = 1125; /* --> lduminlb. */
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break;
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case 1179: /* stuminlh */
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case 1128: /* lduminlh */
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value = 1128; /* --> lduminlh. */
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break;
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case 1180: /* stuminl */
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case 1131: /* lduminl */
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value = 1131; /* --> lduminl. */
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break;
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case 1182: /* mov */
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case 1181: /* movn */
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value = 1181; /* --> movn. */
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break;
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case 1184: /* mov */
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case 1183: /* movz */
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value = 1183; /* --> movz. */
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break;
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case 1234: /* autibsp */
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case 1233: /* autibz */
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case 1232: /* autiasp */
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case 1231: /* autiaz */
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case 1230: /* pacibsp */
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case 1229: /* pacibz */
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case 1228: /* paciasp */
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case 1227: /* paciaz */
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case 1208: /* psb */
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case 1207: /* esb */
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case 1206: /* autib1716 */
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case 1205: /* autia1716 */
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case 1204: /* pacib1716 */
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case 1203: /* pacia1716 */
|
|
case 1202: /* xpaclri */
|
|
case 1201: /* sevl */
|
|
case 1200: /* sev */
|
|
case 1199: /* wfi */
|
|
case 1198: /* wfe */
|
|
case 1197: /* yield */
|
|
case 1196: /* bti */
|
|
case 1195: /* csdb */
|
|
case 1194: /* nop */
|
|
case 1193: /* hint */
|
|
value = 1193; /* --> hint. */
|
|
break;
|
|
case 1212: /* pssbb */
|
|
case 1211: /* ssbb */
|
|
case 1210: /* dsb */
|
|
value = 1210; /* --> dsb. */
|
|
break;
|
|
case 1223: /* cpp */
|
|
case 1222: /* dvp */
|
|
case 1221: /* cfp */
|
|
case 1220: /* tlbi */
|
|
case 1219: /* ic */
|
|
case 1218: /* dc */
|
|
case 1217: /* at */
|
|
case 1216: /* sys */
|
|
value = 1216; /* --> sys. */
|
|
break;
|
|
case 2032: /* bic */
|
|
case 1282: /* and */
|
|
value = 1282; /* --> and. */
|
|
break;
|
|
case 1265: /* mov */
|
|
case 1284: /* and */
|
|
value = 1284; /* --> and. */
|
|
break;
|
|
case 1269: /* movs */
|
|
case 1285: /* ands */
|
|
value = 1285; /* --> ands. */
|
|
break;
|
|
case 2033: /* cmple */
|
|
case 1320: /* cmpge */
|
|
value = 1320; /* --> cmpge. */
|
|
break;
|
|
case 2036: /* cmplt */
|
|
case 1323: /* cmpgt */
|
|
value = 1323; /* --> cmpgt. */
|
|
break;
|
|
case 2034: /* cmplo */
|
|
case 1325: /* cmphi */
|
|
value = 1325; /* --> cmphi. */
|
|
break;
|
|
case 2035: /* cmpls */
|
|
case 1328: /* cmphs */
|
|
value = 1328; /* --> cmphs. */
|
|
break;
|
|
case 1262: /* mov */
|
|
case 1350: /* cpy */
|
|
value = 1350; /* --> cpy. */
|
|
break;
|
|
case 1264: /* mov */
|
|
case 1351: /* cpy */
|
|
value = 1351; /* --> cpy. */
|
|
break;
|
|
case 2043: /* fmov */
|
|
case 1267: /* mov */
|
|
case 1352: /* cpy */
|
|
value = 1352; /* --> cpy. */
|
|
break;
|
|
case 1257: /* mov */
|
|
case 1364: /* dup */
|
|
value = 1364; /* --> dup. */
|
|
break;
|
|
case 1259: /* mov */
|
|
case 1256: /* mov */
|
|
case 1365: /* dup */
|
|
value = 1365; /* --> dup. */
|
|
break;
|
|
case 2042: /* fmov */
|
|
case 1261: /* mov */
|
|
case 1366: /* dup */
|
|
value = 1366; /* --> dup. */
|
|
break;
|
|
case 1260: /* mov */
|
|
case 1367: /* dupm */
|
|
value = 1367; /* --> dupm. */
|
|
break;
|
|
case 2037: /* eon */
|
|
case 1369: /* eor */
|
|
value = 1369; /* --> eor. */
|
|
break;
|
|
case 1270: /* not */
|
|
case 1371: /* eor */
|
|
value = 1371; /* --> eor. */
|
|
break;
|
|
case 1271: /* nots */
|
|
case 1372: /* eors */
|
|
value = 1372; /* --> eors. */
|
|
break;
|
|
case 2038: /* facle */
|
|
case 1377: /* facge */
|
|
value = 1377; /* --> facge. */
|
|
break;
|
|
case 2039: /* faclt */
|
|
case 1378: /* facgt */
|
|
value = 1378; /* --> facgt. */
|
|
break;
|
|
case 2040: /* fcmle */
|
|
case 1391: /* fcmge */
|
|
value = 1391; /* --> fcmge. */
|
|
break;
|
|
case 2041: /* fcmlt */
|
|
case 1393: /* fcmgt */
|
|
value = 1393; /* --> fcmgt. */
|
|
break;
|
|
case 1254: /* fmov */
|
|
case 1399: /* fcpy */
|
|
value = 1399; /* --> fcpy. */
|
|
break;
|
|
case 1253: /* fmov */
|
|
case 1422: /* fdup */
|
|
value = 1422; /* --> fdup. */
|
|
break;
|
|
case 1255: /* mov */
|
|
case 1753: /* orr */
|
|
value = 1753; /* --> orr. */
|
|
break;
|
|
case 2044: /* orn */
|
|
case 1754: /* orr */
|
|
value = 1754; /* --> orr. */
|
|
break;
|
|
case 1258: /* mov */
|
|
case 1756: /* orr */
|
|
value = 1756; /* --> orr. */
|
|
break;
|
|
case 1268: /* movs */
|
|
case 1757: /* orrs */
|
|
value = 1757; /* --> orrs. */
|
|
break;
|
|
case 1263: /* mov */
|
|
case 1819: /* sel */
|
|
value = 1819; /* --> sel. */
|
|
break;
|
|
case 1266: /* mov */
|
|
case 1820: /* sel */
|
|
value = 1820; /* --> sel. */
|
|
break;
|
|
default: return NULL;
|
|
}
|
|
|
|
return aarch64_opcode_table + value;
|
|
}
|
|
|
|
bfd_boolean
|
|
aarch64_insert_operand (const aarch64_operand *self,
|
|
const aarch64_opnd_info *info,
|
|
aarch64_insn *code, const aarch64_inst *inst,
|
|
aarch64_operand_error *errors)
|
|
{
|
|
/* Use the index as the key. */
|
|
int key = self - aarch64_operands;
|
|
switch (key)
|
|
{
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
case 4:
|
|
case 5:
|
|
case 6:
|
|
case 7:
|
|
case 8:
|
|
case 9:
|
|
case 10:
|
|
case 11:
|
|
case 12:
|
|
case 16:
|
|
case 17:
|
|
case 18:
|
|
case 19:
|
|
case 21:
|
|
case 22:
|
|
case 23:
|
|
case 24:
|
|
case 25:
|
|
case 26:
|
|
case 27:
|
|
case 28:
|
|
case 29:
|
|
case 30:
|
|
case 163:
|
|
case 164:
|
|
case 165:
|
|
case 166:
|
|
case 167:
|
|
case 168:
|
|
case 169:
|
|
case 170:
|
|
case 171:
|
|
case 172:
|
|
case 187:
|
|
case 188:
|
|
case 189:
|
|
case 190:
|
|
case 191:
|
|
case 192:
|
|
case 193:
|
|
case 194:
|
|
case 195:
|
|
case 201:
|
|
case 204:
|
|
return aarch64_ins_regno (self, info, code, inst, errors);
|
|
case 14:
|
|
return aarch64_ins_reg_extended (self, info, code, inst, errors);
|
|
case 15:
|
|
return aarch64_ins_reg_shifted (self, info, code, inst, errors);
|
|
case 20:
|
|
return aarch64_ins_ft (self, info, code, inst, errors);
|
|
case 31:
|
|
case 32:
|
|
case 33:
|
|
case 34:
|
|
case 207:
|
|
return aarch64_ins_reglane (self, info, code, inst, errors);
|
|
case 35:
|
|
return aarch64_ins_reglist (self, info, code, inst, errors);
|
|
case 36:
|
|
return aarch64_ins_ldst_reglist (self, info, code, inst, errors);
|
|
case 37:
|
|
return aarch64_ins_ldst_reglist_r (self, info, code, inst, errors);
|
|
case 38:
|
|
return aarch64_ins_ldst_elemlist (self, info, code, inst, errors);
|
|
case 39:
|
|
case 40:
|
|
case 41:
|
|
case 42:
|
|
case 52:
|
|
case 53:
|
|
case 54:
|
|
case 55:
|
|
case 56:
|
|
case 57:
|
|
case 58:
|
|
case 59:
|
|
case 60:
|
|
case 61:
|
|
case 62:
|
|
case 63:
|
|
case 64:
|
|
case 65:
|
|
case 66:
|
|
case 67:
|
|
case 79:
|
|
case 80:
|
|
case 81:
|
|
case 82:
|
|
case 160:
|
|
case 162:
|
|
case 179:
|
|
case 180:
|
|
case 181:
|
|
case 182:
|
|
case 183:
|
|
case 184:
|
|
case 185:
|
|
case 186:
|
|
case 206:
|
|
return aarch64_ins_imm (self, info, code, inst, errors);
|
|
case 43:
|
|
case 44:
|
|
return aarch64_ins_advsimd_imm_shift (self, info, code, inst, errors);
|
|
case 45:
|
|
case 46:
|
|
case 47:
|
|
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
|
|
case 51:
|
|
case 150:
|
|
return aarch64_ins_fpimm (self, info, code, inst, errors);
|
|
case 68:
|
|
case 158:
|
|
return aarch64_ins_limm (self, info, code, inst, errors);
|
|
case 69:
|
|
return aarch64_ins_aimm (self, info, code, inst, errors);
|
|
case 70:
|
|
return aarch64_ins_imm_half (self, info, code, inst, errors);
|
|
case 71:
|
|
return aarch64_ins_fbits (self, info, code, inst, errors);
|
|
case 73:
|
|
case 74:
|
|
case 155:
|
|
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
|
|
case 75:
|
|
case 154:
|
|
case 156:
|
|
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
|
|
case 76:
|
|
case 77:
|
|
return aarch64_ins_cond (self, info, code, inst, errors);
|
|
case 83:
|
|
case 92:
|
|
return aarch64_ins_addr_simple (self, info, code, inst, errors);
|
|
case 84:
|
|
return aarch64_ins_addr_regoff (self, info, code, inst, errors);
|
|
case 85:
|
|
case 86:
|
|
case 87:
|
|
case 89:
|
|
case 91:
|
|
return aarch64_ins_addr_simm (self, info, code, inst, errors);
|
|
case 88:
|
|
return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
|
|
case 90:
|
|
return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
|
|
case 93:
|
|
return aarch64_ins_addr_offset (self, info, code, inst, errors);
|
|
case 94:
|
|
return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
|
|
case 95:
|
|
return aarch64_ins_sysreg (self, info, code, inst, errors);
|
|
case 96:
|
|
return aarch64_ins_pstatefield (self, info, code, inst, errors);
|
|
case 97:
|
|
case 98:
|
|
case 99:
|
|
case 100:
|
|
case 101:
|
|
return aarch64_ins_sysins_op (self, info, code, inst, errors);
|
|
case 102:
|
|
case 103:
|
|
return aarch64_ins_barrier (self, info, code, inst, errors);
|
|
case 104:
|
|
return aarch64_ins_prfop (self, info, code, inst, errors);
|
|
case 105:
|
|
case 106:
|
|
return aarch64_ins_hint (self, info, code, inst, errors);
|
|
case 107:
|
|
case 108:
|
|
return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
|
|
case 109:
|
|
case 110:
|
|
case 111:
|
|
case 112:
|
|
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
|
|
case 113:
|
|
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
|
|
case 114:
|
|
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
|
|
case 115:
|
|
case 116:
|
|
case 117:
|
|
case 118:
|
|
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
|
|
case 119:
|
|
case 120:
|
|
case 121:
|
|
case 122:
|
|
case 123:
|
|
case 124:
|
|
case 125:
|
|
case 126:
|
|
case 127:
|
|
case 128:
|
|
case 129:
|
|
case 130:
|
|
case 131:
|
|
case 132:
|
|
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
|
|
case 133:
|
|
case 134:
|
|
case 135:
|
|
case 136:
|
|
case 137:
|
|
case 138:
|
|
case 139:
|
|
case 140:
|
|
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
|
|
case 141:
|
|
case 142:
|
|
case 143:
|
|
case 144:
|
|
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
|
|
case 145:
|
|
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
|
|
case 146:
|
|
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
|
|
case 147:
|
|
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
|
|
case 148:
|
|
return aarch64_ins_sve_aimm (self, info, code, inst, errors);
|
|
case 149:
|
|
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
|
|
case 151:
|
|
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
|
|
case 152:
|
|
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
|
|
case 153:
|
|
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
|
|
case 157:
|
|
return aarch64_ins_inv_limm (self, info, code, inst, errors);
|
|
case 159:
|
|
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
|
|
case 161:
|
|
return aarch64_ins_sve_scale (self, info, code, inst, errors);
|
|
case 173:
|
|
case 174:
|
|
case 175:
|
|
return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
|
|
case 176:
|
|
case 177:
|
|
case 178:
|
|
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
|
|
case 196:
|
|
case 197:
|
|
case 198:
|
|
case 199:
|
|
case 200:
|
|
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
|
|
case 202:
|
|
return aarch64_ins_sve_index (self, info, code, inst, errors);
|
|
case 203:
|
|
case 205:
|
|
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
|
|
default: assert (0); abort ();
|
|
}
|
|
}
|