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8c4c18181e
This patch adds the CGEN generated files for the eBPF simulator. sim/ChangeLog: 2020-08-04 Jose E. Marchesi <jose.marchesi@oracle.com> David Faust <david.faust@oracle.com> * bpf/arch.c: Likewise. * bpf/arch.h: Likewise. * bpf/cpu.c: Likewise. * bpf/cpu.h: Likewise. * bpf/cpuall.h: Likewise. * bpf/decode-be.c: Likewise. * bpf/decode-be.h: Likewise. * bpf/decode-le.c: Likewise. * bpf/decode-le.h: Likewise. * bpf/defs-be.h: Likewise. * bpf/defs-le.h: Likewise. * bpf/sem-be.c: Likewise. * bpf/sem-le.c: Likewise.
384 lines
12 KiB
C
384 lines
12 KiB
C
/* ISA definitions header for ebpfle.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2020 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef DEFS_BPFBF_EBPFLE_H
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#define DEFS_BPFBF_EBPFLE_H
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/* Instruction argument buffer. */
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union sem_fields {
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struct { /* no operands */
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int empty;
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} sfmt_empty;
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struct { /* */
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INT f_imm32;
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UINT f_srcle;
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} sfmt_ldindwle;
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struct { /* */
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DI f_imm64;
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UINT f_dstle;
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} sfmt_lddwle;
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struct { /* */
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INT f_imm32;
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UINT f_dstle;
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HI f_offset16;
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} sfmt_stble;
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struct { /* */
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UINT f_dstle;
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UINT f_srcle;
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HI f_offset16;
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} sfmt_ldxwle;
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#if WITH_SCACHE_PBB
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/* Writeback handler. */
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struct {
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/* Pointer to argbuf entry for insn whose results need writing back. */
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const struct argbuf *abuf;
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} write;
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/* x-before handler */
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struct {
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/*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
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int first_p;
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} before;
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/* x-after handler */
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struct {
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int empty;
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} after;
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/* This entry is used to terminate each pbb. */
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struct {
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/* Number of insns in pbb. */
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int insn_count;
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/* Next pbb to execute. */
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SCACHE *next;
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SCACHE *branch_target;
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} chain;
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#endif
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};
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/* The ARGBUF struct. */
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struct argbuf {
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/* These are the baseclass definitions. */
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IADDR addr;
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const IDESC *idesc;
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char trace_p;
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char profile_p;
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/* ??? Temporary hack for skip insns. */
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char skip_count;
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char unused;
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/* cpu specific data follows */
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union sem semantic;
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int written;
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union sem_fields fields;
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};
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/* A cached insn.
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??? SCACHE used to contain more than just argbuf. We could delete the
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type entirely and always just use ARGBUF, but for future concerns and as
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a level of abstraction it is left in. */
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struct scache {
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struct argbuf argbuf;
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};
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/* Macros to simplify extraction, reading and semantic code.
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These define and assign the local vars that contain the insn's fields. */
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#define EXTRACT_IFMT_EMPTY_VARS \
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unsigned int length;
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#define EXTRACT_IFMT_EMPTY_CODE \
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length = 0; \
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#define EXTRACT_IFMT_ADDILE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_code; \
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UINT f_dstle; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_ADDILE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_ADDRLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_code; \
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UINT f_dstle; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_ADDRLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_NEGLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_code; \
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UINT f_dstle; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_NEGLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_ENDLELE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_code; \
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UINT f_dstle; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_ENDLELE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_LDDWLE_VARS \
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UINT f_imm64_a; \
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UINT f_imm64_b; \
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UINT f_imm64_c; \
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DI f_imm64; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_mode; \
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UINT f_op_size; \
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UINT f_dstle; \
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UINT f_op_class; \
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/* Contents of trailing part of insn. */ \
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UINT word_1; \
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UINT word_2; \
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unsigned int length;
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#define EXTRACT_IFMT_LDDWLE_CODE \
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length = 16; \
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word_1 = GETIMEMUSI (current_cpu, pc + 8); \
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word_2 = GETIMEMUSI (current_cpu, pc + 12); \
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f_imm64_a = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_imm64_b = (0|(EXTRACT_LSB0_UINT (word_1, 32, 31, 32) << 0)); \
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f_imm64_c = (0|(EXTRACT_LSB0_UINT (word_2, 32, 31, 32) << 0)); \
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{\
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f_imm64 = ((((((UDI) (UINT) (f_imm64_c))) << (32))) | (((UDI) (UINT) (f_imm64_a))));\
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}\
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
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f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_LDABSW_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_regs; \
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UINT f_op_mode; \
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UINT f_op_size; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_LDABSW_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
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f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
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f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_LDINDWLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_mode; \
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UINT f_op_size; \
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UINT f_dstle; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_LDINDWLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
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f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_LDXWLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_mode; \
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UINT f_op_size; \
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UINT f_dstle; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_LDXWLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
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f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_STBLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_mode; \
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UINT f_op_size; \
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UINT f_dstle; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_STBLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_mode = EXTRACT_LSB0_LGUINT (insn, 64, 7, 3); \
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f_op_size = EXTRACT_LSB0_LGUINT (insn, 64, 4, 2); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_JEQILE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_code; \
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UINT f_dstle; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_JEQILE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_JEQRLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_srcle; \
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UINT f_op_code; \
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UINT f_dstle; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_JEQRLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_srcle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 4) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_dstle = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 11, 4) << 0)); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_CALLLE_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_regs; \
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UINT f_op_code; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_CALLLE_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_JA_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_regs; \
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UINT f_op_code; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_JA_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#define EXTRACT_IFMT_EXIT_VARS \
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INT f_imm32; \
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HI f_offset16; \
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UINT f_regs; \
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UINT f_op_code; \
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UINT f_op_src; \
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UINT f_op_class; \
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unsigned int length;
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#define EXTRACT_IFMT_EXIT_CODE \
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length = 8; \
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f_imm32 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 63, 32) << 0)); \
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f_offset16 = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 31, 16) << 0)); \
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f_regs = (0|(EXTRACT_LSB0_LGUINT (insn, 64, 15, 8) << 0)); \
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f_op_code = EXTRACT_LSB0_LGUINT (insn, 64, 7, 4); \
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f_op_src = EXTRACT_LSB0_LGUINT (insn, 64, 3, 1); \
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f_op_class = EXTRACT_LSB0_LGUINT (insn, 64, 2, 3); \
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#endif /* DEFS_BPFBF_EBPFLE_H */
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