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5b7c81bd8c
* as.h (POISON_BFD_BOOLEAN): Define. * as.c, * as.h, * atof-generic.c, * config/atof-ieee.c, * config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c, * config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c, * config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c, * config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h, * config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c, * config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h, * config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c, * config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h, * config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c, * config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h, * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h, * config/tc-metag.c, * config/tc-metag.h, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c, * config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h, * config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c, * config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c, * config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h, * config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c, * config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xstormy16.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z8k.c, * config/xtensa-istack.h, * config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c, * dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c, * frags.h, * listing.c, * macro.c, * output-file.c, * read.c, * read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true.
135 lines
5.1 KiB
C
135 lines
5.1 KiB
C
/* tc-mn10300.h -- Header file for tc-mn10300.c.
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Copyright (C) 1996-2021 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to the Free
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Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#define TC_MN10300
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#define TARGET_BYTES_BIG_ENDIAN 0
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#define DIFF_EXPR_OK
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#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
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#define TC_FORCE_RELOCATION(FIX) mn10300_force_relocation (FIX)
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extern bool mn10300_force_relocation (struct fix *);
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/* tc-mn10300.c uses TC_FORCE_RELOCATION_LOCAL, a macro that should
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only appear in write.c. The use is likely incorrect. Duplicating
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the definition here rather than expanding it in
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TC_FORCE_RELOCATION_LOCAL at least ensures write.c changes will be
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flagged immediately with a compile error. */
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#define GENERIC_FORCE_RELOCATION_LOCAL(FIX) \
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(!(FIX)->fx_pcrel \
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|| TC_FORCE_RELOCATION (FIX))
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#define TC_FORCE_RELOCATION_LOCAL(FIX) \
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(GENERIC_FORCE_RELOCATION_LOCAL (FIX) \
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|| (FIX)->fx_r_type == BFD_RELOC_32_PLT_PCREL \
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|| (FIX)->fx_r_type == BFD_RELOC_MN10300_GOT32 \
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|| (FIX)->fx_r_type == BFD_RELOC_32_GOT_PCREL)
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#define md_parse_name(NAME, EXPRP, MODE, NEXTCHARP) \
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mn10300_parse_name ((NAME), (EXPRP), (MODE), (NEXTCHARP))
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int mn10300_parse_name (char const *, expressionS *, enum expr_mode, char *);
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#define TC_CONS_FIX_NEW(FRAG, OFF, LEN, EXP, RELOC) \
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mn10300_cons_fix_new ((FRAG), (OFF), (LEN), (EXP), (RELOC))
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void mn10300_cons_fix_new (fragS *, int, int, expressionS *,
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bfd_reloc_code_real_type);
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/* This is used to construct expressions out of @GOTOFF, @PLT and @GOT
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symbols. The relocation type is stored in X_md. */
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#define O_PIC_reloc O_md1
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/* The target BFD architecture. */
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#define TARGET_ARCH bfd_arch_mn10300
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#ifdef TE_LINUX
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#define TARGET_FORMAT "elf32-am33lin"
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#else
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#define TARGET_FORMAT "elf32-mn10300"
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#endif
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/* Do not adjust relocations involving symbols in code sections,
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because it breaks linker relaxations. This could be fixed in the
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linker, but this fix is simpler, and it pretty much only affects
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object size a little bit. */
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEC) \
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(GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEC) \
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|| ((SEC)->flags & SEC_CODE) != 0 \
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|| (FIX)->fx_r_type == BFD_RELOC_MN10300_ALIGN \
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|| TC_FORCE_RELOCATION (FIX))
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/* We validate subtract arguments within tc_gen_reloc(), so don't
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report errors at this point. */
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1
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/* Fixup debug sections since we will never relax them. Ideally, we
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could do away with this and instead check every single fixup with
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TC_FORCE_RELOCATION and TC_FORCE_RELOCATION_SUB_NAME, verifying
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that the sections of the referenced symbols (and not the sections
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in which the fixup appears) may be subject to relaxation. We'd
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still have to check the section in which the fixup appears, because
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we want to do some simplifications in debugging info that might
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break in real code.
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Using the infrastructure in write.c to simplify subtraction fixups
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would enable us to remove a lot of code from tc_gen_reloc(), but
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this is simpler, faster, and produces almost the same effect.
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Also, in the macros above, we can't check whether the fixup is in a
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debugging section or not, so we have to use this for now. */
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#define TC_LINKRELAX_FIXUP(seg) (seg->flags & SEC_ALLOC)
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#define md_operand(x)
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/* Permit temporary numeric labels. */
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#define LOCAL_LABELS_FB 1
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/* We don't need to handle .word strangely. */
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#define WORKING_DOT_WORD
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#define md_number_to_chars number_to_chars_littleendian
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#define tc_fix_adjustable(FIX) mn10300_fix_adjustable (FIX)
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extern bool mn10300_fix_adjustable (struct fix *);
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/* We do relaxing in the assembler as well as the linker. */
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extern const struct relax_type md_relax_table[];
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#define TC_GENERIC_RELAX_TABLE md_relax_table
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#define DWARF2_LINE_MIN_INSN_LENGTH 1
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/* The difference between same-section symbols may be affected by linker
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relaxation, so do not resolve such expressions in the assembler. */
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#define md_allow_local_subtract(l,r,s) mn10300_allow_local_subtract (l, r, s)
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extern bool mn10300_allow_local_subtract (expressionS *, expressionS *, segT);
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#define RELOC_EXPANSION_POSSIBLE
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#define MAX_RELOC_EXPANSION 2
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#define TC_FRAG_TYPE bool
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#define HANDLE_ALIGN(frag) mn10300_handle_align (frag)
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extern void mn10300_handle_align (fragS *);
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/* Only allow call frame debug info optimization when linker relaxation is
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not enabled as otherwise we could generate the DWARF directives without
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the relocs necessary to patch them up. */
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#define md_allow_eh_opt (linkrelax == 0)
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