binutils-gdb/cpu/mt.opc
Nathan Sidwell d031aafbfe Second part of ms1 to mt renaming.
* bfd/archures.c (bfd_arch_mt): Renamed.
	(bfd_mt_arch): Renamed.
	(bfd_archures_list): Adjusted.
	* bfd/bfd-in2.h: Rebuilt.
	* bfd/config.bfd (mt): Remove special case targ_archs.
	(mt-*-elf): Rename bfd_elf32_mt_vec.
	* bfd/configure: Rebuilt.
	* bfd/configure.in (bfd_elf32_mt_vec): Renamed.
	(selarchs) Remove mt special case.
	* bfd/cpu-mt.c (arch_info_struct): Adjust.
	(bfd_mt_arch): Renamed, adjust.
	* bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela,
	mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section,
	mt_elf_howto_table): Renamed, adjusted.
	(mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs,
	elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags,
	mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data,
	mt_elf_print_private_bfd_data): Renamed, adjusted.
	(TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE,
	ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section,
	bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook,
	elf_backend_gc_sweep_hook, elf_backend_check_relocs,
	eld_backend_object_p, bfd_elf32_bfd_set_private_flags,
	bfd_elf32_bfd_copy_private_bfd_data,
	bfd_elf32_bfd_merge_private_bfd_data,
	bfd_elf32_bfd_print_private_bfd_data): Adjusted.
	* bfd/libbfd.h: Regenerated.
	* bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16,
	BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT,
	BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed.
	* bfd/targets.c (bfd_elf32_mt_vec): Renamed.
	(_bfd_target_vector): Adjusted.
	* binutils/readelf.c (guess_is_rela): Use EM_MT.
	(dump_relocations, get_machine_name): Adjust.

	* cpu/mt.cpu (define-arch, define-isa): Set name to mt.
	(define-mach): Adjust.
	* cpu/mt.opc (CGEN_ASM_HASH): Update.
	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
	(parse_loopsize, parse_imm16): Adjust.

	* gas/configure: Rebuilt.
	* gas/configure.in (mt): Remove special case.
	* gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change
	#includes.
	(mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures):
	Rename, adjust.
	(md_parse_option, md_show_usage, md_begin, md_assemble,
	md_cgen_lookup_reloc, md_atof): Adjust.
	(mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust.
	* gas/config/tc-mt.h (TC_MT): Rename.
	(LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust.
	(md_apply_fix): Adjust.
	(mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename.
	(TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust.

	* gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust.
	(mt_register_name, mt_register_type, mt_register_reggroup_p,
	mt_return_value, mt_skip_prologue, mt_breapoint_from_pc,
	mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align,
	mt_registers_info, mt_push_dummy_call, mt_unwind_cache,
	mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id,
	mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address,
	mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init,
	_initialize_mt_tdep): Rename & adjust.

	* include/dis-asm.h (print_insn_mt): Renamed.

	* include/elf/common.h (EM_MT): Renamed.
	* include/elf/mt.h: Rename relocs, cpu & other defines.

	* ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust.

	* opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust.
	(stamp-mt): Adjust rule.
	(mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename &
	adjust.
	* opcodes/Makefile.in: Rebuilt.
	* opcodes/configure: Rebuilt.
	* opcodes/configure.in (bfd_mt_arch): Rename & adjust.
	* opcodes/disassemble.c (ARCH_mt): Renamed.
	(disassembler): Adjust.
	* opcodes/mt-asm.c: Renamed, rebuilt.
	* opcodes/mt-desc.c: Renamed, rebuilt.
	* opcodes/mt-desc.h: Renamed, rebuilt.
	* opcodes/mt-dis.c: Renamed, rebuilt.
	* opcodes/mt-ibld.c: Renamed, rebuilt.
	* opcodes/mt-opc.c: Renamed, rebuilt.
	* opcodes/mt-opc.h: Renamed, rebuilt.

	* sid/Makefile.in: Rebuilt.
	* sid/aclocal.m4: Rebuilt.
	* sid/configure: Rebuilt.
	* sid/sid.spec: Adjust.
	* sid/bsp/Makefile.am: Adjust.
	* sid/bsp/Makefile.in: Rebuilt.
	* sid/bsp/aclocal.m4: Rebuilt.
	* sid/bsp/configrun-sid.in: Adjust.
	* sid/bsp/pregen/Makefile.in: Rebuilt.
	* sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt.
	* sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt.
	* sid/bsp/pregen/pregen-configs.in: Adjust.
	* sid/component/aclocal.m4: Rebuilt.
	* sid/component/configure: Rebuilt.
	* sid/component/tconfig.in: Adjust.
	* sid/component/bochs/aclocal.m4: Rebuilt.
	* sid/component/cache/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/aclocal.m4: Rebuilt.
	* sid/component/cgen-cpu/compCGEN.cxx: Adjust.
	* sid/component/cgen-cpu/configure: Rebuilt.
	* sid/component/cgen-cpu/configure.in: Rebult.
	* sid/component/cgen-cpu/mt/Makefile.am: Adjust.
	* sid/component/cgen-cpu/mt/Makefile.in: Rebuilt.
	* sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust.
	* sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt.
	* sid/component/cgen-cpu/mt/mt.cxx: Adjust.
	* sid/component/cgen-cpu/mt/mt.h: Adjust.
	* sid/component/consoles/Makefile.in: Rebuilt.
	* sid/component/families/aclocal.m4: Rebuilt.
	* sid/component/families/configure: Rebuilt.
	* sid/component/gdb/Makefile.in: Rebuilt.
	* sid/component/gloss/Makefile.in: Rebuilt.
	* sid/component/glue/Makefile.in: Rebuilt.
	* sid/component/ide/Makefile.in: Rebuilt.
	* sid/component/interrupt/Makefile.in: Rebuilt.
	* sid/component/lcd/Makefile.in: Rebuilt.
	* sid/component/lcd/testsuite/Makefile.in: Rebuilt.
	* sid/component/loader/Makefile.am: Rebuilt.
	* sid/component/loader/Makefile.in: Rebuilt.
	* sid/component/mapper/Makefile.in: Rebuilt.
	* sid/component/mapper/testsuite/Makefile.in: Rebuilt.
	* sid/component/memory/Makefile.in: Rebuilt.
	* sid/component/mmu/Makefile.in: Rebuilt.
	* sid/component/parport/Makefile.in: Rebuilt.
	* sid/component/profiling/Makefile.in: Rebuilt.
	* sid/component/rtc/Makefile.in: Rebuilt.
	* sid/component/sched/Makefile.in: Rebuilt.
	* sid/component/testsuite/Makefile.in: Rebuilt.
	* sid/component/timers/aclocal.m4: Rebuilt.
	* sid/component/timers/configure: Rebuilt.
	* sid/component/uart/Makefile.in: Rebuilt.
	* sid/component/uart/testsuite/Makefile.in: Rebuilt.
	* sid/config/config.sub: Adjust.
	* sid/config/info.tcl.in: Adjust.
	* sid/config/sidtargets.m4: Adjust.
	* sid/doc/Makefile.in: Rebuilt.
	* sid/main/dynamic/Makefile.am: Rebuilt.
	* sid/main/dynamic/Makefile.in: Rebuilt.
	* sid/main/dynamic/aclocal.m4: Rebuilt.
	* sid/main/dynamic/configure: Rebuilt.
2005-12-16 10:23:12 +00:00

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/* Morpho Technologies mRISC opcode support, for GNU Binutils. -*- C -*-
Copyright 2001 Free Software Foundation, Inc.
Contributed by Red Hat Inc; developed under contract from
Morpho Technologies.
This file is part of the GNU Binutils.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
*/
/*
Each section is delimited with start and end markers.
<arch>-opc.h additions use: "-- opc.h"
<arch>-opc.c additions use: "-- opc.c"
<arch>-asm.c additions use: "-- asm.c"
<arch>-dis.c additions use: "-- dis.c"
<arch>-ibd.h additions use: "-- ibd.h"
*/
/* -- opc.h */
/* Check applicability of instructions against machines. */
#define CGEN_VALIDATE_INSN_SUPPORTED
/* Allows reason codes to be output when assembler errors occur. */
#define CGEN_VERBOSE_ASSEMBLER_ERRORS
/* Override disassembly hashing - there are variable bits in the top
byte of these instructions. */
#define CGEN_DIS_HASH_SIZE 8
#define CGEN_DIS_HASH(buf, value) (((* (unsigned char *) (buf)) >> 5) % CGEN_DIS_HASH_SIZE)
#define CGEN_ASM_HASH_SIZE 127
#define CGEN_ASM_HASH(insn) mt_asm_hash (insn)
extern unsigned int mt_asm_hash (const char *);
extern int mt_cgen_insn_supported (CGEN_CPU_DESC, const CGEN_INSN *);
/* -- opc.c */
#include "safe-ctype.h"
/* Special check to ensure that instruction exists for given machine. */
int
mt_cgen_insn_supported (CGEN_CPU_DESC cd, const CGEN_INSN *insn)
{
int machs = CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_MACH);
/* No mach attribute? Assume it's supported for all machs. */
if (machs == 0)
return 1;
return ((machs & cd->machs) != 0);
}
/* A better hash function for instruction mnemonics. */
unsigned int
mt_asm_hash (const char* insn)
{
unsigned int hash;
const char* m = insn;
for (hash = 0; *m && ! ISSPACE (*m); m++)
hash = (hash * 23) ^ (0x1F & TOLOWER (*m));
/* printf ("%s %d\n", insn, (hash % CGEN_ASM_HASH_SIZE)); */
return hash % CGEN_ASM_HASH_SIZE;
}
/* -- asm.c */
/* Range checking for signed numbers. Returns 0 if acceptable
and 1 if the value is out of bounds for a signed quantity. */
static int
signed_out_of_bounds (long val)
{
if ((val < -32768) || (val > 32767))
return 1;
return 0;
}
static const char *
parse_loopsize (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
void *arg)
{
signed long * valuep = (signed long *) arg;
const char *errmsg;
bfd_reloc_code_real_type code = BFD_RELOC_NONE;
enum cgen_parse_operand_result result_type;
bfd_vma value;
/* Is it a control transfer instructions? */
if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_LOOPSIZE)
{
code = BFD_RELOC_MT_PCINSN8;
errmsg = cgen_parse_address (cd, strp, opindex, code,
& result_type, & value);
*valuep = value;
return errmsg;
}
abort ();
}
static const char *
parse_imm16 (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
void *arg)
{
signed long * valuep = (signed long *) arg;
const char *errmsg;
enum cgen_parse_operand_result result_type;
bfd_reloc_code_real_type code = BFD_RELOC_NONE;
bfd_vma value;
/* Is it a control transfer instructions? */
if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16O)
{
code = BFD_RELOC_16_PCREL;
errmsg = cgen_parse_address (cd, strp, opindex, code,
& result_type, & value);
if (errmsg == NULL)
{
if (signed_out_of_bounds (value))
errmsg = _("Operand out of range. Must be between -32768 and 32767.");
}
*valuep = value;
return errmsg;
}
/* If it's not a control transfer instruction, then
we have to check for %OP relocating operators. */
if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16L)
;
else if (strncmp (*strp, "%hi16", 5) == 0)
{
*strp += 5;
code = BFD_RELOC_HI16;
}
else if (strncmp (*strp, "%lo16", 5) == 0)
{
*strp += 5;
code = BFD_RELOC_LO16;
}
/* If we found a %OP relocating operator, then parse it as an address.
If not, we need to parse it as an integer, either signed or unsigned
depending on which operand type we have. */
if (code != BFD_RELOC_NONE)
{
/* %OP relocating operator found. */
errmsg = cgen_parse_address (cd, strp, opindex, code,
& result_type, & value);
if (errmsg == NULL)
{
switch (result_type)
{
case (CGEN_PARSE_OPERAND_RESULT_NUMBER):
if (code == BFD_RELOC_HI16)
value = (value >> 16) & 0xFFFF;
else if (code == BFD_RELOC_LO16)
value = value & 0xFFFF;
else
errmsg = _("Biiiig Trouble in parse_imm16!");
break;
case (CGEN_PARSE_OPERAND_RESULT_QUEUED):
/* No special processing for this case. */
break;
default:
errmsg = _("%operator operand is not a symbol");
break;
}
}
*valuep = value;
}
else
{
/* Parse hex values like 0xffff as unsigned, and sign extend
them manually. */
int parse_signed = (opindex == (CGEN_OPERAND_TYPE)MT_OPERAND_IMM16);
if ((*strp)[0] == '0'
&& ((*strp)[1] == 'x' || (*strp)[1] == 'X'))
parse_signed = 0;
/* No relocating operator. Parse as an number. */
if (parse_signed)
{
/* Parse as as signed integer. */
errmsg = cgen_parse_signed_integer (cd, strp, opindex, valuep);
if (errmsg == NULL)
{
#if 0
/* Manual range checking is needed for the signed case. */
if (*valuep & 0x8000)
value = 0xffff0000 | *valuep;
else
value = *valuep;
if (signed_out_of_bounds (value))
errmsg = _("Operand out of range. Must be between -32768 and 32767.");
/* Truncate to 16 bits. This is necessary
because cgen will have sign extended *valuep. */
*valuep &= 0xFFFF;
#endif
}
}
else
{
/* MT_OPERAND_IMM16Z. Parse as an unsigned integer. */
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, (unsigned long *) valuep);
if (opindex == (CGEN_OPERAND_TYPE) MT_OPERAND_IMM16
&& *valuep >= 0x8000
&& *valuep <= 0xffff)
*valuep -= 0x10000;
}
}
return errmsg;
}
static const char *
parse_dup (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "dup", 3) == 0 || strncmp (*strp, "DUP", 3) == 0)
{
*strp += 3;
*valuep = 1;
}
else if (strncmp (*strp, "xx", 2) == 0 || strncmp (*strp, "XX", 2) == 0)
{
*strp += 2;
*valuep = 0;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
return errmsg;
}
static const char *
parse_ball (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "all", 3) == 0 || strncmp (*strp, "ALL", 3) == 0)
{
*strp += 3;
*valuep = 1;
}
else if (strncmp (*strp, "one", 3) == 0 || strncmp (*strp, "ONE", 3) == 0)
{
*strp += 3;
*valuep = 0;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
return errmsg;
}
static const char *
parse_xmode (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "pm", 2) == 0 || strncmp (*strp, "PM", 2) == 0)
{
*strp += 2;
*valuep = 1;
}
else if (strncmp (*strp, "xm", 2) == 0 || strncmp (*strp, "XM", 2) == 0)
{
*strp += 2;
*valuep = 0;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
return errmsg;
}
static const char *
parse_rc (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "r", 1) == 0 || strncmp (*strp, "R", 1) == 0)
{
*strp += 1;
*valuep = 1;
}
else if (strncmp (*strp, "c", 1) == 0 || strncmp (*strp, "C", 1) == 0)
{
*strp += 1;
*valuep = 0;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
return errmsg;
}
static const char *
parse_cbrb (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "rb", 2) == 0 || strncmp (*strp, "RB", 2) == 0)
{
*strp += 2;
*valuep = 1;
}
else if (strncmp (*strp, "cb", 2) == 0 || strncmp (*strp, "CB", 2) == 0)
{
*strp += 2;
*valuep = 0;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
return errmsg;
}
static const char *
parse_rbbc (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "rt", 2) == 0 || strncmp (*strp, "RT", 2) == 0)
{
*strp += 2;
*valuep = 0;
}
else if (strncmp (*strp, "br1", 3) == 0 || strncmp (*strp, "BR1", 3) == 0)
{
*strp += 3;
*valuep = 1;
}
else if (strncmp (*strp, "br2", 3) == 0 || strncmp (*strp, "BR2", 3) == 0)
{
*strp += 3;
*valuep = 2;
}
else if (strncmp (*strp, "cs", 2) == 0 || strncmp (*strp, "CS", 2) == 0)
{
*strp += 2;
*valuep = 3;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
return errmsg;
}
static const char *
parse_type (CGEN_CPU_DESC cd,
const char **strp,
int opindex,
unsigned long *valuep)
{
const char *errmsg = NULL;
if (strncmp (*strp, "odd", 3) == 0 || strncmp (*strp, "ODD", 3) == 0)
{
*strp += 3;
*valuep = 0;
}
else if (strncmp (*strp, "even", 4) == 0 || strncmp (*strp, "EVEN", 4) == 0)
{
*strp += 4;
*valuep = 1;
}
else if (strncmp (*strp, "oe", 2) == 0 || strncmp (*strp, "OE", 2) == 0)
{
*strp += 2;
*valuep = 2;
}
else
errmsg = cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
if ((errmsg == NULL) && (*valuep == 3))
errmsg = _("invalid operand. type may have values 0,1,2 only.");
return errmsg;
}
/* -- dis.c */
static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
static void
print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
disassemble_info *info = (disassemble_info *) dis_info;
info->fprintf_func (info->stream, "$%lx", value);
if (0)
print_normal (cd, dis_info, value, attrs, pc, length);
}
static void
print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
void * dis_info,
long value,
unsigned int attrs ATTRIBUTE_UNUSED,
bfd_vma pc ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED)
{
print_address (cd, dis_info, value + pc, attrs, pc, length);
}
/* -- */