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237 lines
6.9 KiB
C
237 lines
6.9 KiB
C
/* This file is part of the program psim.
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Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifndef N
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#error "N must be #defined"
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#endif
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#include "sim-xcat.h"
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/* NOTE: see end of file for #undef of these macros */
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#define unsigned_N XCONCAT2(unsigned_,N)
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#define T2H_N XCONCAT2(T2H_,N)
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#define H2T_N XCONCAT2(H2T_,N)
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#define sim_core_read_aligned_N XCONCAT2(sim_core_read_aligned_,N)
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#define sim_core_write_aligned_N XCONCAT2(sim_core_write_aligned_,N)
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#define sim_core_read_unaligned_N XCONCAT2(sim_core_read_unaligned_,N)
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#define sim_core_write_unaligned_N XCONCAT2(sim_core_write_unaligned_,N)
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INLINE_SIM_CORE(unsigned_N)
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sim_core_read_aligned_N(sim_cpu *cpu,
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sim_cia cia,
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sim_core_maps map,
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unsigned_word xaddr)
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{
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sim_cpu_core *cpu_core = CPU_CORE (cpu);
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sim_core *core = &cpu_core->common;
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unsigned_N val;
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sim_core_mapping *mapping;
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address_word addr;
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if (WITH_XOR_ENDIAN)
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addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
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else
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addr = xaddr;
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mapping = sim_core_find_mapping (core, map,
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addr,
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sizeof (unsigned_N),
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read_transfer,
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1 /*abort*/, cpu, cia);
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#if (WITH_DEVICES)
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if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
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unsigned_N data;
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if (device_io_read_buffer (mapping->device,
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&data,
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mapping->space,
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addr,
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sizeof (unsigned_N)) != sizeof (unsigned_N))
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device_error (mapping->device, "internal error - %s - io_read_buffer should not fail",
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XSTRING (sim_core_read_aligned_N));
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val = T2H_N (data);
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}
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else
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#endif
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val = T2H_N (*(unsigned_N*) sim_core_translate (mapping, addr));
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if (TRACE_P (cpu, TRACE_CORE_IDX))
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trace_printf (CPU_STATE (cpu), cpu,
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"sim-n-core.c:%d: read-%d %s:0x%08lx -> 0x%lx\n",
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__LINE__,
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sizeof (unsigned_N),
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sim_core_map_to_str (map),
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(unsigned long) addr,
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(unsigned long) val);
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return val;
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}
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INLINE_SIM_CORE(unsigned_N)
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sim_core_read_unaligned_N(sim_cpu *cpu,
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sim_cia cia,
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sim_core_maps map,
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address_word addr)
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{
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int alignment = sizeof (unsigned_N) - 1;
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/* if hardwired to forced alignment just do it */
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if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
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return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
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else if ((addr & alignment) == 0)
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return sim_core_read_aligned_N (cpu, cia, map, addr);
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else
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switch (CURRENT_ALIGNMENT)
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{
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case STRICT_ALIGNMENT:
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SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
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sizeof (unsigned_N), addr,
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read_transfer, sim_core_unaligned_signal);
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return -1;
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case NONSTRICT_ALIGNMENT:
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{
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unsigned_N val;
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if (sim_core_read_buffer (CPU_STATE (cpu), map, &val, addr,
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sizeof(unsigned_N))
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!= sizeof(unsigned_N))
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SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
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sizeof (unsigned_N), addr,
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read_transfer, sim_core_unaligned_signal);
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val = T2H_N(val);
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return val;
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}
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case FORCED_ALIGNMENT:
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return sim_core_read_aligned_N (cpu, cia, map, addr & ~alignment);
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case MIXED_ALIGNMENT:
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sim_engine_abort (CPU_STATE (cpu), cpu, cia,
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"internal error - %s - mixed alignment",
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XSTRING (sim_core_read_unaligned_N));
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return 0;
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default:
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sim_engine_abort (CPU_STATE (cpu), cpu, cia,
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"internal error - %s - bad switch",
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XSTRING (sim_core_read_unaligned_N));
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return 0;
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}
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}
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INLINE_SIM_CORE(void)
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sim_core_write_aligned_N(sim_cpu *cpu,
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sim_cia cia,
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sim_core_maps map,
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unsigned_word xaddr,
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unsigned_N val)
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{
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sim_cpu_core *cpu_core = CPU_CORE (cpu);
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sim_core *core = &cpu_core->common;
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sim_core_mapping *mapping;
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address_word addr;
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if (WITH_XOR_ENDIAN)
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addr = xaddr ^ cpu_core->xor[(sizeof(unsigned_N) - 1) % WITH_XOR_ENDIAN];
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else
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addr = xaddr;
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mapping = sim_core_find_mapping(core, map,
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addr,
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sizeof (unsigned_N),
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write_transfer,
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1 /*abort*/, cpu, cia);
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#if (WITH_DEVICES)
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if (WITH_CALLBACK_MEMORY && mapping->device != NULL) {
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unsigned_N data = H2T_N (val);
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if (device_io_write_buffer (mapping->device,
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&data,
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mapping->space,
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addr,
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sizeof (unsigned_N), /* nr_bytes */
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cpu,
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cia) != sizeof (unsigned_N))
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device_error (mapping->device, "internal error - %s - io_write_buffer should not fail",
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XSTRING (sim_core_write_aligned_N));
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}
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else
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#endif
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*(unsigned_N*) sim_core_translate (mapping, addr) = H2T_N (val);
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if (TRACE_P (cpu, TRACE_CORE_IDX))
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trace_printf (CPU_STATE (cpu), cpu,
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"sim-n-core.c:%d: write-%d %s:0x%08lx <- 0x%lx\n",
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__LINE__,
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sizeof (unsigned_N),
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sim_core_map_to_str (map),
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(unsigned long) addr,
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(unsigned long) val);
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}
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INLINE_SIM_CORE(void)
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sim_core_write_unaligned_N(sim_cpu *cpu,
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sim_cia cia,
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sim_core_maps map,
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address_word addr,
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unsigned_N val)
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{
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int alignment = sizeof (unsigned_N) - 1;
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/* if hardwired to forced alignment just do it */
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if (WITH_ALIGNMENT == FORCED_ALIGNMENT)
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sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
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else if ((addr & alignment) == 0)
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sim_core_write_aligned_N (cpu, cia, map, addr, val);
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else
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switch (CURRENT_ALIGNMENT)
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{
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case STRICT_ALIGNMENT:
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SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
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sizeof (unsigned_N), addr,
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write_transfer, sim_core_unaligned_signal);
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break;
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case NONSTRICT_ALIGNMENT:
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{
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val = T2H_N(val);
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if (sim_core_write_buffer (CPU_STATE (cpu), map, &val, addr,
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sizeof(unsigned_N))
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!= sizeof(unsigned_N))
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SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map,
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sizeof (unsigned_N), addr,
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write_transfer, sim_core_unaligned_signal);
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break;
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}
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case FORCED_ALIGNMENT:
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sim_core_write_aligned_N (cpu, cia, map, addr & ~alignment, val);
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case MIXED_ALIGNMENT:
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sim_engine_abort (CPU_STATE (cpu), cpu, cia,
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"internal error - %s - mixed alignment",
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XSTRING (sim_core_write_unaligned_N));
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break;
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default:
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sim_engine_abort (CPU_STATE (cpu), cpu, cia,
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"internal error - %s - bad switch",
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XSTRING (sim_core_write_unaligned_N));
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break;
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}
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}
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/* NOTE: see start of file for #define of these macros */
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#undef unsigned_N
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#undef T2H_N
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#undef H2T_N
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#undef sim_core_read_aligned_N
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#undef sim_core_write_aligned_N
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#undef sim_core_read_unaligned_N
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#undef sim_core_write_unaligned_N
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