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binutils-gdb/sim/mips
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Mike Frysinger 2756004fe7 sim: mips: call Unpredictable instead of setting bogus values [PR sim/29276] 
The intention of this code seems to be to indicate that this insn
should not be used and produces undefined behavior, so instead of
setting registers to bogus values, call Unpredictable.  This fixes
build warnings due to 32-bit/64-bit type conversions, and outputs
a log message for users at runtime instead of silent corruption.

Bug: https://sourceware.org/PR29276
2022-11-08 14:55:50 +07:00
..
aclocal.m4 sim: unify reserved instruction bits settings 2021-07-01 20:53:00 -04:00
ChangeLog-2021 sim: rename ChangeLog files to ChangeLog-2021 2021-08-17 20:27:36 -04:00
configure sim: mips: simplify fpu configure logic 2022-11-04 01:37:16 +07:00
configure.ac sim: mips: simplify fpu configure logic 2022-11-04 01:37:16 +07:00
cp1.c sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
cp1.h sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
dsp2.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
dsp.c Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
dsp.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
dv-tx3904cpu.c sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
dv-tx3904irc.c sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
dv-tx3904sio.c sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
dv-tx3904tmr.c sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
interp.c sim: common: change sim_{fetch,store}_register helpers to use void* buffers 2022-11-02 20:31:10 +05:45
local.mk sim: run: move linking into top-level 2022-11-05 20:00:56 +07:00
m16.dc
m16.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
m16e.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
m16run.c sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
Makefile.in sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
mdmx.c sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
mdmx.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
micromips16.dc [PATCH] Add micromips support to the MIPS simulator 2015-09-25 15:52:18 +01:00
micromips.dc [PATCH] Add micromips support to the MIPS simulator 2015-09-25 15:52:18 +01:00
micromips.igen sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
micromipsdsp.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
micromipsrun.c Automatic Copyright Year update after running gdb/copyright.py 2022-01-01 19:13:23 +04:00
mips3d.igen sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
mips3264r2.igen sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
mips3264r6.igen sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
mips.dc
mips.igen sim: mips: call Unpredictable instead of setting bogus values [PR sim/29276] 2022-11-08 14:55:50 +07:00
sb1.igen sim: mips: clean up bad style/whitespace 2022-01-01 13:26:34 -05:00
sim-main.c sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
sim-main.h sim: mips: Add simulator support for mips32r6/mips64r6 2022-02-04 19:37:26 -05:00
smartmips.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
tx.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00
vr.igen sim: mips: migrate to standard uintXX_t types 2022-01-06 01:17:38 -05:00