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a6743a5420
Another patch aimed at making binutils comply with the GNU coding standard. The generated files require https://sourceware.org/ml/cgen/2018-q1/msg00004.html cpu/ * frv.opc: Include opintl.h. (add_next_to_vliw): Use opcodes_error_handler to print error. Standardize error message. (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. opcodes/ * sysdep.h (opcodes_error_handler): Define. (_bfd_error_handler): Declare. * Makefile.am: Remove stray #. * opc2c.c (main): Remove bogus -l arg handling. Print "DO NOT EDIT" comment. * aarch64-dis.c, * arc-dis.c, * arm-dis.c, * avr-dis.c, * d30v-dis.c, * h8300-dis.c, * mmix-dis.c, * ppc-dis.c, * riscv-dis.c, * s390-dis.c, * sparc-dis.c, * v850-dis.c: Use opcodes_error_handler to print errors. Standardize error messages. * msp430-decode.opc, * nios2-dis.c, * rl78-decode.opc: Likewise, and include opintl.h. * nds32-asm.c: Likewise, and include sysdep.h and opintl.h. * i386-gen.c: Standardize error messages. * msp430-decode.c, * rl78-decode.c, rx-decode.c: Regenerate. * Makefile.in: Regenerate. * epiphany-asm.c, * epiphany-desc.c, * epiphany-dis.c, * epiphany-ibld.c, * fr30-asm.c, * fr30-desc.c, * fr30-dis.c, * fr30-ibld.c, * frv-asm.c, * frv-desc.c, * frv-dis.c, * frv-ibld.c, * frv-opc.c, * ip2k-asm.c, * ip2k-desc.c, * ip2k-dis.c, * ip2k-ibld.c, * iq2000-asm.c, * iq2000-desc.c, * iq2000-dis.c, * iq2000-ibld.c, * lm32-asm.c, * lm32-desc.c, * lm32-dis.c, * lm32-ibld.c, * m32c-asm.c, * m32c-desc.c, * m32c-dis.c, * m32c-ibld.c, * m32r-asm.c, * m32r-desc.c, * m32r-dis.c, * m32r-ibld.c, * mep-asm.c, * mep-desc.c, * mep-dis.c, * mep-ibld.c, * mt-asm.c, * mt-desc.c, * mt-dis.c, * mt-ibld.c, * or1k-asm.c, * or1k-desc.c, * or1k-dis.c, * or1k-ibld.c, * xc16x-asm.c, * xc16x-desc.c, * xc16x-dis.c, * xc16x-ibld.c, * xstormy16-asm.c, * xstormy16-desc.c, * xstormy16-dis.c, * xstormy16-ibld.c: Regenerate.
787 lines
24 KiB
C
787 lines
24 KiB
C
/* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
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/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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- the resultant file is machine generated, cgen-asm.in isn't
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Copyright (C) 1996-2018 Free Software Foundation, Inc.
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This file is part of libopcodes.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* ??? Eventually more and more of this stuff can go to cpu-independent files.
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Keep that in mind. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "xc16x-desc.h"
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#include "xc16x-opc.h"
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#include "opintl.h"
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#include "xregex.h"
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#include "libiberty.h"
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#include "safe-ctype.h"
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#undef min
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#define min(a,b) ((a) < (b) ? (a) : (b))
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#undef max
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#define max(a,b) ((a) > (b) ? (a) : (b))
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static const char * parse_insn_normal
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(CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
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/* -- assembler routines inserted here. */
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/* -- asm.c */
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/* Handle '#' prefixes (i.e. skip over them). */
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static const char *
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parse_hash (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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long *valuep ATTRIBUTE_UNUSED)
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{
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if (**strp == '#')
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{
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++*strp;
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return NULL;
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}
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return _("Missing '#' prefix");
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}
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/* Handle '.' prefixes (i.e. skip over them). */
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static const char *
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parse_dot (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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long *valuep ATTRIBUTE_UNUSED)
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{
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if (**strp == '.')
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{
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++*strp;
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return NULL;
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}
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return _("Missing '.' prefix");
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}
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/* Handle 'pof:' prefixes (i.e. skip over them). */
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static const char *
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parse_pof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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long *valuep ATTRIBUTE_UNUSED)
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{
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if (strncasecmp (*strp, "pof:", 4) == 0)
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{
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*strp += 4;
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return NULL;
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}
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return _("Missing 'pof:' prefix");
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}
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/* Handle 'pag:' prefixes (i.e. skip over them). */
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static const char *
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parse_pag (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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long *valuep ATTRIBUTE_UNUSED)
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{
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if (strncasecmp (*strp, "pag:", 4) == 0)
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{
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*strp += 4;
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return NULL;
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}
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return _("Missing 'pag:' prefix");
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}
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/* Handle 'sof' prefixes (i.e. skip over them). */
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static const char *
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parse_sof (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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long *valuep ATTRIBUTE_UNUSED)
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{
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if (strncasecmp (*strp, "sof:", 4) == 0)
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{
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*strp += 4;
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return NULL;
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}
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return _("Missing 'sof:' prefix");
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}
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/* Handle 'seg' prefixes (i.e. skip over them). */
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static const char *
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parse_seg (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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const char **strp,
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int opindex ATTRIBUTE_UNUSED,
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long *valuep ATTRIBUTE_UNUSED)
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{
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if (strncasecmp (*strp, "seg:", 4) == 0)
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{
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*strp += 4;
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return NULL;
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}
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return _("Missing 'seg:' prefix");
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}
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/* -- */
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const char * xc16x_cgen_parse_operand
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(CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
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/* Main entry point for operand parsing.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `parse_insn_normal', but keeping it
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separate makes clear the interface between `parse_insn_normal' and each of
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the handlers. */
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const char *
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xc16x_cgen_parse_operand (CGEN_CPU_DESC cd,
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int opindex,
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const char ** strp,
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CGEN_FIELDS * fields)
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{
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const char * errmsg = NULL;
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/* Used by scalar operands that still need to be parsed. */
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long junk ATTRIBUTE_UNUSED;
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switch (opindex)
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{
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case XC16X_OPERAND_REGNAM :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_psw_names, & fields->f_reg8);
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break;
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case XC16X_OPERAND_BIT01 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT01, (unsigned long *) (& fields->f_op_1bit));
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break;
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case XC16X_OPERAND_BIT1 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT1, (unsigned long *) (& fields->f_op_bit1));
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break;
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case XC16X_OPERAND_BIT2 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT2, (unsigned long *) (& fields->f_op_bit2));
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break;
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case XC16X_OPERAND_BIT4 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT4, (unsigned long *) (& fields->f_op_bit4));
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break;
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case XC16X_OPERAND_BIT8 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BIT8, (unsigned long *) (& fields->f_op_bit8));
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break;
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case XC16X_OPERAND_BITONE :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_BITONE, (unsigned long *) (& fields->f_op_onebit));
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break;
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case XC16X_OPERAND_CADDR :
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{
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bfd_vma value = 0;
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errmsg = cgen_parse_address (cd, strp, XC16X_OPERAND_CADDR, 0, NULL, & value);
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fields->f_offset16 = value;
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}
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break;
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case XC16X_OPERAND_COND :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_conditioncode_names, & fields->f_condcode);
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break;
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case XC16X_OPERAND_DATA8 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_DATA8, (unsigned long *) (& fields->f_data8));
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break;
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case XC16X_OPERAND_DATAHI8 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_DATAHI8, (unsigned long *) (& fields->f_datahi8));
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break;
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case XC16X_OPERAND_DOT :
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errmsg = parse_dot (cd, strp, XC16X_OPERAND_DOT, (long *) (& junk));
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break;
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case XC16X_OPERAND_DR :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r1);
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break;
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case XC16X_OPERAND_DRB :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_grb_names, & fields->f_r1);
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break;
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case XC16X_OPERAND_DRI :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r4);
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break;
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case XC16X_OPERAND_EXTCOND :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_extconditioncode_names, & fields->f_extccode);
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break;
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case XC16X_OPERAND_GENREG :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_regb8);
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break;
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case XC16X_OPERAND_HASH :
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errmsg = parse_hash (cd, strp, XC16X_OPERAND_HASH, (long *) (& junk));
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break;
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case XC16X_OPERAND_ICOND :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_conditioncode_names, & fields->f_icondcode);
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break;
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case XC16X_OPERAND_LBIT2 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_LBIT2, (unsigned long *) (& fields->f_op_lbit2));
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break;
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case XC16X_OPERAND_LBIT4 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_LBIT4, (unsigned long *) (& fields->f_op_lbit4));
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break;
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case XC16X_OPERAND_MASK8 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_MASK8, (unsigned long *) (& fields->f_mask8));
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break;
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case XC16X_OPERAND_MASKLO8 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_MASKLO8, (unsigned long *) (& fields->f_datahi8));
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break;
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case XC16X_OPERAND_MEMGR8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_memgr8_names, & fields->f_memgr8);
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break;
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case XC16X_OPERAND_MEMORY :
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{
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bfd_vma value = 0;
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errmsg = cgen_parse_address (cd, strp, XC16X_OPERAND_MEMORY, 0, NULL, & value);
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fields->f_memory = value;
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}
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break;
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case XC16X_OPERAND_PAG :
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errmsg = parse_pag (cd, strp, XC16X_OPERAND_PAG, (long *) (& junk));
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break;
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case XC16X_OPERAND_PAGENUM :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_PAGENUM, (unsigned long *) (& fields->f_pagenum));
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break;
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case XC16X_OPERAND_POF :
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errmsg = parse_pof (cd, strp, XC16X_OPERAND_POF, (long *) (& junk));
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break;
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case XC16X_OPERAND_QBIT :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_QBIT, (unsigned long *) (& fields->f_qbit));
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break;
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case XC16X_OPERAND_QHIBIT :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_QHIBIT, (unsigned long *) (& fields->f_qhibit));
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break;
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case XC16X_OPERAND_QLOBIT :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_QLOBIT, (unsigned long *) (& fields->f_qlobit));
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break;
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case XC16X_OPERAND_REG8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_reg8);
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break;
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case XC16X_OPERAND_REGB8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_grb8_names, & fields->f_regb8);
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break;
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case XC16X_OPERAND_REGBMEM8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_regbmem8_names, & fields->f_regmem8);
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break;
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case XC16X_OPERAND_REGHI8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_reghi8);
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break;
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case XC16X_OPERAND_REGMEM8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_regmem8_names, & fields->f_regmem8);
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break;
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case XC16X_OPERAND_REGOFF8 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_r8_names, & fields->f_regoff8);
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break;
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case XC16X_OPERAND_REL :
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errmsg = cgen_parse_signed_integer (cd, strp, XC16X_OPERAND_REL, (long *) (& fields->f_rel8));
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break;
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case XC16X_OPERAND_RELHI :
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errmsg = cgen_parse_signed_integer (cd, strp, XC16X_OPERAND_RELHI, (long *) (& fields->f_relhi8));
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break;
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case XC16X_OPERAND_SEG :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_SEG, (unsigned long *) (& fields->f_seg8));
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break;
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case XC16X_OPERAND_SEGHI8 :
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errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_SEGHI8, (unsigned long *) (& fields->f_segnum8));
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break;
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case XC16X_OPERAND_SEGM :
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errmsg = parse_seg (cd, strp, XC16X_OPERAND_SEGM, (long *) (& junk));
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break;
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case XC16X_OPERAND_SOF :
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errmsg = parse_sof (cd, strp, XC16X_OPERAND_SOF, (long *) (& junk));
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break;
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case XC16X_OPERAND_SR :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r2);
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break;
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case XC16X_OPERAND_SR2 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r0);
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break;
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case XC16X_OPERAND_SRB :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_grb_names, & fields->f_r2);
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break;
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case XC16X_OPERAND_SRC1 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r1);
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break;
|
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case XC16X_OPERAND_SRC2 :
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_gr_names, & fields->f_r2);
|
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break;
|
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case XC16X_OPERAND_SRDIV :
|
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_regdiv8_names, & fields->f_reg8);
|
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break;
|
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case XC16X_OPERAND_U4 :
|
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_reg0_name, & fields->f_uimm4);
|
||
break;
|
||
case XC16X_OPERAND_UIMM16 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM16, (unsigned long *) (& fields->f_uimm16));
|
||
break;
|
||
case XC16X_OPERAND_UIMM2 :
|
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errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_ext_names, & fields->f_uimm2);
|
||
break;
|
||
case XC16X_OPERAND_UIMM3 :
|
||
errmsg = cgen_parse_keyword (cd, strp, & xc16x_cgen_opval_reg0_name1, & fields->f_uimm3);
|
||
break;
|
||
case XC16X_OPERAND_UIMM4 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM4, (unsigned long *) (& fields->f_uimm4));
|
||
break;
|
||
case XC16X_OPERAND_UIMM7 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM7, (unsigned long *) (& fields->f_uimm7));
|
||
break;
|
||
case XC16X_OPERAND_UIMM8 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UIMM8, (unsigned long *) (& fields->f_uimm8));
|
||
break;
|
||
case XC16X_OPERAND_UPAG16 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_UPAG16, (unsigned long *) (& fields->f_uimm16));
|
||
break;
|
||
case XC16X_OPERAND_UPOF16 :
|
||
{
|
||
bfd_vma value = 0;
|
||
errmsg = cgen_parse_address (cd, strp, XC16X_OPERAND_UPOF16, 0, NULL, & value);
|
||
fields->f_memory = value;
|
||
}
|
||
break;
|
||
case XC16X_OPERAND_USEG16 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_USEG16, (unsigned long *) (& fields->f_offset16));
|
||
break;
|
||
case XC16X_OPERAND_USEG8 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_USEG8, (unsigned long *) (& fields->f_seg8));
|
||
break;
|
||
case XC16X_OPERAND_USOF16 :
|
||
errmsg = cgen_parse_unsigned_integer (cd, strp, XC16X_OPERAND_USOF16, (unsigned long *) (& fields->f_offset16));
|
||
break;
|
||
|
||
default :
|
||
/* xgettext:c-format */
|
||
opcodes_error_handler
|
||
(_("internal error: unrecognized field %d while parsing"),
|
||
opindex);
|
||
abort ();
|
||
}
|
||
|
||
return errmsg;
|
||
}
|
||
|
||
cgen_parse_fn * const xc16x_cgen_parse_handlers[] =
|
||
{
|
||
parse_insn_normal,
|
||
};
|
||
|
||
void
|
||
xc16x_cgen_init_asm (CGEN_CPU_DESC cd)
|
||
{
|
||
xc16x_cgen_init_opcode_table (cd);
|
||
xc16x_cgen_init_ibld_table (cd);
|
||
cd->parse_handlers = & xc16x_cgen_parse_handlers[0];
|
||
cd->parse_operand = xc16x_cgen_parse_operand;
|
||
#ifdef CGEN_ASM_INIT_HOOK
|
||
CGEN_ASM_INIT_HOOK
|
||
#endif
|
||
}
|
||
|
||
|
||
|
||
/* Regex construction routine.
|
||
|
||
This translates an opcode syntax string into a regex string,
|
||
by replacing any non-character syntax element (such as an
|
||
opcode) with the pattern '.*'
|
||
|
||
It then compiles the regex and stores it in the opcode, for
|
||
later use by xc16x_cgen_assemble_insn
|
||
|
||
Returns NULL for success, an error message for failure. */
|
||
|
||
char *
|
||
xc16x_cgen_build_insn_regex (CGEN_INSN *insn)
|
||
{
|
||
CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
|
||
const char *mnem = CGEN_INSN_MNEMONIC (insn);
|
||
char rxbuf[CGEN_MAX_RX_ELEMENTS];
|
||
char *rx = rxbuf;
|
||
const CGEN_SYNTAX_CHAR_TYPE *syn;
|
||
int reg_err;
|
||
|
||
syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
|
||
|
||
/* Mnemonics come first in the syntax string. */
|
||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||
return _("missing mnemonic in syntax string");
|
||
++syn;
|
||
|
||
/* Generate a case sensitive regular expression that emulates case
|
||
insensitive matching in the "C" locale. We cannot generate a case
|
||
insensitive regular expression because in Turkish locales, 'i' and 'I'
|
||
are not equal modulo case conversion. */
|
||
|
||
/* Copy the literal mnemonic out of the insn. */
|
||
for (; *mnem; mnem++)
|
||
{
|
||
char c = *mnem;
|
||
|
||
if (ISALPHA (c))
|
||
{
|
||
*rx++ = '[';
|
||
*rx++ = TOLOWER (c);
|
||
*rx++ = TOUPPER (c);
|
||
*rx++ = ']';
|
||
}
|
||
else
|
||
*rx++ = c;
|
||
}
|
||
|
||
/* Copy any remaining literals from the syntax string into the rx. */
|
||
for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
|
||
{
|
||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||
{
|
||
char c = CGEN_SYNTAX_CHAR (* syn);
|
||
|
||
switch (c)
|
||
{
|
||
/* Escape any regex metacharacters in the syntax. */
|
||
case '.': case '[': case '\\':
|
||
case '*': case '^': case '$':
|
||
|
||
#ifdef CGEN_ESCAPE_EXTENDED_REGEX
|
||
case '?': case '{': case '}':
|
||
case '(': case ')': case '*':
|
||
case '|': case '+': case ']':
|
||
#endif
|
||
*rx++ = '\\';
|
||
*rx++ = c;
|
||
break;
|
||
|
||
default:
|
||
if (ISALPHA (c))
|
||
{
|
||
*rx++ = '[';
|
||
*rx++ = TOLOWER (c);
|
||
*rx++ = TOUPPER (c);
|
||
*rx++ = ']';
|
||
}
|
||
else
|
||
*rx++ = c;
|
||
break;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
/* Replace non-syntax fields with globs. */
|
||
*rx++ = '.';
|
||
*rx++ = '*';
|
||
}
|
||
}
|
||
|
||
/* Trailing whitespace ok. */
|
||
* rx++ = '[';
|
||
* rx++ = ' ';
|
||
* rx++ = '\t';
|
||
* rx++ = ']';
|
||
* rx++ = '*';
|
||
|
||
/* But anchor it after that. */
|
||
* rx++ = '$';
|
||
* rx = '\0';
|
||
|
||
CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
|
||
reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
|
||
|
||
if (reg_err == 0)
|
||
return NULL;
|
||
else
|
||
{
|
||
static char msg[80];
|
||
|
||
regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
|
||
regfree ((regex_t *) CGEN_INSN_RX (insn));
|
||
free (CGEN_INSN_RX (insn));
|
||
(CGEN_INSN_RX (insn)) = NULL;
|
||
return msg;
|
||
}
|
||
}
|
||
|
||
|
||
/* Default insn parser.
|
||
|
||
The syntax string is scanned and operands are parsed and stored in FIELDS.
|
||
Relocs are queued as we go via other callbacks.
|
||
|
||
??? Note that this is currently an all-or-nothing parser. If we fail to
|
||
parse the instruction, we return 0 and the caller will start over from
|
||
the beginning. Backtracking will be necessary in parsing subexpressions,
|
||
but that can be handled there. Not handling backtracking here may get
|
||
expensive in the case of the m68k. Deal with later.
|
||
|
||
Returns NULL for success, an error message for failure. */
|
||
|
||
static const char *
|
||
parse_insn_normal (CGEN_CPU_DESC cd,
|
||
const CGEN_INSN *insn,
|
||
const char **strp,
|
||
CGEN_FIELDS *fields)
|
||
{
|
||
/* ??? Runtime added insns not handled yet. */
|
||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||
const char *str = *strp;
|
||
const char *errmsg;
|
||
const char *p;
|
||
const CGEN_SYNTAX_CHAR_TYPE * syn;
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
/* FIXME: wip */
|
||
int past_opcode_p;
|
||
#endif
|
||
|
||
/* For now we assume the mnemonic is first (there are no leading operands).
|
||
We can parse it without needing to set up operand parsing.
|
||
GAS's input scrubber will ensure mnemonics are lowercase, but we may
|
||
not be called from GAS. */
|
||
p = CGEN_INSN_MNEMONIC (insn);
|
||
while (*p && TOLOWER (*p) == TOLOWER (*str))
|
||
++p, ++str;
|
||
|
||
if (* p)
|
||
return _("unrecognized instruction");
|
||
|
||
#ifndef CGEN_MNEMONIC_OPERANDS
|
||
if (* str && ! ISSPACE (* str))
|
||
return _("unrecognized instruction");
|
||
#endif
|
||
|
||
CGEN_INIT_PARSE (cd);
|
||
cgen_init_parse_operand (cd);
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
past_opcode_p = 0;
|
||
#endif
|
||
|
||
/* We don't check for (*str != '\0') here because we want to parse
|
||
any trailing fake arguments in the syntax string. */
|
||
syn = CGEN_SYNTAX_STRING (syntax);
|
||
|
||
/* Mnemonics come first for now, ensure valid string. */
|
||
if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
|
||
abort ();
|
||
|
||
++syn;
|
||
|
||
while (* syn != 0)
|
||
{
|
||
/* Non operand chars must match exactly. */
|
||
if (CGEN_SYNTAX_CHAR_P (* syn))
|
||
{
|
||
/* FIXME: While we allow for non-GAS callers above, we assume the
|
||
first char after the mnemonic part is a space. */
|
||
/* FIXME: We also take inappropriate advantage of the fact that
|
||
GAS's input scrubber will remove extraneous blanks. */
|
||
if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
|
||
{
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
if (CGEN_SYNTAX_CHAR(* syn) == ' ')
|
||
past_opcode_p = 1;
|
||
#endif
|
||
++ syn;
|
||
++ str;
|
||
}
|
||
else if (*str)
|
||
{
|
||
/* Syntax char didn't match. Can't be this insn. */
|
||
static char msg [80];
|
||
|
||
/* xgettext:c-format */
|
||
sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
|
||
CGEN_SYNTAX_CHAR(*syn), *str);
|
||
return msg;
|
||
}
|
||
else
|
||
{
|
||
/* Ran out of input. */
|
||
static char msg [80];
|
||
|
||
/* xgettext:c-format */
|
||
sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
|
||
CGEN_SYNTAX_CHAR(*syn));
|
||
return msg;
|
||
}
|
||
continue;
|
||
}
|
||
|
||
#ifdef CGEN_MNEMONIC_OPERANDS
|
||
(void) past_opcode_p;
|
||
#endif
|
||
/* We have an operand of some sort. */
|
||
errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn), &str, fields);
|
||
if (errmsg)
|
||
return errmsg;
|
||
|
||
/* Done with this operand, continue with next one. */
|
||
++ syn;
|
||
}
|
||
|
||
/* If we're at the end of the syntax string, we're done. */
|
||
if (* syn == 0)
|
||
{
|
||
/* FIXME: For the moment we assume a valid `str' can only contain
|
||
blanks now. IE: We needn't try again with a longer version of
|
||
the insn and it is assumed that longer versions of insns appear
|
||
before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
|
||
while (ISSPACE (* str))
|
||
++ str;
|
||
|
||
if (* str != '\0')
|
||
return _("junk at end of line"); /* FIXME: would like to include `str' */
|
||
|
||
return NULL;
|
||
}
|
||
|
||
/* We couldn't parse it. */
|
||
return _("unrecognized instruction");
|
||
}
|
||
|
||
/* Main entry point.
|
||
This routine is called for each instruction to be assembled.
|
||
STR points to the insn to be assembled.
|
||
We assume all necessary tables have been initialized.
|
||
The assembled instruction, less any fixups, is stored in BUF.
|
||
Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
|
||
still needs to be converted to target byte order, otherwise BUF is an array
|
||
of bytes in target byte order.
|
||
The result is a pointer to the insn's entry in the opcode table,
|
||
or NULL if an error occured (an error message will have already been
|
||
printed).
|
||
|
||
Note that when processing (non-alias) macro-insns,
|
||
this function recurses.
|
||
|
||
??? It's possible to make this cpu-independent.
|
||
One would have to deal with a few minor things.
|
||
At this point in time doing so would be more of a curiosity than useful
|
||
[for example this file isn't _that_ big], but keeping the possibility in
|
||
mind helps keep the design clean. */
|
||
|
||
const CGEN_INSN *
|
||
xc16x_cgen_assemble_insn (CGEN_CPU_DESC cd,
|
||
const char *str,
|
||
CGEN_FIELDS *fields,
|
||
CGEN_INSN_BYTES_PTR buf,
|
||
char **errmsg)
|
||
{
|
||
const char *start;
|
||
CGEN_INSN_LIST *ilist;
|
||
const char *parse_errmsg = NULL;
|
||
const char *insert_errmsg = NULL;
|
||
int recognized_mnemonic = 0;
|
||
|
||
/* Skip leading white space. */
|
||
while (ISSPACE (* str))
|
||
++ str;
|
||
|
||
/* The instructions are stored in hashed lists.
|
||
Get the first in the list. */
|
||
ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
|
||
|
||
/* Keep looking until we find a match. */
|
||
start = str;
|
||
for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
|
||
{
|
||
const CGEN_INSN *insn = ilist->insn;
|
||
recognized_mnemonic = 1;
|
||
|
||
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
|
||
/* Not usually needed as unsupported opcodes
|
||
shouldn't be in the hash lists. */
|
||
/* Is this insn supported by the selected cpu? */
|
||
if (! xc16x_cgen_insn_supported (cd, insn))
|
||
continue;
|
||
#endif
|
||
/* If the RELAXED attribute is set, this is an insn that shouldn't be
|
||
chosen immediately. Instead, it is used during assembler/linker
|
||
relaxation if possible. */
|
||
if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
|
||
continue;
|
||
|
||
str = start;
|
||
|
||
/* Skip this insn if str doesn't look right lexically. */
|
||
if (CGEN_INSN_RX (insn) != NULL &&
|
||
regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
|
||
continue;
|
||
|
||
/* Allow parse/insert handlers to obtain length of insn. */
|
||
CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
|
||
|
||
parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
|
||
if (parse_errmsg != NULL)
|
||
continue;
|
||
|
||
/* ??? 0 is passed for `pc'. */
|
||
insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
|
||
(bfd_vma) 0);
|
||
if (insert_errmsg != NULL)
|
||
continue;
|
||
|
||
/* It is up to the caller to actually output the insn and any
|
||
queued relocs. */
|
||
return insn;
|
||
}
|
||
|
||
{
|
||
static char errbuf[150];
|
||
const char *tmp_errmsg;
|
||
#ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
|
||
#define be_verbose 1
|
||
#else
|
||
#define be_verbose 0
|
||
#endif
|
||
|
||
if (be_verbose)
|
||
{
|
||
/* If requesting verbose error messages, use insert_errmsg.
|
||
Failing that, use parse_errmsg. */
|
||
tmp_errmsg = (insert_errmsg ? insert_errmsg :
|
||
parse_errmsg ? parse_errmsg :
|
||
recognized_mnemonic ?
|
||
_("unrecognized form of instruction") :
|
||
_("unrecognized instruction"));
|
||
|
||
if (strlen (start) > 50)
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
|
||
else
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
|
||
}
|
||
else
|
||
{
|
||
if (strlen (start) > 50)
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, _("bad instruction `%.50s...'"), start);
|
||
else
|
||
/* xgettext:c-format */
|
||
sprintf (errbuf, _("bad instruction `%.50s'"), start);
|
||
}
|
||
|
||
*errmsg = errbuf;
|
||
return NULL;
|
||
}
|
||
}
|